Understanding Logic Design



Similar documents
Binary Adders: Half Adders and Full Adders

Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng

A single register, called the accumulator, stores the. operand before the operation, and stores the result. Add y # add y from memory to the acc

Boolean Algebra Part 1

Gates & Boolean Algebra. Boolean Operators. Combinational Logic. Introduction

COMBINATIONAL CIRCUITS

5 Combinatorial Components. 5.0 Full adder. Full subtractor

1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.

Let s put together a Manual Processor

CHAPTER 3 Boolean Algebra and Digital Logic

Two-level logic using NAND gates

United States Naval Academy Electrical and Computer Engineering Department. EC262 Exam 1

earlier in the semester: The Full adder above adds two bits and the output is at the end. So if we do this eight times, we would have an 8-bit adder.

Logic in Computer Science: Logic Gates

CSE140: Components and Design Techniques for Digital Systems

Combinational circuits

Combinational Logic Design

Figure 8-1 Four Possible Results of Adding Two Bits

DEPARTMENT OF INFORMATION TECHNLOGY

Gates, Circuits, and Boolean Algebra

EE 261 Introduction to Logic Circuits. Module #2 Number Systems

Two's Complement Adder/Subtractor Lab L03

Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language

FORDHAM UNIVERSITY CISC Dept. of Computer and Info. Science Spring, Lab 2. The Full-Adder

Sistemas Digitais I LESI - 2º ano

Systems I: Computer Organization and Architecture

Binary full adder. 2-bit ripple-carry adder. CSE 370 Spring 2006 Introduction to Digital Design Lecture 12: Adders

Counters and Decoders

EE360: Digital Design I Course Syllabus

Take-Home Exercise. z y x. Erik Jonsson School of Engineering and Computer Science. The University of Texas at Dallas

Design and Development of Virtual Instrument (VI) Modules for an Introductory Digital Logic Course

exclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576

Lecture 4: Binary. CS442: Great Insights in Computer Science Michael L. Littman, Spring I-Before-E, Continued

Lab 1: Full Adder 0.0

Digital Logic Elements, Clock, and Memory Elements

Karnaugh Maps & Combinational Logic Design. ECE 152A Winter 2012

C H A P T E R. Logic Circuits

Elementary Logic Gates

Digital Design. Assoc. Prof. Dr. Berna Örs Yalçın

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

Unit 3 Boolean Algebra (Continued)

BOOLEAN ALGEBRA & LOGIC GATES

plc numbers Encoded values; BCD and ASCII Error detection; parity, gray code and checksums

Karnaugh Maps. Circuit-wise, this leads to a minimal two-level implementation

NEW adder cells are useful for designing larger circuits despite increase in transistor count by four per cell.

CSE140: Components and Design Techniques for Digital Systems. Introduction. Prof. Tajana Simunic Rosing

Digital Electronics Detailed Outline

Lecture 8: Synchronous Digital Systems

Digital circuits make up all computers and computer systems. The operation of digital circuits is based on

CSE140: Midterm 1 Solution and Rubric

Chapter 3 Digital Basics

3.Basic Gate Combinations

SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks

List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447).

Simplifying Logic Circuits with Karnaugh Maps

The string of digits in the binary number system represents the quantity

Today. Binary addition Representing negative numbers. Andrew H. Fagg: Embedded Real- Time Systems: Binary Arithmetic

1.4. Arithmetic of Algebraic Fractions. Introduction. Prerequisites. Learning Outcomes

An Efficient RNS to Binary Converter Using the Moduli Set {2n + 1, 2n, 2n 1}

2.0 Chapter Overview. 2.1 Boolean Algebra

DB19. 4-Bit Parallel Adder/ Subtractor. Digital Lab Experiment Board Ver. 1.0

CSEE 3827: Fundamentals of Computer Systems. Standard Forms and Simplification with Karnaugh Maps

CSE140 Homework #7 - Solution

Multipliers. Introduction

Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters:

BINARY CODED DECIMAL: B.C.D.

Basic Logic Gates Richard E. Haskell

INTRODUCTION TO DIGITAL SYSTEMS. IMPLEMENTATION: MODULES (ICs) AND NETWORKS IMPLEMENTATION OF ALGORITHMS IN HARDWARE

CH3 Boolean Algebra (cont d)

Chapter 2: Boolean Algebra and Logic Gates. Boolean Algebra

Sum-of-Products and Product-of-Sums expressions

Logic Reference Guide

Today s topics. Digital Computers. More on binary. Binary Digits (Bits)

Lecture 5: Gate Logic Logic Optimization

ASYNCHRONOUS COUNTERS

RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY

Switching Algebra and Logic Gates

Course Requirements & Evaluation Methods

Digital Logic Design:

Circuits and Boolean Expressions

EXPERIMENT 4. Parallel Adders, Subtractors, and Complementors

Levent EREN A-306 Office Phone: INTRODUCTION TO DIGITAL LOGIC

Logic gates. Chapter. 9.1 Logic gates. MIL symbols. Learning Summary. In this chapter you will learn about: Logic gates

FORDHAM UNIVERSITY CISC Dept. of Computer and Info. Science Spring, The Binary Adder

Boolean Algebra. Boolean Algebra. Boolean Algebra. Boolean Algebra

6. BOOLEAN LOGIC DESIGN

Lecture #21 April 2, 2004 Relays and Adder/Subtractors

Read-only memory Implementing logic with ROM Programmable logic devices Implementing logic with PLDs Static hazards

Adder.PPT(10/1/2009) 5.1. Lecture 13. Adder Circuits

Solution for Homework 2

THREE YEAR DEGREE (HONS.) COURSE BACHELOR OF COMPUTER APPLICATION (BCA) First Year Paper I Computer Fundamentals

Lab 1: Study of Gates & Flip-flops

Operating Manual Ver.1.1

Chapter 1. Computation theory

ELEC EXPERIMENT 1 Basic Digital Logic Circuits

Arkansas Tech University MATH 4033: Elementary Modern Algebra Dr. Marcel B. Finan

Properties of Real Numbers

Upon completion of unit 1.1, students will be able to

(1) /30 (2) /30 (3) /40 TOTAL /100

Transcription:

Understanding Logic Design ppendix of your Textbook does not have the needed background information. This document supplements it. When you write add DD R0, R1, R2, you imagine something like this: R1 dder R0 R2 What kind of hardware can DD two binary integers? We need to learn about GTES and BOOLEN LGEBR that are foundations of logic design.

ND gate X Y X.Y 0 0 0 X X.Y 0 1 0 Y 1 0 0 1 1 1 OR gate X Y X+Y 0 0 0 X 0 1 1 X+Y 1 0 1 Y 1 1 1 NOT gate ( x = x ) X X 0 1 X X 1 0 Typically, logical 1 = +3.5 volt, and logical 0 = 0 volt. Other representations are possible.

nalysis of logical circuits X X.Y F Y X.Y What is the value of F when X=0 and Y=1? Draw a truth table. X Y F 0 0 1 1 0 1 0 1 0 1 1 0 This is the exclusive or (XOR) function. In algebraic form F= X.Y + X.Y

More practice 1. Let.B +.C = 0. What are the values of, B, C? 2. Let ( + B + C).( + B + C) = 0. What are the possible values of, B, C? Draw truth tables. Draw the logic circuits for the above two functions. B C

Boolean lgebra + 0 = + = 1. 1 =. = 0 1 + = 1 + B = B + 0. = 0. B = B. + (B + C) = ( + B) + C. (B. C) = (. B). C + =. =. (B + C) =.B +.C Distributive Law + B.C = (+B). (+C). B = + B De Morgan s theorem + B =. B

De Morgan s theorem. B = + B + B =. B Thus, is equivalent to Verify it using truth tables. Similarly, is equivalent to These can be generalized to more than two variables: to. B. C = + B + C + B + C =. B. C

Synthesis of logic circuits Many problems of logic design can be specified using a truth table. Give such a table, can you design the logic circuit? Design a logic circuit with three inputs, B, C and one output F such that F=1 only when a majority of the inputs is equal to 1. B C F Sum of product form 0 0 0 0 F =.B.C +.B.C +.B.C +.B.C 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 1 Draw a logic circuit to generate F

Simplification of Boolean functions Using the theorems of Boolean lgebra, the algebraic forms of functions can often be simplified, which leads to simpler (and cheaper) implementations. Example 1 F =.B +.B + B.C =. (B + B) + B.C How many gates do you save =.1 + B.C from this simplification? = + B.C F B B C F C

Example 2 F =.B.C +.B.C +.B.C +.B.C =.B.C +.B.C +.B.C +.B.C +.B.C +.B.C = (.B.C +.B.C) + (.B.C +.B.C) + (.B.C +.B.C) = ( + ). B.C + (B + B). C. + (C + C)..B = B.C + C. +.B Example 3 Show that +.B = + B =.1 +.B =. (1 + B) =. 1 =

Other types of gates.b B +B B NND gate NOR gate Be familiar with the truth tables of these gates. B + B =.B +.B Exclusive OR (XOR) gate

NND and NOR are universal gates ny function can be implemented using only NND or only NOR gates. How can we prove this? (Proof for NND gates) ny boolean function can be implemented using ND, OR and NOT gates. So if ND, OR and NOT gates can be implemented using NND gates only, then we prove our point. 1. Implement NOT using NND

2. Implementation of ND using NND.B B 3. Implementation of OR using NND.B = +B B B Exercise. Prove that NOR is a universal gate.

Logic Design (continued) XOR Revisited XOR is also called modulo-2 addition. B C F 0 0 0 0 B = 1 only when there are an 0 0 1 1 odd number of 1 s in (,B). The 0 1 0 1 same is true for B C also. 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 = Why? 0 =

Logic Design Examples Half dder B S C Half dder Sum (S) 0 0 0 0 B Carry (C) 0 1 1 0 1 0 1 0 S = B 1 1 0 1 C =.B Carry B Sum

Full dder Sum (S) B C in S C out Full 0 0 0 0 0 dder B 0 0 1 1 0 C in Carry (C out ) 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 S = B C in C out =.B + B.C in +.C in Design a full adder using two half-adders (and a few gates if necessary) Can you design a 1-bit subtracter?

Decoders typical decoder has n inputs and 2 n outputs. Enable B D3 D2 D1 D0 D0 0 0 0 0 0 1 D1 0 1 0 0 1 0 B D2 1 0 0 1 0 0 D3 1 1 1 0 0 0 2-to-4 decoder and its truth table D3 =.B Draw the circuit of this decoder. D2 =.B D1 =.B The decoder works per specs D0 =.B when (Enable = 1). When Enable = 0, all the outputs are 0. Exercise. Design a 3-to-8 decoder. Question. Where are decoders used? Can you design a 2-4 decoder using 1-2 decoders?

Encoders typical encoder has 2 n inputs and n outputs. D0 D1 D2 D3 B D0 1 0 0 0 0 0 D1 0 1 0 0 0 1 D2 B 0 0 1 0 1 0 D3 0 0 0 1 1 1 4-to-2 encoder and its truth table = D1 + D3 B = D2 + D3

Multiplexor It is a many-to-one switch, also called a selector. 0 F S = 0, F = B 1 S = 1, F = B Control S Specifications of the mux 2-to-1 mux F = S. + S. B Exercise. Design a 4-to-1 multiplexor using two 2-to- 1 multiplexors.

Demultiplexors demux is a one-to-many switch. 0 X S = 0, X = 1 Y S = 1, Y = S 1-to-2 demux, and its specification. So, X = S., and Y = S. Exercise. Design a 1-4 demux using 1-2 demux.

1-bit LU Operation Operation = 00 implies ND Result Operation = 01 implies OR B Operation = 10 implies DD? Operation Carry in B 00 01 Result dder 10 Carry out Understand how this circuit works.

Converting an adder into a subtractor - B (here - means arithmetic subtraction) = + 2 s complement of B = + 1 s complement of B + 1 operation Carry in B 00 01 Result 0 10 dder 1 11 B invert Carry out 1-bit adder/subtractor For subtraction, B invert = 1 and Carry in = 1

32-bit LU B invert C in operation 0 LU B0 Result 0 Cout C in 1 LU B1 Result 1 Cout.... 31 LU B31 Result 31 Cout overflow

Combinational vs. Sequential Circuits Combinational circuits The output depends only on the current values of the inputs and not on the past values. Examples are adders, subtractors, and all the circuits that we have studied so far Sequential circuits The output depends not only on the current values of the inputs, but also on their past values. These hold the secret of how to memorize information. We will study sequential circuits later.