Basic Logic Gates Richard E. Haskell
|
|
- Giles Miller
- 7 years ago
- Views:
Transcription
1 BASIC LOGIC GATES 1 E Basic Logic Gates Richard E. Haskell All digital systems are made from a few basic digital circuits that we call logic gates. These circuits perform the basic logic functions that we will describe in this chapter. The physical realization of these logic gates has changed over the years from mechanical relays to electronic vacuum tubes to transistors to integrated circuits containing thousands of transistors. In this appendix you will learn: Definitions of the basic gates in terms of truth tables and logic equations DeMorgan's Theorem How gates defined in terms of positive and negative logic are related To use multiple-input gates How to perform a sum of products and a product of sums design from a truth table specification E.1 TRUTH TABLES AND LOGIC EQUATIONS All data in a computer are stored as binary digits. These bits can be thought of as the logical values 0 and 1, where a 1 is considered to be true and a 0 is considered to be false. The actual physical quantities associated with a 0 and a 1 might be a low (0 volts) or high (5 volts) voltage. A truth table will define the logical outputs (0 or 1) of the gate for all possible logical inputs. In this section we will define the three basic gates, NOT, AND, and OR, by means of their truth tables. We will then use these basic gates to define some additional gates. Using truth tables we will discover the important De Morgan's theorem. We will then consider the possibility of considering 0 to be true and 1 to be false. This will give us a better insight into the various gates. Finally, we will look at the definitions of multiple-input gates.
2 2 APPENDI E The Three Basic Gates NOT gate. The definition of the NOT gate, or inverter, is shown in Fig. E.1. The logic symbol for the inverter has a single input and a single output. The value of is the complement of the input. Thus, as shown in the truth table in Fig. E.1 if is 0, then is 1, whereas if is 1, then is 0. The NOT gate simply inverts the logic state of the input. NOT = ~ Figure E.1 The NOT gate or inverter. The equation for the inverter in Fig. E.1 is given as = ~. We read this as " equals NOT." In this appendix we will use the exclamation point ~ as the negation operator. The exclamation point, prime, bar, slash, and are sometimes used to indicate the NOT operation, as in =! = ' = = / = The reason we will use = ~ is that this is the notation used by the Verilog software we will use to compile our logic equations to program a complex programmable logic device (CPLD). Inasmuch as all the equations you will write to program these devices will use the ~ as the negation operator, you might as well get used to it from the beginning. AND Gate. The definition of the AND gate is shown in Fig. E.2. The AND gate logic symbol has two inputs, and and the single output. From the truth table in Fig. E.2 we see that the output of an AND gate is 1 (true or high) only if both inputs, and, are 1 (true or high). The output will be zero if either or or both are zero. Figure E.2 The AND gate. The equation for the AND gate in Fig. E.2 is given as = &. We read this as " equals AND." In this book we will use the ampersand & as the and operator. Other common ways to indicate the AND operation are
3 BASIC LOGIC GATES 3 * V The last form involving the juxtaposition of and limits you to logic variables containing a single letter. We will be using names for our logic variables in which case could represent a single logic variable. The reason we will use = & for the AND operation is that this is the notation used by the Verilog software to program a CPLD. OR Gate. The definition of the OR gate is shown in Fig. E.3. The OR gate logic symbol has two inputs, and, and the single output. From the truth table in Fig. E.3 we see that the output of an OR gate is 1 (true or high) if either input, or, or both are 1 (true or high). The output will be zero only if both and are zero. OR = Figure E.3 The OR gate. The equation for the OR gate in Fig. E.3 is given as =. We read this as " equals OR." In this appendix we will use the vertical line as the OR operator. Other common ways to indicate the OR operation are # + V U Again the reason we will use = for the OR operation is that this is the notation used by the Verilog software to program a PLD. As surprising as it may seem, all digital systems, including all computers, can be built from only the three basic gates: NOT, AND, and OR. We will begin by showing that three other common gates can be built from our basic three. Three New Gates Three new gates, NAND, NOR, and Exclusive-OR, can be formed from our three basic gates: NOT, AND, and OR. NAND Gate. The definition of the NAND gate is shown in Fig. E.4. The logic symbol for a NAND gate is like an AND gate with a small circle (or bubble) on the output. From the truth table in Fig. E.4, we see that the output of a NAND gate is 0 (low) only if both inputs are 1 (high). The NAND gate is equivalent to an AND gate followed by an inverter (NOT-AND), as shown by the two truth tables in Fig. E.4.
4 4 APPENDI E NAND = ~( & ) NOT-AND W W W = & 1 = ~W = ~( & ) Figure E.4 The NAND gate. NOR Gate. The definition of the NOR gate is shown in Fig. E.5. The logic symbol for a NOR gate is like an OR gate with a small circle (or bubble) on the output. From the truth table in Fig. E.5 we see that the output of a NOR gate is 1 (high) only if both inputs are 0 (low). The NOR gate is equivalent to an OR gate followed by an inverter (NOT-OR), as shown by the two truth tables in Fig. E.5. NOR = ~( ) NOT-OR W W W = 1 = ~W = ~( ) Figure E.5 The NOR gate. Exclusive-OR Gate. The definition of the Exclusive-OR, or OR, gate is shown in Fig. E.6. The OR gate logic symbol is like an OR gate symbol with an extra curved vertical line on the input. From the truth table in Fig. E.6 we see that the output of an OR gate is 1 (true or high) if either input, or, is 1 (true or high), but not both. The output will be zero if both and are the same (either both 1 or both 0). The equation for the OR gate in Fig. E.6 is given as = ^. In this book we will use the symbol ^ as the OR operator. Sometimes the symbol or the dollar sign $ is used to denote Exclusive-OR. We will use the symbol ^ because that is the symbol recognized by the Verilog software used to program a CPLD.
5 BASIC LOGIC GATES 5 OR = ^ ~ ~ ~ & & ~ Figure E.6 The Exclusive-OR (OR) gate. = (~ & ) ( & ~) ~ ~ ~ & & ~ From Fig. E.6 we see that the OR gate can be formed with two inverters, two AND gates and an OR gate. Note from this figure and truth table that the Exclusive-OR can be written as = ^ = (~ & ) ( & ~) Positive and Negative Logic: De Morgan's Theorem In the above examples we considered a 1 to be true and a 0 to be false. This is called positive logic. Another way to interpret our NAND and NOR gates is to think of an output containing the bubble (or small circle) as being true when the output is 0. We say that the output is active low. This is negative logic. Then the NAND gate is just an AND gate in which the output is true (0 or active low) only when both inputs are true (1 or active high). Look at the truth table for the NAND gate in Fig. E.4 to see this. We can even put bubbles on the input to our gates and think of them as having true values when the inputs are 0 or active low (negative logic). Remember that the bubble is equivalent to putting an inverter (NOT gate) there. If we put two bubbles on the input to an OR gate, we get a NAND gate as shown in Fig. E.7. Compare the truth table in Fig. E.7 with that in Fig. E.4 to see that it really is a NAND gate. The OR-type symbol in Fig. E.7 is just an alternate representation of a NAND gate. Note that in the representation shown in Fig. E.7 we can think of a NAND gate as an OR gate in which the output is true (1 or active high) if either or both inputs are true (0 or active low). Because the two forms of the NAND gate shown in Figs. E.4 and E.7 are equivalent, that is, they have the same truth table, the two equations for the NAND gate given in the figures must be equal. We can therefore write = ~ ~ = ~( & ) (E.1) which is one form of De Morgan's theorem.
6 6 APPENDI E NAND = ~ ~ ~ ~ ~ ~ Figure E.7 Alternate representation of a NAND gate. Let's apply this same idea of thinking of an output containing the bubble as being true when the output is 0, or active low, to the NOR gate in Fig. E.5. Then the NOR gate is just an OR gate in which the output is true (0 or active low) when either or both inputs are true (1 or active high). If we put two bubbles on the input to an AND gate, we get a NOR gate, as shown in Fig. E.8. Compare the truth table in Fig. E.8 with that in Fig. E.5 to see that it really is a NOR gate. The AND-type symbol in Fig. E.8 is just an alternate representation of a NOR gate. NOR = ~ & ~ ~ ~ ~ ~ Figure E.8 An alternate representation of a NOR gate. Note in the representation shown in Fig. E.8 that we can think of a NOR gate as an AND gate in which the output is true (1 or active high) only if both inputs are true (0 or active low). Because the two forms of the NOR gate shown in Figs. E.5 and E.8 are equivalent, that is, they have the same truth table, the two equations for the NOR gate given in these figures must be equal. We can therefore write = ~ & ~ = ~( ) (E.2)
7 BASIC LOGIC GATES 7 which is another form of De Morgan's theorem. The symbol for an inverter can also have the bubble on the input, as shown in Fig. E.9. From this figure we see that ~~ = (E.3) which represents two inverters forming a noninverting buffer. NOT = ~ ~~ = ~ ~~ = Figure E.9 An alternate representation of an inverter. From Eqs. (E.1) to (E.3) we see that we can state both forms of De Morgan's theorem as follows: For example, 1. NOT all variables. 2. Change & to or to &. 3. NOT the result. ~ ~ = ~(~~ & ~~) = ~( & ) ~( & ) = ~~(~ ~) = ~ ~ ~ & ~ = ~(~~ ~~) = ~( ) ~( ) = ~~(~ & ~) = ~ & ~ (E.4) Multiple-input Gates The AND, OR, NAND, and NOR gates we have studied so far are not limited to having two inputs. The basic definitions hold for multiple inputs. For example, the output 1 of the 4-input AND gate in Fig. E.10 will be high (1) only if all four inputs are high (1). The output 2 of the 8-input OR gate in Fig. E.10 will be high (1) if any of the eight inputs are high (1). It will only be low (0) when all eight inputs are low (0). The output 3 of the 8-input NAND gate in Fig. E.10 will be low (0) only if all eight inputs are high (1). The output 4 of the 5-input NOR gate in Fig. E.10 will be low (0) if any of the five inputs are high (1). It will only be high (1) when all five inputs are low (0).
8 8 APPENDI E Figure E.10 Multiple-input gates. E.2 BASIC DIGITAL DESIGN It is easy to design a digital circuit from its truth table definition. We will illustrate the procedure by designing the Exclusive-OR circuit shown in Fig. E.6. There are two different methods of design that lead to two different circuits that perform the same function. We will look at each of these methods separately. Sum of Products Design We can form a product term, called a minterm, for each row of a truth table. The minterm is formed by ANDing together a value associated with each input variable. If the value of the variable in a particular row of the truth table is 1, we include the variable name, such as. If the value of the variable in a particular row of the truth table is 0, we include the negation of the variable name, such as ~. Thus, the minterm in row 0 (numbering the rows from 0 to 3) will be m0 = ~ & ~ because both and are 0 in this row as shown in Fig. E.11. Note that the value of minterm m0 will be 1 when both and are zero. On the other hand the minterm in row 2 will be m2 = & ~. Note that the value of minterm m2 will be 1 when = 1 and = 0. All four minterms are shown in Fig. E.11. minterms 0 0 m0 = ~ & ~ m1 = ~ & m1 = ~ & 1 0 m2 = & ~ m2 = & ~ 1 1 m3 = & = m1 m2 = (~ & ) ( & ~) Figure E.11 Sum of products design based on the 1's of the output. On the right side of Fig. E.11 we show the truth table for the Exclusive-OR function. If we focus on the rows in which the output is 1 (true), we see that the output will be true (1) if either the minterm m1 is true or if the minterm m2 is true. Note that m1 will be true if is 0 and is 1 because then ~ & will be 1. We can then write the
9 BASIC LOGIC GATES 9 equation for by simply ORing the minterms associated with each output that is 1. From Fig. E.11 we see that = m1 m2 = (~ & ) ( & ~) (E.5) which is the same as the Exclusive-OR equation we used in Fig. E.6. We will assume the following order of precedence for the logical operators ~, & and. 1. All ~ operations are done first. 2. All & operations are done next. 3. All operations are done last. Equation (E.5) can then be written without the parentheses as = ~ & & ~ (E.6) ORing all the minterms associated with each 1 in the output column of a truth table leads to a sum of products design. The OR operator is a logical sum and the AND operator & is a logical product. The logical circuit corresponding to Eq. (E.6) is the one shown in Fig. E.6. Product of Sums Design Instead of focusing on the 1's in the output column of a truth table, suppose we focus on the 0's, as shown in Fig. E.12. Note that in this case is NOT the minterm m0 AND it is NOT the minterm m3. What does it mean to be NOT a minterm? From the definitions of minterms in Fig. E.11 and using De Morgan's theorem from Eq. (E.4), we can write NOT minterm m0 = ~m0 = ~(~ & ~) = ~~( ) = We call this the maxterm, M0. The maxterms for all rows in the truth table are given in Fig. E.13. Note that each maxterm is NOT the corresponding minterm. Use De Morgan's theorem to verify each maxterm expression is NOT minterm m0 AND it is NOT minterm m3 = ~m0 & ~m3 Figure E.12 Focusing on the 0's will lead to a product of sums design.
10 10 APPENDI E minterms maxterms 0 0 m0 = ~ & ~ M0 = ~m0 = 0 1 m1 = ~ & M1 = ~m1 = ~ 1 0 m2 = & ~ M2 = ~m2 = ~ 1 1 m3 = & M3 = ~m3 = ~ ~ Figure E.13 A maxterm is NOT the corresponding minterm. Combining the results in Figs. E.12 and E.13 we see that we can write an equation for as the product (&) of all maxterms for rows in which the output is a zero. Thus, as shown in Fig. E.14, the equation for the Exclusive-OR is = M0 & M3 = ( ) & (~ ~) (E.7) which is in the form of a product (&) of sums ( ). The logic circuit corresponding to Eq. (E.7) is shown in Fig. E.15. Compare this with the Exclusive-OR circuit shown in Fig. E.6. Note that different logic circuits can perform the identical function M0 = M3 = ~ ~ = M0 & M3 = ( ) & (~ ~) Figure E.14 Product of sums design based on the 0's of the output. ~ ~!! = ( ) & (~ ~) ~ ~ ~ ~ Figure E.15 Logic diagram for product of sums Exclusive-OR design.
1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.
File: chap04, Chapter 04 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. 2. True or False? A gate is a device that accepts a single input signal and produces one
More informationBOOLEAN ALGEBRA & LOGIC GATES
BOOLEAN ALGEBRA & LOGIC GATES Logic gates are electronic circuits that can be used to implement the most elementary logic expressions, also known as Boolean expressions. The logic gate is the most basic
More informationGates, Circuits, and Boolean Algebra
Gates, Circuits, and Boolean Algebra Computers and Electricity A gate is a device that performs a basic operation on electrical signals Gates are combined into circuits to perform more complicated tasks
More informationBinary Adders: Half Adders and Full Adders
Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order
More informationFORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder
FORDHAM UNIVERSITY CISC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. Science Spring, 2011 Lab 2 The Full-Adder 1 Introduction In this lab, the student will construct
More informationSimplifying Logic Circuits with Karnaugh Maps
Simplifying Logic Circuits with Karnaugh Maps The circuit at the top right is the logic equivalent of the Boolean expression: f = abc + abc + abc Now, as we have seen, this expression can be simplified
More informationENGI 241 Experiment 5 Basic Logic Gates
ENGI 24 Experiment 5 Basic Logic Gates OBJECTIVE This experiment will examine the operation of the AND, NAND, OR, and NOR logic gates and compare the expected outputs to the truth tables for these devices.
More informationLecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots
Lecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots Registers As you probably know (if you don t then you should consider changing your course), data processing is usually
More informationLogic in Computer Science: Logic Gates
Logic in Computer Science: Logic Gates Lila Kari The University of Western Ontario Logic in Computer Science: Logic Gates CS2209, Applied Logic for Computer Science 1 / 49 Logic and bit operations Computers
More informationKarnaugh Maps (K-map) Alternate representation of a truth table
Karnaugh Maps (K-map) lternate representation of a truth table Red decimal = minterm value Note that is the MS for this minterm numbering djacent squares have distance = 1 Valuable tool for logic minimization
More informationBoolean Algebra. Boolean Algebra. Boolean Algebra. Boolean Algebra
2 Ver..4 George Boole was an English mathematician of XIX century can operate on logic (or Boolean) variables that can assume just 2 values: /, true/false, on/off, closed/open Usually value is associated
More informationKarnaugh Maps. Circuit-wise, this leads to a minimal two-level implementation
Karnaugh Maps Applications of Boolean logic to circuit design The basic Boolean operations are AND, OR and NOT These operations can be combined to form complex expressions, which can also be directly translated
More informationKarnaugh Maps & Combinational Logic Design. ECE 152A Winter 2012
Karnaugh Maps & Combinational Logic Design ECE 52A Winter 22 Reading Assignment Brown and Vranesic 4 Optimized Implementation of Logic Functions 4. Karnaugh Map 4.2 Strategy for Minimization 4.2. Terminology
More informationElementary Logic Gates
Elementary Logic Gates Name Symbol Inverter (NOT Gate) ND Gate OR Gate Truth Table Logic Equation = = = = = + C. E. Stroud Combinational Logic Design (/6) Other Elementary Logic Gates NND Gate NOR Gate
More informationLecture 8: Synchronous Digital Systems
Lecture 8: Synchronous Digital Systems The distinguishing feature of a synchronous digital system is that the circuit only changes in response to a system clock. For example, consider the edge triggered
More informationGates. J. Robert Jump Department of Electrical And Computer Engineering Rice University Houston, TX 77251
Gates J. Robert Jump Department of Electrical And Computer Engineering Rice University Houston, T 77251 1. The Evolution of Electronic Digital Devices...1 2. Logical Operations and the Behavior of Gates...2
More informationDecimal Number (base 10) Binary Number (base 2)
LECTURE 5. BINARY COUNTER Before starting with counters there is some vital information that needs to be understood. The most important is the fact that since the outputs of a digital chip can only be
More informationSo far we have investigated combinational logic for which the output of the logic devices/circuits depends only on the present state of the inputs.
equential Logic o far we have investigated combinational logic for which the output of the logic devices/circuits depends only on the present state of the inputs. In sequential logic the output of the
More informationMixed Logic A B A B. 1. Ignore all bubbles on logic gates and inverters. This means
Mixed Logic Introduction Mixed logic is a gate-level design methodology used in industry. It allows a digital logic circuit designer the functional description of the circuit from its physical implementation.
More informationMULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the question.
CHAPTER3 QUESTIONS MULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the question. ) If one input of an AND gate is LOW while the other is a clock signal, the output
More informationChapter 2: Boolean Algebra and Logic Gates. Boolean Algebra
The Universit Of Alabama in Huntsville Computer Science Chapter 2: Boolean Algebra and Logic Gates The Universit Of Alabama in Huntsville Computer Science Boolean Algebra The algebraic sstem usuall used
More informationCSE140: Midterm 1 Solution and Rubric
CSE140: Midterm 1 Solution and Rubric April 23, 2014 1 Short Answers 1.1 True or (6pts) 1. A maxterm must include all input variables (1pt) True 2. A canonical product of sums is a product of minterms
More informationHaving read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop.
Objectives Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop. describe how such a flip-flop can be SET and RESET. describe the disadvantage
More informationCSE140 Homework #7 - Solution
CSE140 Spring2013 CSE140 Homework #7 - Solution You must SHOW ALL STEPS for obtaining the solution. Reporting the correct answer, without showing the work performed at each step will result in getting
More information2.0 Chapter Overview. 2.1 Boolean Algebra
Thi d t t d ith F M k 4 0 2 Boolean Algebra Chapter Two Logic circuits are the basis for modern digital computer systems. To appreciate how computer systems operate you will need to understand digital
More informationCSEE 3827: Fundamentals of Computer Systems. Standard Forms and Simplification with Karnaugh Maps
CSEE 3827: Fundamentals of Computer Systems Standard Forms and Simplification with Karnaugh Maps Agenda (M&K 2.3-2.5) Standard Forms Product-of-Sums (PoS) Sum-of-Products (SoP) converting between Min-terms
More informationSEQUENTIAL CIRCUITS. Block diagram. Flip Flop. S-R Flip Flop. Block Diagram. Circuit Diagram
SEQUENTIAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/sequential_circuits.htm Copyright tutorialspoint.com The combinational circuit does not use any memory. Hence the previous
More informationChapter 19 Operational Amplifiers
Chapter 19 Operational Amplifiers The operational amplifier, or op-amp, is a basic building block of modern electronics. Op-amps date back to the early days of vacuum tubes, but they only became common
More information6 3 4 9 = 6 10 + 3 10 + 4 10 + 9 10
Lesson The Binary Number System. Why Binary? The number system that you are familiar with, that you use every day, is the decimal number system, also commonly referred to as the base- system. When you
More informationCHAPTER 3 Boolean Algebra and Digital Logic
CHAPTER 3 Boolean Algebra and Digital Logic 3.1 Introduction 121 3.2 Boolean Algebra 122 3.2.1 Boolean Expressions 123 3.2.2 Boolean Identities 124 3.2.3 Simplification of Boolean Expressions 126 3.2.4
More informationModule 3: Floyd, Digital Fundamental
Module 3: Lecturer : Yongsheng Gao Room : Tech - 3.25 Email : yongsheng.gao@griffith.edu.au Structure : 6 lectures 1 Tutorial Assessment: 1 Laboratory (5%) 1 Test (20%) Textbook : Floyd, Digital Fundamental
More informationLogic Reference Guide
Logic eference Guide Advanced Micro evices INTOUCTION Throughout this data book and design guide we have assumed that you have a good working knowledge of logic. Unfortunately, there always comes a time
More informationGates & Boolean Algebra. Boolean Operators. Combinational Logic. Introduction
Introduction Gates & Boolean lgebra Boolean algebra: named after mathematician George Boole (85 864). 2-valued algebra. digital circuit can have one of 2 values. Signal between and volt =, between 4 and
More informationChapter 2 Logic Gates and Introduction to Computer Architecture
Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are
More informationDESIGN OF GATE NETWORKS
DESIGN OF GATE NETWORKS DESIGN OF TWO-LEVEL NETWORKS: and-or and or-and NETWORKS MINIMAL TWO-LEVEL NETWORKS KARNAUGH MAPS MINIMIZATION PROCEDURE AND TOOLS LIMITATIONS OF TWO-LEVEL NETWORKS DESIGN OF TWO-LEVEL
More information3.Basic Gate Combinations
3.Basic Gate Combinations 3.1 TTL NAND Gate In logic circuits transistors play the role of switches. For those in the TTL gate the conducting state (on) occurs when the baseemmiter signal is high, and
More informationDigital Electronics Part I Combinational and Sequential Logic. Dr. I. J. Wassell
Digital Electronics Part I Combinational and Sequential Logic Dr. I. J. Wassell Introduction Aims To familiarise students with Combinational logic circuits Sequential logic circuits How digital logic gates
More informationMechanics 1: Conservation of Energy and Momentum
Mechanics : Conservation of Energy and Momentum If a certain quantity associated with a system does not change in time. We say that it is conserved, and the system possesses a conservation law. Conservation
More informationDigital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng
Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction
More informationCounters and Decoders
Physics 3330 Experiment #10 Fall 1999 Purpose Counters and Decoders In this experiment, you will design and construct a 4-bit ripple-through decade counter with a decimal read-out display. Such a counter
More informationDigital Logic Elements, Clock, and Memory Elements
Physics 333 Experiment #9 Fall 999 Digital Logic Elements, Clock, and Memory Elements Purpose This experiment introduces the fundamental circuit elements of digital electronics. These include a basic set
More informationNEW adder cells are useful for designing larger circuits despite increase in transistor count by four per cell.
CHAPTER 4 THE ADDER The adder is one of the most critical components of a processor, as it is used in the Arithmetic Logic Unit (ALU), in the floating-point unit and for address generation in case of cache
More informationC H A P T E R. Logic Circuits
C H A P T E R Logic Circuits Many important functions are naturally computed with straight-line programs, programs without loops or branches. Such computations are conveniently described with circuits,
More informationRow Echelon Form and Reduced Row Echelon Form
These notes closely follow the presentation of the material given in David C Lay s textbook Linear Algebra and its Applications (3rd edition) These notes are intended primarily for in-class presentation
More informationMemory Systems. Static Random Access Memory (SRAM) Cell
Memory Systems This chapter begins the discussion of memory systems from the implementation of a single bit. The architecture of memory chips is then constructed using arrays of bit implementations coupled
More informationSwitching Algebra and Logic Gates
Chapter 2 Switching Algebra and Logic Gates The word algebra in the title of this chapter should alert you that more mathematics is coming. No doubt, some of you are itching to get on with digital design
More informationELEC 2210 - EXPERIMENT 1 Basic Digital Logic Circuits
Objectives ELEC - EXPERIMENT Basic Digital Logic Circuits The experiments in this laboratory exercise will provide an introduction to digital electronic circuits. You will learn how to use the IDL-00 Bit
More informationUpon completion of unit 1.1, students will be able to
Upon completion of unit 1.1, students will be able to 1. Demonstrate safety of the individual, class, and overall environment of the classroom/laboratory, and understand that electricity, even at the nominal
More information1. Give the 16 bit signed (twos complement) representation of the following decimal numbers, and convert to hexadecimal:
Exercises 1 - number representations Questions 1. Give the 16 bit signed (twos complement) representation of the following decimal numbers, and convert to hexadecimal: (a) 3012 (b) - 435 2. For each of
More informationCOMBINATIONAL CIRCUITS
COMBINATIONAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/combinational_circuits.htm Copyright tutorialspoint.com Combinational circuit is a circuit in which we combine the different
More informationCircuit Analysis using the Node and Mesh Methods
Circuit Analysis using the Node and Mesh Methods We have seen that using Kirchhoff s laws and Ohm s law we can analyze any circuit to determine the operating conditions (the currents and voltages). The
More informationProgramming Logic controllers
Programming Logic controllers Programmable Logic Controller (PLC) is a microprocessor based system that uses programmable memory to store instructions and implement functions such as logic, sequencing,
More informationHere we introduced (1) basic circuit for logic and (2)recent nano-devices, and presented (3) some practical issues on nano-devices.
Outline Here we introduced () basic circuit for logic and (2)recent nano-devices, and presented (3) some practical issues on nano-devices. Circuit Logic Gate A logic gate is an elemantary building block
More informationSection 1.4 Place Value Systems of Numeration in Other Bases
Section.4 Place Value Systems of Numeration in Other Bases Other Bases The Hindu-Arabic system that is used in most of the world today is a positional value system with a base of ten. The simplest reason
More informationUnderstanding Logic Design
Understanding Logic Design ppendix of your Textbook does not have the needed background information. This document supplements it. When you write add DD R0, R1, R2, you imagine something like this: R1
More informationCHAPTER 2. Logic. 1. Logic Definitions. Notation: Variables are used to represent propositions. The most common variables used are p, q, and r.
CHAPTER 2 Logic 1. Logic Definitions 1.1. Propositions. Definition 1.1.1. A proposition is a declarative sentence that is either true (denoted either T or 1) or false (denoted either F or 0). Notation:
More informationTwo's Complement Adder/Subtractor Lab L03
Two's Complement Adder/Subtractor Lab L03 Introduction Computers are usually designed to perform indirect subtraction instead of direct subtraction. Adding -B to A is equivalent to subtracting B from A,
More informationSchool of Engineering Department of Electrical and Computer Engineering
1 School of Engineering Department of Electrical and Computer Engineering 332:223 Principles of Electrical Engineering I Laboratory Experiment #4 Title: Operational Amplifiers 1 Introduction Objectives
More informationLab 1: Full Adder 0.0
Lab 1: Full Adder 0.0 Introduction In this lab you will design a simple digital circuit called a full adder. You will then use logic gates to draw a schematic for the circuit. Finally, you will verify
More informationHandout #1: Mathematical Reasoning
Math 101 Rumbos Spring 2010 1 Handout #1: Mathematical Reasoning 1 Propositional Logic A proposition is a mathematical statement that it is either true or false; that is, a statement whose certainty or
More informationBoolean Algebra Part 1
Boolean Algebra Part 1 Page 1 Boolean Algebra Objectives Understand Basic Boolean Algebra Relate Boolean Algebra to Logic Networks Prove Laws using Truth Tables Understand and Use First Basic Theorems
More informationFigure 8-1 Four Possible Results of Adding Two Bits
CHPTER EIGHT Combinational Logic pplications Thus far, our discussion has focused on the theoretical design issues of computer systems. We have not yet addressed any of the actual hardware you might find
More informationCombinational Logic Design
Chapter 4 Combinational Logic Design The foundations for the design of digital logic circuits were established in the preceding chapters. The elements of Boolean algebra (two-element switching algebra
More information2 SYSTEM DESCRIPTION TECHNIQUES
2 SYSTEM DESCRIPTION TECHNIQUES 2.1 INTRODUCTION Graphical representation of any process is always better and more meaningful than its representation in words. Moreover, it is very difficult to arrange
More informationRead-only memory Implementing logic with ROM Programmable logic devices Implementing logic with PLDs Static hazards
Points ddressed in this Lecture Lecture 8: ROM Programmable Logic Devices Professor Peter Cheung Department of EEE, Imperial College London Read-only memory Implementing logic with ROM Programmable logic
More informationToday s topics. Digital Computers. More on binary. Binary Digits (Bits)
Today s topics! Binary Numbers! Brookshear.-.! Slides from Prof. Marti Hearst of UC Berkeley SIMS! Upcoming! Networks Interactive Introduction to Graph Theory http://www.utm.edu/cgi-bin/caldwell/tutor/departments/math/graph/intro
More informationExperiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa
Experiment # 9 Clock generator circuits & Counters Eng. Waleed Y. Mousa 1. Objectives: 1. Understanding the principles and construction of Clock generator. 2. To be familiar with clock pulse generation
More informationDIGITAL-TO-ANALOGUE AND ANALOGUE-TO-DIGITAL CONVERSION
DIGITAL-TO-ANALOGUE AND ANALOGUE-TO-DIGITAL CONVERSION Introduction The outputs from sensors and communications receivers are analogue signals that have continuously varying amplitudes. In many systems
More informationToday. Binary addition Representing negative numbers. Andrew H. Fagg: Embedded Real- Time Systems: Binary Arithmetic
Today Binary addition Representing negative numbers 2 Binary Addition Consider the following binary numbers: 0 0 1 0 0 1 1 0 0 0 1 0 1 0 1 1 How do we add these numbers? 3 Binary Addition 0 0 1 0 0 1 1
More informationUnit/Standard Number. High School Graduation Years 2010, 2011 and 2012
1 Secondary Task List 100 SAFETY 101 Demonstrate an understanding of State and School safety regulations. 102 Practice safety techniques for electronics work. 103 Demonstrate an understanding of proper
More informationMultiplexers Two Types + Verilog
Multiplexers Two Types + Verilog ENEE 245: Digital Circuits and ystems Laboratory Lab 7 Objectives The objectives of this laboratory are the following: To become familiar with continuous ments and procedural
More informationUsing Logic to Design Computer Components
CHAPTER 13 Using Logic to Design Computer Components Parallel and sequential operation In this chapter we shall see that the propositional logic studied in the previous chapter can be used to design digital
More informationDIGITAL COUNTERS. Q B Q A = 00 initially. Q B Q A = 01 after the first clock pulse.
DIGITAL COUNTERS http://www.tutorialspoint.com/computer_logical_organization/digital_counters.htm Copyright tutorialspoint.com Counter is a sequential circuit. A digital circuit which is used for a counting
More informationBasic Electronics Prof. Dr. Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati
Basic Electronics Prof. Dr. Chitralekha Mahanta Department of Electronics and Communication Engineering Indian Institute of Technology, Guwahati Module: 2 Bipolar Junction Transistors Lecture-2 Transistor
More informationFORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. The Binary Adder
FORDHAM UNIVERITY CIC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. cience pring, 2011 1 Introduction The Binar Adder The binar adder circuit is an important building
More informationCURVE FITTING LEAST SQUARES APPROXIMATION
CURVE FITTING LEAST SQUARES APPROXIMATION Data analysis and curve fitting: Imagine that we are studying a physical system involving two quantities: x and y Also suppose that we expect a linear relationship
More informationDEPARTMENT OF INFORMATION TECHNLOGY
DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF INFORMATION TECHNLOGY Lab Manual for Computer Organization Lab ECS-453
More informationOperational Amplifier - IC 741
Operational Amplifier - IC 741 Tabish December 2005 Aim: To study the working of an 741 operational amplifier by conducting the following experiments: (a) Input bias current measurement (b) Input offset
More informationCOMP 250 Fall 2012 lecture 2 binary representations Sept. 11, 2012
Binary numbers The reason humans represent numbers using decimal (the ten digits from 0,1,... 9) is that we have ten fingers. There is no other reason than that. There is nothing special otherwise about
More informationFlip-Flops, Registers, Counters, and a Simple Processor
June 8, 22 5:56 vra235_ch7 Sheet number Page number 349 black chapter 7 Flip-Flops, Registers, Counters, and a Simple Processor 7. Ng f3, h7 h6 349 June 8, 22 5:56 vra235_ch7 Sheet number 2 Page number
More informationSolving Rational Equations
Lesson M Lesson : Student Outcomes Students solve rational equations, monitoring for the creation of extraneous solutions. Lesson Notes In the preceding lessons, students learned to add, subtract, multiply,
More informationCOMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design
PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits
More informationChapter 3. Cartesian Products and Relations. 3.1 Cartesian Products
Chapter 3 Cartesian Products and Relations The material in this chapter is the first real encounter with abstraction. Relations are very general thing they are a special type of subset. After introducing
More informationCSE140: Components and Design Techniques for Digital Systems
CSE4: Components and Design Techniques for Digital Systems Tajana Simunic Rosing What we covered thus far: Number representations Logic gates Boolean algebra Introduction to CMOS HW#2 due, HW#3 assigned
More informationLecture #21 April 2, 2004 Relays and Adder/Subtractors
Lecture #21 April 2, 2004 Relays and Adder/Subtractors In this lecture we look at a real technology for implementing gate circuits, as well as a more-or-less complete design for a general purpose adder/subtractor
More informationChapter 10 Advanced CMOS Circuits
Transmission Gates Chapter 10 Advanced CMOS Circuits NMOS Transmission Gate The active pull-up inverter circuit leads one to thinking about alternate uses of NMOS devices. Consider the circuit shown in
More informationLecture 5: Gate Logic Logic Optimization
Lecture 5: Gate Logic Logic Optimization MAH, AEN EE271 Lecture 5 1 Overview Reading McCluskey, Logic Design Principles- or any text in boolean algebra Introduction We could design at the level of irsim
More informationChapter 1. Computation theory
Chapter 1. Computation theory In this chapter we will describe computation logic for the machines. This topic is a wide interdisciplinary field, so that the students can work in an interdisciplinary context.
More informationexclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576
exclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576 Outline exclusive OR gate (XOR) Definition Properties Examples of Applications Odd Function Parity Generation and Checking
More informationNUMBER SYSTEMS. William Stallings
NUMBER SYSTEMS William Stallings The Decimal System... The Binary System...3 Converting between Binary and Decimal...3 Integers...4 Fractions...5 Hexadecimal Notation...6 This document available at WilliamStallings.com/StudentSupport.html
More informationChapter 7 Memory and Programmable Logic
NCNU_2013_DD_7_1 Chapter 7 Memory and Programmable Logic 71I 7.1 Introduction ti 7.2 Random Access Memory 7.3 Memory Decoding 7.5 Read Only Memory 7.6 Programmable Logic Array 77P 7.7 Programmable Array
More informationMathematical Induction
Mathematical Induction In logic, we often want to prove that every member of an infinite set has some feature. E.g., we would like to show: N 1 : is a number 1 : has the feature Φ ( x)(n 1 x! 1 x) How
More informationLecture 4: Binary. CS442: Great Insights in Computer Science Michael L. Littman, Spring 2006. I-Before-E, Continued
Lecture 4: Binary CS442: Great Insights in Computer Science Michael L. Littman, Spring 26 I-Before-E, Continued There are two ideas from last time that I d like to flesh out a bit more. This time, let
More informationThis is a square root. The number under the radical is 9. (An asterisk * means multiply.)
Page of Review of Radical Expressions and Equations Skills involving radicals can be divided into the following groups: Evaluate square roots or higher order roots. Simplify radical expressions. Rationalize
More informationStatCrunch and Nonparametric Statistics
StatCrunch and Nonparametric Statistics You can use StatCrunch to calculate the values of nonparametric statistics. It may not be obvious how to enter the data in StatCrunch for various data sets that
More informationChapter 1: Digital Systems and Binary Numbers
Chapter 1: Digital Systems and Binary Numbers Digital age and information age Digital computers general purposes many scientific, industrial and commercial applications Digital systems telephone switching
More informationCircuits and Boolean Expressions
Circuits and Boolean Expressions Provided by TryEngineering - Lesson Focus Boolean logic is essential to understanding computer architecture. It is also useful in program construction and Artificial Intelligence.
More informationPhiladelphia University Faculty of Information Technology Department of Computer Science ----- Semester, 2007/2008.
Philadelphia University Faculty of Information Technology Department of Computer Science ----- Semester, 2007/2008 Course Syllabus Course Title: Computer Logic Design Course Level: 1 Lecture Time: Course
More informationBinary Numbers. Binary Octal Hexadecimal
Binary Numbers Binary Octal Hexadecimal Binary Numbers COUNTING SYSTEMS UNLIMITED... Since you have been using the 10 different digits 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9 all your life, you may wonder how
More information