SP721 Series 3pF 4kV Diode Array

Transcription

1 General Purpose ESD Protection - SP7 Series SP7 Series 3pF kv Diode rray RoHS Pb GREEN Description The SP7 is an array of SR/Diode bipolar structures for ESD and over-voltage protection to sensitive input circuits. The SP7 has protection SR/Diode device structures per input. There are a total of 6 available inputs that can be used to protect up to 6 external signal or bus lines. Overvoltage protection is from the (Pins - 3 and Pins 5-7) to V+ or. Pinout The SR structures are designed for fast triggering at a threshold of one +V BE diode threshold above V+ (Pin 8) or a -V BE diode threshold below (Pin ). From an input, a clamp to V+ is activated if a transient pulse causes the input to be increased to a voltage level greater than one V BE above V+. similar clamp to is activated if a negative pulse, one V BE less than, is applied to an input. Standard ESD Human Body Model (HBM) apability is: 8 V+ SP7 (PDIP, SOI) TOP VIEW Features ESD Interface apability for HBM Standards 5 - MIL STD kV - IE , Direct Discharge, - Single Input... kv (Level ) Functional Block Diagram - Two Inputs in Parallel... 8kV (Level ) V+ 8 - IE , ir Discharge...5kV (Level ) High Peak urrent apability - IE (8/0µs)... ±3 - Single Pulse, 00µs Pulse Width... ± 3, Single Pulse, µs Pulse Width... ±5 Designed to Provide Over-Voltage Protection - Single-Ended Voltage Range to V - Differential Voltage Range to... ±5V Fast Switching...ns Rise Time Low Input Leakages...n at 5º Typical Low Input apacitance...3pf Typical n rray of 6 SR/Diode Pairs Operating Temperature Range...-0º to 05º dditional Information pplications Datasheet Resources Samples Microprocessor/Logic Input Protection Data Bus Protection nalog Device Input Protection Voltage lamp

2 General Purpose ESD Protection - SP7 Series bsolute Maximum Ratings Parameter Rating Units ontinuous Supply Voltage, (V+) - () +35 V Forward Peak urrent, I to V, I to GND (Refer to Figure 5) ±, 00µs UTION: Stresses above those listed in bsolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is implied. Note: ESD Ratings and apability (Figure, Table ) Load Dump and Reverse Battery (Note ) Thermal Information Parameter Rating Units Thermal Resistance (Typical, Note ) θ J o /W PDIP Package 60 o /W SOI Package 70 o /W Maximum Storage Temperature Range -65 to 50 o Maximum Junction Temperature (Plastic Package) 50 o Maximum Lead Temperature (Soldering 0-0s)(SOI Lead Tips Only) 60 o. θ J is measured with the component mounted on an evaluation P board in free air. Electrical haracteristics T = -0 o to 05 o, V = 0.5V, Unless Otherwise Specified Parameter Symbol Test onditions Min Typ Max Units Operating Voltage Range, V SUPPLY - to 30 - V V SUPPLY = [(V+) - ()] Forward Voltage Drop to V FWDL I = (Peak Pulse) - - V to V+ V FWDH - - V Input Leakage urrent I n Quiescent Supply urrent I QUIESENT n Equivalent SR ON Threshold Note V Equivalent SR ON Resistance V FWD /I FWD ; Note Ω Input apacitance pf Input Switching Speed t ON - - ns Notes:. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and reverse battery. When the V+ and Pins are connected to het same supply voltage source as the device or control line under protection, a current limiti ng resistor should be connected in series between the external supply and the SP7 supply pins to limit reverse battery current to within the rated maximum limits. Bypass capacitors of typically 0.0µF or larger romf the V+ and Pins to ground are recommended. 3. Refer to the Figure 3 graph for definitions of equivalent SR ON Threshold and SR ON Resistance. These characteristics are given here for thumb-rule nformation to determine peak current and dissipation under EOS conditions. Typical pplication of the SP7 (pplication as an Input lamp for Over-voltage, Greater than V BE bove V+ or less than -V BE below ) +V +V PUT DRIVERS OR SIGNL SOURES LER OR DIGITL I TERFE TO +V V+ SP7 SP7 PUT PROTETION IRUIT ( OF 6 SHO WN) FIGURE. TYPIL PPLITION OF THE SP7 S N PUT LMP FOR OVER-VOLTGE, GRETER THN V BE BOVE V+ OR LESS THN -V BE BELOW

3 General Purpose ESD Protection - SP7 Series ESD apability ESD capability is dependent on the application and defined test standard.the evaluation results for various test standards and methods based on Figure are shown in Table. For the Modified MIL-STD condition that is defined as an in-circuit method of ESD testing, the V+ and pins have a return path to ground and the SP7 ESD capability is typically greater than 5kV from 00pF through.5kω.by strict definition of MIL-STD using pin-to-pin device testing, the ESD voltage capability is greater than 6kV.The MIL-STD results were determined from T&T ESD Test Lab measurements. The HBM capability to the IE standard is greater than 5kV for air discharge (Level ) and greater than kv for direct discharge (Level ).Dual pin capability ( adjacent pins in parallel) is well in excess of 8kV (Level ). For ESD testing of the SP7 to EIJ I Machine Model (MM) standard, the results are typically better than kv from 00pF with no series resistance. Figure : Electrostatic Discharge Test H.V. SUPPLY V D HRGE SWITH R Standard Type/Mode R D D ±V D Modified HBM.5kΩ 00pF 5kV MIL STD Standard HBM.5kΩ 00pF 6kV HBM, ir Discharge 330Ω 50pF 5kV IE HBM, Direct Discharge 330Ω 50pF kv HBM, Direct Discharge, Two Parallel Input Pins 330Ω 50pF 8kV EIJ I Machine Model 0kΩ 00pF kv D R D IE 000--: R 50 to 00M MIL-STD-305.7: R to 0M Table : ESD Test onditions DISHRGE SWITH DUT Figure : Low urrent SR Forward Voltage Drop urve Figure 3: High urrent SR Forward Voltage Drop urve FORWRD SR URRENT (m) FORWRD SR URRENT (m) 00 T = 5º T = 5º SGLE PULSE SGLE PULSE FORWRD SR URRENT () FORWRD SR URRENT ().5 T = 5º T = 5º SGLE PULSE SGLE PULSE.5 EQUIV. ST. EQUIV. ON ST. ON 0.5 THRESHOLD THRESHOLD ~.V ~.V V FWD IFWD V FWD IFWD FORWRD FORWRD SR VOLTGE SR VOLTGE DROP (mv) DROP (mv) FORWRD FORWRD ST VOLTGE ST VOLTGE DROP (V) DROP (V)

4 General Purpose ESD Protection - SP7 Series Peak Transient urrent apability of the SP7 The peak transient current capability rises sharply as the width of the current pulse narrows. Destructive testing was done to fully evaluate the SP7 s ability to withstand a wide range of peak current pulses vs time. The circuit used to generate current pulses is shown in Figure. The test circuit of Figure is shown with a positive pulse input. For a negative pulse input, the (-) current pulse input goes to an SP7 input pin and the (+) current pulse input goes to the SP7 pin. The V+ to supply of the SP7 must be allowed to float. (i.e., It is tied to the ground reference of the current pulse generator.) Figure 5 shows the point of overstress as defined by increased leakage in excess of the data sheet published limits. The maximum peak input current capability is dependent on the ambient temperature, improving as the temperature is reduced. Peak current curves are shown for ambient temperatures of 5º and 05º and a 5V power supply condition. The safe operating range of the transient peak current should be limited to no more than 75% of the measured overstress level for any given pulse width as shown in the curves of Figure 5. Note that adjacent input pins of the SP7 may be paralleled to improve current (and ESD) capability. The sustained peak current capability is increased to nearly twice that of a single pin. PEK URRENT () Figure : Typical SP7 Peak urrent Test ircuit with a Variable Pulse Width Input + V X - R VOLTGE PROBE R ~ 0 TYPIL V X DJ. 0V/ TYPIL ~ 00 µf (+) VRIBLE TIME DURTION URRENT PULSE GENERTOR URRENT SENSE (-) 3 V+ 8 SP Figure 5: FIGURE SP7 5. Typical TYPIL SP7 Single PEK URRENT Peak urrent TEST IRUIT Pulse WITH VRIBLE PULSE WIDTH PUT apability Showing the Measured Point of Overstress in mperes vs pulse width time in milliseconds T = 05 T = 5 UTION: SFE OPERTG ONDITIONS LIMIT THE MXIMUM PEK URRENT FOR GIVEN PULSE WIDTH TO BE NO GRETER THN 75% OF THE VLUES SHOWN ON EH URVE. V+ TO SUPPLY = 5V PULSE WIDTH TIME (ms)

5 Temperature TVS Diode rrays (SP Diodes) General Purpose ESD Protection - SP7 Series Soldering Parameters Reflow ondition - Temperature Min (T s(min) ) 50 Pb Free assembly T P Ramp-up t P ritical Zone TL to TP Pre Heat - Temperature Max (T s(max) ) 00 - Time (min to max) (t s ) secs verage ramp up rate (Liquidus) Temp (T L ) to peak T S(max) to T L - Ramp-up Rate 5 /second max 5 /second max T L T S(max) T S(min) t S Preheat t L Ramp-down Reflow - Temperature (T L ) (Liquidus) 7 - Temperature (t L ) seconds 5 time to peak temperature Time Peak Temperature (T P ) 60 +0/-5 Time within 5 of actual peak Temperature (t p ) 0 0 seconds Ramp-down Rate 5 /second max Time 5 to peak Temperature (T P ) 8 minutes Max. Do exceed 60 Package Dimensions Dual-In-Line Plastic Packages (PDIP) DEX RE BSE PLNE SETG PLNE D B N 3 N/ B D E -B- D e e 0.00 (0.5) M B S Notes: NOTES:. ontrolling. ontrolling Dimensions: Dimensions: H. In H. case of In conflict case of between conflict English between and Metric dimensions, English the and inch Metric dimensions dimensions, control. the inch dimensions control.. Dimensioning. Dimensioning and tolerancing and tolerancing per NSI Y.5M-98. per NSI Y.5M Symbols 3. Symbols are defined are in defined the MO in the Series MO Symbol Series List Symbol in Section List in. Section of Publication No of Publication No Dimensions. Dimensions, and, L are and measured L are measured with the package with the seated package in JEDE seated seating plane gauge GS-3. in JEDE seating plane gauge GS D, D, and E dimensions do include mold flash or protrusions. Mold flash or 5. D, D, and E dimensions do include mold flash or protrusions. Mold flash or protrusions shall exceed 0.00 inch protrusions shall exceed 0.00 inch (0.5mm). 6. E and e(0.5mm). are measured with the leads constrained to be perpendicular to datum e B and 6. ee are andmeasured e are at measured the lead tips with with the the leads leads constrained unconstrained. to be eper- pendicular to datum --. must be zero or greater. 8. B maximum dimensions do include dambar protrusions. Dambar protrusions shall 7. e B and e are measured at the lead tips with the leads unconstrained. e must be zero or greater. exceed 0.00 inch (0.5mm). 9. N is t he maximum number of terminal positions. 8. B maximum dimensions do include dambar protrusions. 0. orner leads Dambar (, N, protrusions N/ and N/ shall + ) for exceed E8.3, E6.3, 0.00 E8.3, inch (0.5mm). E8.3, E.6 will have a B dimension of inch ( mm). 9. N is the maximum number of terminal positions. 0. orner leads (, N, N/ and N/ + ) for E8.3, E6.3, E8.3, E8.3, E.6 will have a B dimension of inch ( mm). L E L e e B Package Pins JEDE PDIP 8 Lead Dual-in-Line MS-00 Millimeters Inches Min Max Min Max Notes B B , D D E E e.5 BS 0.00 BS - e 7.6 BS BS 6 e B L N 8 8 9

6 General Purpose ESD Protection - SP7 Series Package Dimensions Small Outline Plastic Packages (SOI) N DEX RE 3 e D B 0.5(0.00) M -- Notes:. Symbols are defined in the MO Series Symbol List in Section. of Publication Number NOTES: 95.. Dimensioning. Symbols and are tolerancing defined in per the NSI MO Y.5M-98. Series Symbol List in Section. of Publication Number Dimension D does include mold flash, protrusions or gate burrs. Mold flash, protrusion. Dimensioning and gate burrs and shall tolerancing exceed per 0.5mm NSI Y.5M-98. (0.006 inch) per side.. Dimension 3. Dimension E does D does include interlead include mold flash flash, or protrusions. protrusions Inter-lead or gate burrs. flash and protrusions Mold shall flash, protrusion exceed 0.5mm and gate (0.00 burrs inch) shall per side. exceed 0.5mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is present, a visual index feature must be located. within Dimension the crosshatched E does area. include interlead flash or protrusions. Interlead flash and protrusions shall exceed 0.5mm (0.00 inch) per 6. L is the side. length of terminal for soldering to a substrate. 7. N is 5. the The number chamfer of terminal on the body positions. is optional. If it is present, a visual index 8. Terminal numbers feature must are shown be located for reference within the only. crosshatched area. 9. The lead 6. width L is the B, length as measured of terminal 0.36mm for soldering (0.0 inch) to a substrate. or greater above the seating plane, 7. shall N is the exceed number a maximum of terminal value positions. of 0.6mm (0.0 inch). 0. ontrolling 8. Terminal dimension: numbers MILLIMETER. are shown onverted for reference inch only. dimensions are necessarily exact. 9. The lead width B, as measured 0.36mm (0.0 inch) or greater above the seating plane, shall exceed a maximum value of 0.6mm (0.0 inch). 0. ontrolling dimension:millimeter. onverted inch dimensions Part Numbering are necessarily System exact. TVS Diode rrays (SP Diodes) Series M E -B- -- SETG PLNE B S H 0.5(0.00) M B SP 7 ** ** μ 0.0(0.00) L M h x 5 o G = Green P = Lead Free TG= Tape and Reel Package B = 8 Ld SOI P = 8 Ld PDIP Package SOI Pins 8 JEDE MS-0 Millimeters Inches Min Max Min Max Notes B D E e.7 BS BS - H h L N µ 0º 8º 0º 8º - Product haracteristics Lead Plating Matte Tin Lead Material opper lloy Lead oplanarity 0.00 inches (0.0mm) Substitute Material Silicon Body Material Molded Epoxy Flammability UL 9 0 Ordering Information Part Number Temp. Range (º) Package Environmental Informaton Marking Min. Order SP7PP -0 to 05 8 Ld PDIP Lead-free SP7P(P) 000 SP7BG -0 to 05 8 Ld SOI Green SP7(B)G 960 SP7BTG -0 to 05 8 Ld SOI Tape and Reel Green SP7(B)G 500 Notes:. SP7P(P) means device marking either SP7P or SP7PP.. SP7(B)G means device marking either SP7G or SP7BG which are good for types SP7BG and SP7BTG.