CA3089. FM IF System. Features. Part Number Information. Pinouts. Data Sheet October 2002 FN Description

Transcription

1 OBSOLETE PRODUT NO REOMMENDED REPLEMENT Data Sheet October 00 0 FN. FM IF System Description Intersil 0 is a monolithic integrated circuit that provides all the functions of a comprehensive FM-IF system. The block diagram shows the 0 features, which include a three-stage FM-IF amplifier/limiter configuration with level detectors for each stage, a doubly-balanced quadrature FM detector and an audio amplifier that features the optional use of a muting (squelch) circuit. The advanced circuit design of the IF system includes desirable deluxe features such as delayed G for the RF tuner, and F drive circuit, and an output signal to drive a tuning meter and/or provide stereo switching logic. In addition, internal power supply regulators maintain a nearly constant current drain over the voltage supply range of +.V to +V. The 0 is ideal for high-fidelity operation. Distortion in a 0 FM-IF System is primarily a function of the phase linearity characteristic of the outboard detector coil. Part Number Information PRT NUMBER TEMP. RNGE ( o ) PKGE PKG. NO. Features. For FM IF mplifier pplications in High-Fidelity, utomotive, and ommunications Receivers Includes: IF mplifier, Quadrature Detector, F Preamplifier, and Specific ircuits for G, F, Muting (Squelch), and Tuning Meter Exceptional Limiting Sensitivity at -db Point µv (Typ) Low Distortion: (with Double-Tuned oil) % (Typ) Single-oil Tuning apability High Recovered udio mV (Typ) Provides Specific Signal for ontrol of Interchannel Muting (Squelch) Provides Specific Signal for Direct Drive of a Tuning Meter Provides Delayed G Voltage for RF mplifier Provides a Specific ircuit for Flexible F Internal Supply-Voltage Regulators 0E -0 to Ld PDIP E. 0M (0M) -0 to 0 Ld SOI M0. Pinouts 0 (PDIP) TOP VIEW 0 (SOI) TOP VIEW IF IN BYPSS D FB BYPSS N DELYED G SUBSTRTE (GND) GND IF IN BYPSS D FB BYPSS 0 GND DELYED G GND SUBSTRTE (GND) FRME GND TUNING METER FRME GND TUNING METER MUTE ONTROL MUTE LOGI MUTE ONTROL MUTE LOGI F IF 0 REF BIS QUDRTURE F IF GND 0 REF BIS QUDRTURE N UTION: These devices are sensitive to electrostatic discharge; follow proper I Handling Procedures. --INTERSIL or -- Intersil (and design) is a registered trademark of Intersil mericas Inc. opyright Intersil mericas Inc. 00. ll Rights Reserved ll other trademarks mentioned are the property of their respective owners.

2 0 bsolute Maximum Ratings Supply Voltage Between and Frame GND V Between and Substrate GND V D urrent (Out of Delayed G) m Operating onditions Temperature Range o to o Thermal Information Thermal Resistance (Typical, Note ) θ J ( o /W) PDIP Package SOI Package Maximum Junction Temperature (Plastic Package) o Maximum Storage Temperature Range o to 0 o Maximum Lead Temperature (Soldering 0s) o (SOI - Lead Tips Only) UTION: Stresses above those listed in bsolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. θ J is measured with the component mounted on an evaluation P board in free air. Electrical Specifications = V (See Figures and ) (NOTE ) PRMETER D HRTERISTIS TEST ONDITIONS TEMP. ( o ) MIN TYP MX UNITS Quiescent ircuit urrent No signal input, Non muted 0 m D Voltages Terminal (IF Input)... V Terminal ( Return to Input)... V Terminal (D Bias to Input)... V Terminal (udio Output).0..0 V Terminal 0 (D Reference).0..0 V DYNMI HRTERISTIS Input Limiting Voltage (-db point), V (lim) - f O = 0.MHz, - µv M Rejection (Terminal ), MR V f MOD = 00Hz, IN = 0.V, M Mod. = 0% Deviation = ±khz - db Recovered F Voltage (Terminal ) V O (F) V IN = 0.V mv Total Harmonic Single Tuned (Terminal ) % Distortion, THD (Note ) Double Tuned (Terminal ) % Signal Plus Noise to Noise Ratio (Terminal ) 0 - db. THD characteristics are essentially a function of the phase characteristics of the network connected between Terminals,, and 0.. Terminal numbers refer to Lead PDIP. pplication Information URRENT INTO TERMINL (µ) = V, T o kω 0-00 µ HNGE IN FREQUENY (khz) REOVERED (db) MUTING ONTROL T MXIMUM RESISTNE = V, T = o 0 REOVERED FROM FULL PUT (LEFT OORDINTE) TUNER G D VOLTGE T TERM. (RIGHT OORDINTE) VOLTGE T TERMINL METER IRUIT (kω TO GND) (RIGHT OORDINTE) 00 K SIGNL (µv) 0K 00K D (V) FIGURE. F HRTERISTIS (URRENT T TERMINL ) vs HNGE IN FREQUENY. (SEE TEST IRUIT FIGURE ) FIGURE. MUTING TION, TUNER G, ND TUNING METER PUT vs SIGNL VOLTGE. (SEE TEST IRUIT FIGURE )

3 0 Test ircuits K SIGNL VOLTGE = V µh K 0.00 TUNING METER L (NOTE ) 0E 00 pf.k. ll resistance values are in ohms.. L tunes with 00pF () at 0.MHz.. Q 0 (unloaded) (G.I. utomatic Mfg. Div. EX or equivalent) FIGURE. TEST IRUIT FOR 0E USING SINGLE- TUNED OIL 0 K 0.00 K 0µ FULL SLE F PUT.K 0 0K 0.M SIGNL VOLTGE = V µh K 0E 0.00 TUNING METER. ll resistance values are in ohms.. T PRI. - Q 0 (unloaded) (tunes with 00pF ( ) 0 of e on / dia. form).. SE. - Q 0 (unloaded) (tunes with 00pF ( ) 0 of e on / dia. form). 0. kq (percent of critical coupling) 0%. (djusted for coil voltage V ) = 0mV. bove values permit proper operation of mute (squelch) circuit E type slugs, spacing mm. FIGURE. TEST IRUIT FOR 0E USING DOUBLE- TUNED OIL 00 pf T (NOTE ) K 00 pf K 0µ FULL SLE F PUT 0 0K 0.M.K Test pplications 00Ω FM TUNER (NOTE ) 0pF IF 0.0 0pF. ll resistance values are in ohms.. Waller SNFI or equivalent.. Murata SFG 0.m or equivalent.. L tunes with 00pF () at 0.MHz Q 0 unloaded (G.I. EX or equivalent). 00 ERMI FILTER (NOTE ) = V 0E µh 00pF.K 0 L (NOTE ).K 0.0 Performance Data at f O = MHz, f MOD = 00Hz, Deviation = ±khz: -db Limiting Sensitivity µv (ntenna Level) 0dB Quieting Sensitivity µv (ntenna Level) 0dB Quieting Sensitivity µV (ntenna Level) FIGURE. TYPIL FM TUNER USING THE 0E WITH SINGLE TUNED OIL

4 0 Test pplications (ontinued) FIGURE. BOTTOM VIEW OF PRINTED IRUIT BORD FIGURE B. OMPONENT SIDE - TOP VIEW FIGURE. TUL SIZE PHOTOGRPHS OF THE 0E ND BORD OMPONENTS MOUNTED ON PRINTED-IRUIT BORD Block Diagram QUDRTURE L (NOTE ) µh = 00pF TO INTERNL REGULTORS IF 0 REFERENE BIS 0.0 DELYED G FOR RF MPL IF 0.0 0K IF MPLIFIER ST IF LEVEL FRME SUBSTRTE ND IF LEVEL RD IF LEVEL TUNING METER IRUIT LEVEL QUDRTURE MUTE (SQUELH) DRIVE IRUIT F MUTE (SQUELH) ONTROL F PUT PUT MUTING SENSITIVITY K K 0µ METER K TUNING METER PUT TO STEREO THRESHOLD LOGI IRUITS. ll resistance values are in ohms.. L Tunes with 00pF () at 0.MHz.. (G.I. EX or equivalent).. Pin numbers refer to lead DIP.

5 0 Schematic Diagram IF MPLIFIER Q Q Q R R R 0 R R R R Q R 0 B R 0 R.K Q Q Q IF BYPSSING Q Q Q R 0K R 0 Q Q 0. R R.K Q 0 Q Q R 0 Q Q R R.K R 0. Q Q Q Q Q R.K R 0 Q Q R.K R R 0 R 0 R.K Q0 R 0 SEE NEXT PGE R 0K R 0 R K Q R 0 R 0 00 Q Q Q Q Q Q Q 0 Q Q Q Q Q Q 0 Q R 00 R 00 R 00 R K G FOR RF TUNING METER NOTE: Pin numbers refer to lead PDIP. LEVEL ND METER IRUIT

6 0 Schematic Diagram (ontinued) QUDRTURE REF 0 BIS IF Q R 0K R R Q Q Q Q Q R 0K R 0 Q R Q R Q MPLIFIER R Q Q R Q Q Q R 00 R 00 Q R 0 R Q Q Q Q Q Q 0 R D D. Q 0 Q Q Q 0 Q R K Q R 00 R 00 R 0K Q R R R R 0K MUTE ONTROL Z B Q R D R K R 0 0 Q Q 0 D D Z R K R K Q Q Q R. Q Q Q F PUT R 0 Q Q Q BIS SUPPLY Q R Q R F MPLIFIER Q 0 R 0K R FRME SUBSTRTE Q Q 0 0 Q R 0 MUTE DRIVE MUTE LOGI. ll resistance values are in ohms. 0. ll capacitance values are in pf.. Pin numbers refer to lead PDIP.

7 0 Dual-In-Line Plastic Packages (PDIP) INDEX RE N N/ -B- -- D E BSE PLNE -- SETING PLNE L L D e D B e e B e B 0.00 (0.) M B S. ontrolling Dimensions: INH. In case of conflict between English and Metric dimensions, the inch dimensions control.. Dimensioning and tolerancing per NSI Y.M-.. Symbols are defined in the MO Series Symbol List in Section. of Publication No... Dimensions, and L are measured with the package seated in JE- DE seating plane gauge GS-.. D, D, and E dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.00 inch (0.mm).. E and e are measured with the leads constrained to be perpendicular to datum --.. e B and e are measured at the lead tips with the leads unconstrained. e must be zero or greater.. B maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.00 inch (0.mm).. N is the maximum number of terminal positions. 0. orner leads (, N, N/ and N/ + ) for E., E., E., E., E. will have a B dimension of inch (0. -.mm). E E. (JEDE MS-00-BB ISSUE D) LED DUL-IN-LINE PLSTI PKGE INHES MILLIMETERS SYMBOL MIN MX MIN MX NOTES B B , D D E E e 0.00 BS. BS - e 0.00 BS. BS e B L N Rev. 0 /

8 0 Small Outline Plastic Packages (SOI) N INDEX RE e D B 0.(0.00) M M E -B SETING PLNE B S H 0.0(0.00). Symbols are defined in the MO Series Symbol List in Section. of Publication Number.. Dimensioning and tolerancing per NSI Y.M-.. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.mm (0.00 inch) per side.. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.mm (0.00 inch) per side.. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.. L is the length of terminal for soldering to a substrate.. N is the number of terminal positions.. Terminal numbers are shown for reference only.. The lead width B, as measured 0.mm (0.0 inch) or greater above the seating plane, shall not exceed a maximum value of 0.mm (0.0 inch) 0. ontrolling dimension: MILLIMETER. onverted inch dimensions are not necessarily exact. µ 0.(0.00) M B α L M h x o M0. (JEDE MS-0- ISSUE ) 0 LED WIDE BODY SMLL LINE PLSTI PKGE INHES MILLIMETERS SYMBOL MIN MX MIN MX NOTES B D E e 0.00 BS. BS - H h L N 0 0 α 0 o o 0 o o - Rev. 0 / ll Intersil U.S. products are manufactured, assembled and tested utilizing ISO000 quality systems. Intersil orporation s quality certifications can be viewed at Intersil products are sold by description only. Intersil orporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. ccordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil orporation and its products, see