Dual Full-Bridge PWM Motor Driver

Transcription

1 Dual Full-Bridge PWM Motor Driver Features and Benefits 0 ma continuous output current V output sustaining voltage nternal clamp diodes nternal PWM current control Low output saturation voltage nternal thermal shutdown circuitry Similar to dual PBL or U0 Packages Package B -pin Batwing DP Package LB -pin Batwing SOW Package EB -pin PL with internally-fused leads Description The UDx motor drivers drive both windings of a bipolar stepper motor or bidirectionally control two D motors. Both bridges are capable of sustaining V and include internal pulse-width modulation (PWM) control of the output current to 0 ma. The outputs have been optimized for a low output saturation voltage drop (less than. V total source plus sink at 00 ma). For PWM current control, the maximum output current is determined by user selection of a reference voltage and sensing resistor. Two logic-level inputs select output current limits of 0%, %, %, or 00% of the maximum level. A PHASE input to each bridge determines load current direction. The bridges include both ground-clamp and flyback diodes for protection against inductive transients. nternally generated delays prevent crossover currents when switching current direction. Special power-up sequencing is not required. Thermal protection circuitry disables the outputs if the chip temperature exceeds safe operating limits. The device is supplied in a -pin dual in-line plastic (DP, package B) with two pairs of batwing leads as heat-sinkable tabs for enhanced power dissipation capabilities. The LB package is a -lead surface-mount wide SO with two pairs Not to scale ontinued on the next page PWM urrent-ontrol ircuitry 'B' PAKAGE, HANNEL PN NUMBERS SHOWN. OUT B OUT A V REF 0 k E k 0 k 0 R S R SENSE + R T ONE SHOT R T SOURE DSABLE Dwg. EP-00B.0N

2 Description (continued) of batwing leads. The EB package is a -lead power PL with internally-fused leads on two sides. Their webbed-lead construction provides for maximum package power dissipation in the smallest possible construction. The devices are available for operation from 0 to (range N), and from 0 to 0 (range Q). All packages are lead (Pb) free, with 00% matte tin leadframe plating. Selection Guide Part Number Package Packing UDNB-T -pin batwing DP per tube UDNEB-T -pin internally fused lead PL per tube UDNEBTR-T -pin internally fused lead PL 0 per reel UDNLB-T -pin batwing SOW per tube UDNLBTR-T -pin batwing SOW 000 per reel UDQEB-T -pin internally fused lead PL per tube UDQEBTR-T -pin internally fused lead PL 0 per reel UDQLB-T -pin batwing SOW per tube UDQLBTR-T -pin batwing SOW 000 per reel Ambient Temperature ( ) 0 to 0 to 0 Absolute Maximum Ratings haracteristic Symbol Notes Rating Units Motor Supply Voltage V Logic Supply Voltage V.0 V nput Voltage V N 0. to V + 0. V Output Emitter Voltage V E. V Output urrent* OUT cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the Peak Output current rating may be limited by duty.0 A ontinuous specified current rating or T J (max) 0 ma Package Power Dissipation P D See graph W Range N 0 to º Operating Ambient Temperature T A Range Q 0 to 0 º Maximum Junction Temperature T J (max) 0 º Storage Temperature T stg to 0 º Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -

3 EB Package (PL) Power Dissipation GND GND OUT A E SENSE OUT B LOAD SUPPLY 0 PHASE V REF R LOG SUPPLY 0 V GND PWM 0 0 PWM GND N N VBB OUT A NO ONNETON E 0 SENSE NO ONNETON OUT B 0 PHASE V REF R Dwg. PP-00A ALLOWABLE PAKAGE POWER DSSPATON N WATTS 0 SUFFX 'EB', R = 0 /W θja SUFFX 'LB', R θja = /W* R =.0 /W θjt SUFFX 'B', R = 0 /W θja TEMPERATURE N Dwg. GP-0B *Measured on a single-layer board, with sq. in. of oz copper area. For additional information, refer to the Allegro Web site. LB Package (SO) B Package (DP) 0 PHASE V REF PWM LOAD SUPPLY OUT B SENSE E OUT A OUT A E SENSE LOAD SUPPLY E SENSE OUT B R 0 OUT A OUT B 0 0 LOG SUPPLY V OUT A 0 R V REF 0 E SENSE PHASE 0 θ PWM PWM θ PHASE V REF PHASE PWM OUT B 0 V REF R V R LOG SUPPLY Dwg. PP-0 Dwg. PP-00 Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -

4 ELETRAL HARATERSTS at T A = +, T J 0, = V, V =. V to. V, V REF =.0 V (unless otherwise noted). Limits haracteristic Symbol Test onditions Min. Typ. Max. Units Output Drivers (OUT A or OUT B ) Motor Supply Range 0 V Output Leakage urrent EX V OUT = <.0 0 μa V OUT = 0 <.0 0 μa Output Sustaining Voltage V E(sus) OUT = ±0 ma, L =.0 mh V Output Saturation Voltage V E(SAT) Sink Driver, OUT = +00 ma V Sink Driver, OUT = +0 ma.0. V Source Driver, OUT = 00 ma.0. V Source Driver, OUT = 0 ma.. V lamp Diode Leakage urrent R V R = V <.0 0 μa lamp Diode Forward Voltage V F F = 0 ma..0 V Driver Supply urrent BB(ON) Both Bridges ON, No Load 0 ma ontrol Logic BB(OFF) Both Bridges OFF.0 0 ma nput Voltage V N() All inputs. V V N(0) All inputs 0. V nput urrent N() V N =. V <.0 0 μa V N = 0. V.0 00 μa Reference Voltage Range V REF Operating.. V urrent Limit Threshold V REF /V SENSE 0 = = 0. V (at trip point) 0 =. V, = 0. V.. 0 = 0. V, =. V. 0. Thermal Shutdown Temperature T J 0 Total Logic Supply urrent (ON) 0 = = 0. V, No Load 0 0 ma (OFF) 0 = =. V, No Load 0 ma Fixed Off-Time t off R T = kω, T = 0 pf μs Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -

5 APPLATONS NFORMATON PWM URRENT ONTROL The UDx dual bridges drive both windings of a bipolar stepper motor. Output current is sensed and controlled independently in each bridge by an external sense resistor, R S, internal comparator, and monostable multivibrator. When the bridge is turned on, current increases in the motor winding and it is sensed by the external sense resistor until the sense voltage, V SENSE, reaches the level set at the comparator input: TRP = V REF /0 R S The comparator then triggers the monostable, which turns off the source driver of the bridge. The actual load current peak will be slightly higher than the trip point (especially for low-inductance loads) because of the internal logic and switching delays. This delay, t d, is typically μs. After turn-off, the motor current decays, circulating through the ground-clamp diode and sink transistor. The source driver off-time (and therefore the magnitude of the current decrease) is determined by the external R timing components of the monostable: t off = R T T where: R T = 0 to 00 kω, and T = 00 to 000 pf. The fixed off-time should be short enough to keep the current chopping above the audible range (< μs) and long enough to properly regulate the current. Because only slow-decay current control is available, short off times (< 0 μs) require additional efforts to ensure proper current regulation. Factors that can negatively affect the ability to properly regulate the current when using short off times include: higher motorsupply voltage, light load, and longer than necessary blank time. When the source driver is re-enabled, the winding current (the sense voltage) is again allowed to rise to the comparator s threshold. This cycle repeats itself, maintaining the average motor winding current at the desired level. Loads with high distributed capacitances may result in high turn-on current peaks. This peak (appearing across R S ) will attempt to trip the comparator, resulting in erroneous current control or high-frequency oscillations. An external R time delay should be used to further delay the action of the comparator. Depending on load type, many applications will not require these external components (SENSE connected to E). V PHASE OUT + 0 PWM OUTPUT URRENT WAVE FORM LOAD URRENT PATHS R S t d V BB TRP t off BRDGE ON SOURE OFF ALL OFF Dwg. EP-00- Dwg. WM-00-A Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -

6 LOG ONTROL OF OUTPUT URRENT Two logic level inputs ( 0 and ) allow digital selection of the motor winding current at 00%, %, %, or 0% of the maximum level per the table. The 0% output current condition turns off all drivers in the bridge and can be used as an OUTPUT ENABLE function. URRENT-ONTROL TRUTH TABLE l 0 Output urrent L L V REF /0 R S = TRP H L V REF / R S = / TRP L H V REF /0 R S = / TRP H H 0 These logic level inputs greatly enhance the implementation of microprocessor controlled drive formats. During half-step operations, the 0 and allow the microprocessor to control the motor at a constant torque between all positions in an eight-step se- FROM μp V REF kω R T R S R 0 0 pf T TYPAL APPLATON θ PWM PWM θ V 0 R + V R S V REF FROM μp STEPPER MOTOR + 0 pf kω T R T quence. This is accomplished by digitally selecting 00% drive current when only one phase is on and % drive current when two phases are on. Logic highs on both 0 and turn-off all drivers to allow rapid current decay when switching phases. This helps to ensure proper motor operation at high step rates. The logic control inputs can also be used to select a reduced current level (and reduced power dissipation) for "hold" conditions and/or increased current (and available torque) for start-up conditions. GENERAL The PHASE input to each bridge determines the direction motor winding current flows. An internally generated dead time (approximately μs) prevents crossover currents that can occur when switching the PHASE input. All four drivers in the bridge output can be turned-off between steps ( 0 =. V), resulting in a fast current decay through the internal output clamp and flyback diodes. The fast current decay is desirable in half-step and high-speed applications. The PHASE, 0,and inputs float high. Varying the reference voltage, V REF, provides continuous control of the peak load current for micro-stepping applications. Thermal protection circuitry turns-off all drivers when the junction temperature reaches +0. t is only intended to protect the device from failures due to excessive junction temperature and should not imply that output short circuits are permitted. The output drivers are re-enabled when the junction temperature cools to +. The UDx output drivers are optimized for low output saturation voltages less than. V total (source plus sink) at 00 ma. Under normal operating conditions, when combined with the excellent thermal properties of the package designs, this allows continuous operation of both bridges simultaneously at 00 ma. TRUTH TABLE PHASE OUT A OUT B H H L L L H Dwg. EP-00B Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -

7 APPLATON NOTES urrent Sensing To minimize current sensing inaccuracies caused by ground trace R drops, each current-sensing resistor should have a separate return to the ground terminal of the device. For low-value sense resistors, the R drops in the PB can be significant and should be taken into account. The use of sockets should be avoided as their contact resistance can cause variations in the effective value of R S. Generally, larger values of R S reduce the aforementioned effects but can result in excessive heating and power loss in the sense resistor. The selected value of R S should not cause the absolute maximum voltage rating of. V, for the SENSE terminal, to be exceeded. The recommended value of R S is in the range of: R S = 0. / TRP (max) ± 0%. f desired, the reference input voltage can be filtered by placing a capacitor from REFN to ground. The ground return for this capacitor as well as the bottom of any resistor divider used should be independent of the high-current power-ground trace to avoid changes in REFN due to R drops. Thermal onsiderations For reliable operation, it is recommended that the maximum junction temperature be kept below 0 to. The junction temperature can be measured best by attaching a thermocouple to the power tab or batwing of the device and measuring the tab temperature, T TAB. The junction temperature can then be approximated by using the formula: T J = T TAB + ( LOAD V F R θjt ), where V F can be chosen from the electrical specification table for the given level of LOAD. The value for R θjt is approximately /W for both package styles. The power dissipation of the batwing packages can be improved 0% to 0% by adding a section of printed circuit board copper (typically to square centimeters) connected to the batwing terminals of the device. The thermal performance in applications that run at high load currents, high duty cycles, or both, can be improved by adding external diodes from each output to ground in parallel with the internal diodes. Fast-recovery ( 00 ns) diodes should be used to minimize switching losses. Load Supply Terminal The load supply terminal, VBB, should be decoupled with an electrolytic capacitor ( μf is recommended), placed as close to the device as is physically practical. To minimize the effect of system ground R drops on the logic and reference input signals, the system ground should have a low-resistance return to the load supply voltage. Fixed Off-Time Selection With increasing values of t OFF, switching losses decrease, lowlevel load current regulation improves, EM reduces, PWM frequency decreases, and ripple current increases. The value of t OFF can be chosen for optimization of these parameters. For applications where audible noise is a concern, typical values of t OFF should be chosen in the range of to μs. Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -

8 Package B, -pin DP External batwings, Pins,,, and are fused internally A All dimensions nominal, not for tooling use (reference JEDE MS-00 BE) Dimensions in inches Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal # mark area 0.0 Package LB, -pin SOW External batwings, Pins,,, and are fused internally.0 º A X 0.0 SEATNG PLANE SEATNG PLANE GAUGE PLANE 0.. All dimensions nominal, not for tooling use Dimensions in millimeters (reference JEDE MS-0 AD) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown. MAX 0.0 A Terminal # mark area Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -

9 UDNEB Package EB, -pin PL External batwings, Pins through and through are fused internally.0..0 A X.00 SEATNG PLANE.0.00 Preliminary dimensions, for reference only (reference JEDE MS-0 A) Dimensions in inches Millimeters (mm) in brackets, for reference only.0.0 Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal # mark area opyright, 00, The products described herein are manufactured under one or more of the following U.S. patents:,0,0;,,;,,;,,;,,;,,;,,;,,;,0,;,,;,,0;,,0;,,0; and other patents pending. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, assumes no responsibility for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: Northeast utoff, Box 0 Worcester, Massachusetts 0-00 (0) -