EXPERIMENT NO: 1. APPARATUS REQUIRED : Diode Characteristics Kit, Power Supply, Ammeter (0-20mA), Voltmeter (0-20V), Connecting Leads.

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1 AIM : Study of V-I Characteristics of a Diode. EXPERIMENT NO: 1 APPARATUS REQUIRED : Diode Characteristics Kit, Power Supply, Ammeter (0-20mA), Voltmeter (0-20V), Connecting Leads. BRIEF THEORY : A P-N junction is known as Semiconductor diode or Crystal diode. It is the combination of P-type & N-type Semiconductor. Which offers Nearly zero resistance to current on forward biasing & nearly infinite Resistance to the flow of current when in reverse biased. Forward biasing : When P-type semiconductor is connected to the +ve terminal and N-type to ve terminal of voltage source. Nearly zero resistance is offered to the flow of current. Reverse biasing : +ve When P-type semiconductor is connected to the ve terminal and N-type to Terminal. Nearly zero current flow in this condition. CIRCUIT DIGRAM : (1) When diode is forward biased (2) When diode is reverse biased WHEN A DIODE IS FORWARD BIASED WHEN A DIODE IS REVERSE BIASED R 15K Ohm ma R 1.5K Ohm ma ET V + DIODE V ET 12V + DIODE V - ET - PROCEDURE : (1) Connect the ckt. as shown in fig. (2) Switch on the power supply. (3) Vary the value of input dc supply in steps. (4) Note down the ammeter & voltmeter readings for each step. (5) Plot the graph of Voltage Vs Current. (6) Connect the ckt. as shown in fig.

2 OBSERVATION TABLE : PROCEDURE : When Diode Is Forward Biased When Diode Is Reverse Biased Current(mA) Voltage(V) Current Voltage(V) [µa) GRAPH : I (m)a VK KNEE VOLTAGE V RESULT : The graph has been ploted between voltage and current. DISCUSSION: The diode donot conduct in RB state and conduct in FB state. PRECAUTIONS : (1)Always connect the voltmeter in parallel & ammeter in series as shown in fig. (2)Connection should be proper & tight. (3)Switch ON the supply after completing the ckt. (4)DC supply should be increased slowly in steps (5)Reading of voltmeter & Ammeter should be accurate. QUIZ : Q.1 Define semiconductor diode? A. A PN junction is called semiconductor diode. Q.2 Define depilation layer? A. The region having uncompensated acceptor and donor ions. Q.3 What do you mean by forward biased? A. When +ve terminal of battery is connected to P side & -ve terminal to N side of diode. Q.4 What do you mean by reverse biased? A. When +ve terminal of battery is connected to N side & -ve terminal to P side of diode. Q.5 Define Knee voltage? A. The forward voltage at which current through the junction starts increasing rapidly. Q.6 Define breakdown voltage? A. Reverse voltage at which PN junction breaks down with sudden rise in reverse current. Q.7 Define threshold voltage? A. Q.8 Write threshold voltage for Ge & Si?

3 Q.9 Define max. forward current? A. It is highest instantaneous forward current that a PN junction can conduct without damage to Junction. Q.10 Define max. power rating? A. Max. power that can be dissipated at junction without damage to it.

4 AIM : Study of Half Wave Rectifier. EXPERIMENT NO : 2 APPARATUS REQUIRED : Power supply, rectifier kit., CRO, Connecting Leads. BRIEF THEORY : Rectification is a process of conversion of AC to DC. In half-wave rectifier, only one diode is used. During +ve half Cycle the diode is forward biased &, it conducts current through the load resistor R.During ve half cycle diode is reverse biased Hence, no current flow through the circuit. Only +ve half cycle appears across the load, whereas, the ve half Cycle is suppressed. CIRCUIT DIGRAM : + DIODE D1N4448 1/P 230V RL O/P - PROCEDURE : (a) Connect the ckt. as shown in fig. (b) Supply the input AC signal to the circuit. (c) Output signal is obtained on CRO which shows the DC( pulsating output). (d) Draw the wave form. WAVE FORM : Input wave Output wave Vi Vm 0 π 2π 3π Vo Vm 0 Wt π 2π 3π Wt

5 RESULT : Input and output waveform of half wave rectifier is as shown. Discussion: The output obtained is unidirectional, pulsating DC. but ripple factor is large. PRECAUTIONS : (a) Connection should be proper & tight. (b) Switch ON the supply after completing the ckt. (c) Note down the input & output wave accurately. QUIZ : Q.1 Define Rectifier? A. A circuit used to convert a.c. voltage into the pulsating d.c. voltage. Q.2 What is Half-Wave Rectifier? A. Rectifier in which diode conduct only for half cycle of waveform. Q.3 Define PIV? A. Max. voltage which a diode can withstand without breakdown in reverse bias conditon. Q.4 What type of output we get from H-W Rectifier? A. In output we get unidirectional pulsating voltage. Q.5 Write its Disadvantage? A. Rectification efficiecy is less & ripple factor is more. Q.6 Define efficiency. A. Ratio of d.c. power delivered to the load to the a.c. i/p power from sec. wdg. of transformer. Q.7 Define Ripple Factor? A. It is a measure of purity of output of a rectifier. Q.8 What is the value of Rf for H-W Rectifier? A Q. 9 What is Transformer utilization factor? A. Ratio of d.c. power delivered to the load to the a.c. rating of transformer secondary. Q.10 What is the value of Irms for HW Rectifier? A. Im/2.

6 AIM : Study of Full Wave Rectifier. EXPERIMENT NO : 3 APPARATUS REQUIRED : Power Supply, Rectifier kit., CRO, Connecting Leads. BRIEF THEORY : In full-wave rectification, When A.C supplied at the input, both the half cycles current flows through the load in the same direction. The following two circuits are commonly employed. Centre-tap full-wave Rectifier : In this rectifier, two diodes & a center-tap transformer is used. During +ve half cycle the diode D1 is forward biased & D2 is reverse biased.output will be obtained across load resistor R.During ve half cycle diode D1 is reverse biased &D2 is forward biased. Output will be obtained across load resistor R again & the direction of output is same i.e, DC output is obtained. Bridge Rectifier : The ckt. contains four diodes connected to form a bridge. In this an ordinary Transformer is used. During +ve half cycle of secondary voltage, diodes D1 & D3 are forward biased & diodes D2& D4 are reverse biased & vice versa. CIRCUIT DIGRAM : A DIODE D /P 230V - + O/P RL B DIODE D PROCEDURE : (d) Connect the ckt. as shown in fig. (e) Supply the input AC signal to the circuit. (f) Output signal is obtained on CRO which shows the DC( pulsating output). (g) Draw the wave form.

7 WAVE FORM : Input wave Output wave Vi Vo 0 π 2π 0 π 2π 3π RESULT: The input and output waveforms of full wave rectifier has been drawn. Discussion : The output is unidirectional, pulsating dc. But ripple factor is less than half wave rectifier. PRECAUTIONS : (a)connection should be proper & tight. (b)switch ON the supply after completing the ckt. (c)note down the input & output wave accurately. QUIZ : Q.1 Define Full wave rectifier? A. In which diode conducts for both half cycles of waveform. Q.2 Different types of FW rectifier? A. Center tapped & Bridge Rectifier. Q.3 Write PIV of Center tapped rectifier. A. 2Vm. Q.4 Define Form Factor? A. It is ratio of r.m.s. value to average value. Q.5 Write ripple factor for FW rectifier? A Q.6 What is the efficiency of FW rectifier? A. 81.2% Q.7 Write advantages of bridge rectifier? A. Diode s PIV rating is Vm & it does not require Centre-tapped secondary winding. Q.8 Write disadvantage of bridge rectifier? A. It requires 4 diodes so it can not be used for low voltage applications. Q.9 Write output frequency for FW rectifier? A. 100 hz. Q.10 Write value for DC current? A Im.

8 EXPERIMENT NO : 4 AIM: To Study the characteristics of transistor in Common Base configuration. APPARATUS REQUIRED : Power supply, Transistor characteristics Kit, Connecting Leads, Voltmeter, Ammeter. BRIEF THEORY : Transistor is a semiconductor device consist of two p-n junctions. It has three terminals, to handle I/P and O/P four terminals are needed. Therefore, one terminal is made common. A transistor can be connected in three Ways CB, CE, CC. Common base : Base is made common. I/P is connected between base & emitter and O/P is taken between base & collector. Input charact. The curve plotted between emitter current I & the emitter-base voltage constant collector-base voltage V. Output charact. The curve plotted between collector current I & collector-base voltage V constant emitter current I.. CIRCUIT DIAGRAM : R1 1k + E C - ma - B ma + R 12V VEB VEB VCB 12V PROCEDURE : Input charact. (a) Make the connection as per circuit diagram. (b) Switch ON the supply & set V = 0V (c) Vary V in step & note down the emitter current I at each step. (d) Set V = 1V & again repeat the same procedure. (e) Draw the graph. Output charact. (a) Make the connection as per circuit diagram. (b) Set the value of I = 1mA (c) Vary V in step & note down the collector current I at each step. (d) Set I = 2mA & repeat the same procedure. (e) Draw the graph.

9 OBSERVATION TABLE : Input charact.(vcb=cons.) Output charact. (Ie = Const.) S.No Ie(mA) Veb(Volts) Ic(mA) Vcb(Volts) GRAPH : Input charact. Output charact. IE VCB=CONSTANT IC IE = CONSTANT VEB VCB RESULT : The input and output charactrtistics of transformer in CB configuration has been ploted. DISCUSSION:With the help of output characteristics we can calculate ac & dc current gain in CB configuration. PRECAUTIONS : (1) Always connect the voltmeter in parallel & ammeter in series as shown in fig. (2) Connection should be proper & tight. (3) Switch ON the supply after completing the ckt. (4) DC supply should be increased slowly in steps (5) Reading of voltmeter & Ammeter should be accurate. QUIZ: Q1: What do you mean by biasing of transistor? A. When dc voltages are applied across the different terminals of transistor, it is called biasing. Q2: What is d.c. current gain in common base configuration? A. It is ratio of collector current(ic) to emitter current (Ie). Q3: What is typical value for d.c. current gain? A Q4: What is a.c. current gain in CB confifuration? A. It is ratio of change in collector current to change in emitter current. Q5: What are input characteristics? A. These curves relate i/p current & i/p voltage for a given value of o/p voltage. Q6: What are output characteristics? A. Thes curves relate o/p voltage & o/p current for a given value of input current. Q7: Which configuration has highest voltage gain? A. Common Emitter.

10 Q8: Which configuration is most widely used? A. Common Emitter. Q9: What is operating point? A. The zero signal values of Ic & Vce. Q10: Which reigon is heavily doped in Transistot? A. Emitter.

11 EXPERIMENT NO :5 AIM : Study of characteristics of JFET in Common Source Configuration. APPARATUS REQUIRED : Power Supply, FET Characteristics Kit, Connecting Leads, Voltmeter, Ammeter. BRIEF THEORY : A FET is a three terminal semiconductor device in which current Conduction is by one type of carriers & is controlled by the effect of electric field. There are two types of FET namely JFET & MOSFET. Again, a JFET can either have N-channel or P-channel. A N-channel JFET has a N-type semiconductor bar, the two ends of which make the Drain & source terminal. On the two sides of this bar, P-N junction are made. These P region makes gate. Usually, these two gates are connected together to form a single gate.the gate is given a ve bias w.r.t Source. Drain is given +ve potential w.r.t Source. CIRCUIT DIGRAM : 2 D ma 3 G VGS S 1 VDS 2 PROCEDURE : Drain characteristic (a) Connect the circuit as shown in fig. Keep V & V supplies at minimum. (b) Switch ON power, Increase V gradually & note the max. current as I while the V =0V (c) Repeat the step for different values of V, & note corresponding I & V for increment. (d) Tabulate the results. Transfer characteristic (a) Keep V fixed at 4V. (b) Increase V in small steps & note corresponding I for each step. (c) Repeat step 2 for different values of V. (d) Tabulate the results.

12 OBSERVATION TABLE : GRAPH : Transfer charact.(vds=cons.) Drain charact. (Vgs= Const.) S.No Id(mA) Vgs(Volts) Id(mA) Vds(Volts) RESULT : Transfer & Drain characteristics of JFET in common source configuration has been plotted. DISCUSSION: We obseve that characteristics has 4 regions: Ohmic region, curve AB, Pinch off region& Breakdown region. PRECAUTIONS : (6) Always connect the voltmeter in parallel & ammeter in series as shown in fig. (7) Connection should be proper & tight. (8) Switch ON the supply after completing the ckt. (9) DC supply should be increased slowly in steps (10) Reading of voltmeter & Ammeter should be accurate. QUIZ : Q.1 Define FET? A It is a 3 terminal device in which current conduction is by only one type of mazority carriers. Q.2 Define pinch off Voltage? A. The value of Vds at which all the free charge carriers are removed from channel. Q.3 What is unipolar device? A. In which conduction is by only one type of mazority carriers. Q.4 What is bipolar device? A. In which conduction is by both types of carriers. Q.5 Write advantages of FET over conventional Transistor? A. It provides extremely high input impedance as compared to BJT. Q.6 Define drain Characteristics? A. The curve b/w drain current & Vds with Vgs as a parameter.

13 Q.7 Define transfer Characteristics? A. The curve b/w Id & Vgs keeping Vds constt. Q.8 Write applications of a FET? A. FETs are used in ICs, voltage variable resistor in operational amplifier etc. Q.9 Input impedance of a FET is more than a BJT, Why? A Because it always work in reverse biasing situation. Q.10 Define amplification factor? A. Ratio of change in drain-source voltage to change in gate to source voltage at constt. Id.

14 EXPERIMENT NO: 6 AIM: To study the operation of clipping and clamping circuit. APPARATUS REQUIRED CRO, Function Generator, Power supply, connecting leads, clipping and clamping circuit kit. THEORY: Clipping circuit: In this circuit, the shape of the input wave changed, by clipping or removing a portion of it. The output obtained will be a clipped or limited portion of the input signal. Positive clipper A circuit that removes positive half cycle of the signal (input voltage) is called a positive clipper. The out put voltage has the entire positive half cycles clipped off. During the positive half cycle of input voltage, the diode is forward biased and conducting heavily. Ideally, it acts as a closed switch and hence the voltage across the diode or the load is zero and hence the positive half cycle clipped off. During the negative half cycle the diode is reverse biased and behaves as an open switch. Then the current flows through the load and the out put (negative half cycle) is available across load. When the diode polarity is changed in the same circuit, it becomes a negative clipper. The output will have only positive half cycles. Clamping circuit A circuit that shifts either positive or negative peak of the signal at a desired DC level is known as clamper. In fact, the circuit adds DC component (+ve or ve) to the signal in such a way that it pushes the signal either on the positive side or the negative side. When the circuit pushes the signal on the + ve side, then negative peak of the signal falls on the zero level. This circuit is called a positive clamper. On the other hand, when the circuit pushes the signal on the negative side then positive peak of the signal falls on the zero level. This circuit is called a negative clamper. The clamper circuit contains a diode and a capacitor. In case of + ve clamper, the diode conducts during the negative half cycle. The capacitor which is charged to the peak voltage will behave like a charged battery which adds to the signal voltage during the positive half cycle. CIRCUIT DIAGRAM: 2 D 1 V1 I/P VOLTAGE CLIPPER O/P C 1 2 D RL CLIPPER CLAMPER

15 PROCEDURE: 1. Connect the circuit according to the diagram and switch on the power supply. 2. Supply the input square wave to the input terminal of the integrator circuit. 3. Set the out put voltage at 1 V peak and frequency at 1 KHz. 4. Observe the out put waveform on the CRO. GRAPH +Vp Vp 0 0 -Vp OUTPUT WAVE +Vp<+Vp OUTPUT WAVE +2Vp 0 -Vp +Vp 0 CLIPPER CLAMPER RESULT The output waveform (triangular shape) is obtained and observed on the CRO. PRECAUTIONS 1. Connect the circuit properly as shown in fig. 2. Set the input waveform of correct amplitude and frequency. 3. Connect the CRO to the output terminal. QUIZ 1. What is the voltage gain of an ideal OP-AMP? 2. What is CMRR? 3. What is a voltage follower? 4. What do you understand by slew rate of an OP-AMP?

16 EXPERIMENT NO: 7 AIM: To study the operation of OP- AMP as an integrator circuit. APPARATUS REQUIRED CRO, Function Generator, Power supply, connecting leads, Integrator circuit kit. THEORY: In this circuit, the feed back resistor of an OP-AMP is replaced by a capacitor. The output obtained will be an integral of the input wave. I (t) = v (t) /R Out put Voltage= 1/C v(t)/r dt = -1/RC V(t) dt The circuit therefore provides an out put voltage proportional to the integral of the input voltage. If the input voltage is a constant, v=v, then the output will be a ramp, Out put voltage=-vt /RC CIRCUIT DIAGRAM: C=0.1uf 10k 7 I/P 1k O/P 4 PROCEDURE: INTEGRATOR CIRCUIT 1. Connect the circuit according to the diagram and switch on the power supply. 2. Supply the input square wave to the input terminal of the integrator circuit. 3. Set the out put voltage at 1 V peak and frequency at 1 KHz. 4. Observe the out put waveform on the CRO.

17 GRAPH V I/P O/P V t t INPUT WAVE OUTPUT WAVE RESULT The output waveform (triangular shape) is obtained and observed on the CRO. PRECAUTIONS 1. Connect the circuit properly as shown in fig. 2. Set the input waveform of correct amplitude and frequency. 3. Connect the CRO to the output terminal. QUIZ 1. What is the voltage gain of an ideal OP-AMP? 2. What is CMRR? 3. What is a voltage follower? 4. What do you understand by slew rate of an OP-AMP?

18 EXPERIMENT NO: 8 AIM: To study the operation of OP- AMP as a Differentiator circuit. APPARATUS REQUIRED: CRO, Function Generator, Power supply, connecting leads, Differentiator circuit kit. THEORY: In this circuit, the capacitor is connected in series with the input resistor. It is an electronic circuit in which the OP-Amp is employed in such a way that the output voltage comes out to be as a derivative of the input voltage. This type of circuit is called an OP-AMP differentiator. The output is proportional to the time derivative of the input wave. Out put Voltage = -R I = -RC d/dt Vin CIRCUIT DIAGRAM: 1K I/P 0.1uf O/P 4 PROCEDURE: DIFFERENTIATOR CIRCUIT 1. Connect the circuit according to the diagram and switch on the power supply. 2. Supply the input square wave to the input terminal of the differentiator circuit. 3. Set the out put voltage at 1 V peak and frequency at 1 KHz. 4. Observe the out put waveform on the CRO.

19 GRAPH V I/P V O/P t t INPUT WAVE OUTPUT WAVE RESULT The output waveform (Spikes) is obtained and observed on the CRO. PRECAUTIONS 1. Connect the circuit properly as shown in fig. 2. Set the input waveform of correct amplitude and frequency. 3. Connect the CRO to the output terminal. QUIZ 1. What is the input impedence of an ideal OP-AMP? 2. What is CMRR? 3. What is meant by virtual ground? 4. What do you understand by input offset voltage of an OP-AMP?

20 EXPERIMENT NO: 9 AIM: To study the operation of OP- AMP as a Square Wave generator. APPARATUS REQUIRED CRO, Function Generator, Power supply, connecting leads, Square wave generator circuit kit. THEORY: In this circuit, a square wave out put waveform is generated. It is also known as a free running multi vibrator or astable multi vibrator. As soon as the input supply is given to the circuit, both the transistors in the OP-AMP start conducting. Because of a small difference in their operating characteristics, one of the transistors conducts slightly more than the other. Therefore conduction of one transistor drives the other transistor in to cut off state. This means that one transistor is in saturation and the other in cut off state. After some time the capacitor gets charged to supply voltage Vcc. This changes the conduction of transistors and switching action takes place. CIRCUIT DIAGRAM: C 0.05uf R 10k 7 10k R O/P R PROCEDURE: SQUARE WAVE GENERATOR 1. Connect the circuit according to the diagram and switch on the power supply. 2. No input signal is required to be fed to the input terminal of the circuit, as it is self generating. 3. Frequency can be varied by changing the value of RC combination. 4. Observe the out put waveform on the CRO.

21 GRAPH V t RESULT The output waveform is obtained and observed on the CRO. PRECAUTIONS 1. Connect the circuit properly as shown in fig. 2. Connect the CRO to the output terminal. QUIZ 1. What is faithful amplification of a transistor? 2. What is a differential amplifier? 3. What is meant by biasing of transistors? 4. What do you understand by input offset voltage of an OP-AMP?

22 AIM: To study NAND, NOR, EX-OR Gates EXPERIMENT NO: 10 APPARATUS REQUIRED: Power Supply, Digital Trainer Kit, Connecting Leads, IC s (7400, 7402,7486) BRIEF THEORY: NAND GATE: The IC no. for NAND gate is The NOT-AND operation is known as NAND operation. If all inputs are 1 then output produced is 0. NAND gate is inverted AND gate. Y = A. B NOR GATE: The NOR gate has two or more input signals but only one output signal. IC 7402 is two I/P IC. The NOT- OR operation is known as NOR operation. If all the inputs are 0 then the O/P is 1. NOR gate is inverted OR gate. Y = A + B EX-OR GATE: The EX-OR gate can have two or more inputs but produce one output is two input IC. EX-OR gate is not a basic operation & can be performed using basic gates. Y = A+ B PROCEDURE: (a) Fix the IC s on breadboard & give the input supply. (b) Connect the +ve terminal of supply to pin 14 & -ve to pin 7. (c) Give input at pin 1, 2 & take output from pin 3. It is same for all except NOT & NOR IC. (d) For NOR, pin 1 is output & pin 2&3 are inputs. (e) For NOT, pin 1 is input & pin 2 is output. (f) Note the values of output for different combination of inputs & draw the TRUTH TABLE. RESULT: We have learnt all the gates ICs according to the IC pin diagram. PRECAUTIONS: 1) Make the connections according to the IC pin diagram. 2) The connections should be tight. 3) The Vcc and ground should be applied carefully at the specified pin only.

23 QUIZ: QUESTION Q.1. Define gates? Q.2. Define IC? Q.3. Explain Demorgan s theorem. Q.4. (A+A) A =? ANSWER A1. Gates are the digital circuits, which perform a specific type of logical operation A2. IC means integrated circuit. It is the integration of no. of components on a common substrate. A3. (AB)=A+B (A+B)=A.B A4. A Q5. Define Universal gates. A5. Universal gates are those gates by using which we can design any type of logical expression. Q6. When will the output of a NAND Gate be 0? A06. When all the inputs are 1...

24 AIM: To study AND, OR, NOT Gates EXPERIMENT NO: 11 APPARATUS REQUIRED: Power Supply, Digital Trainer Kit. Connecting Leads, IC s (7404, 7408, 7432) BRIEF THEORY: AND Gate: The AND operation is defined as the output as one if and only if all the inputs are one is the two Input AND gate IC.A&B are the Input Terminals &Y is the Output terminal. Y = A.B OR Gate: The OR operation is defined as the output as one if one or more than one inputs are one is the two Input OR gate IC. A&B are the input terminals & Y is the Output terminal. Y = A + B NOT GATE: The NOT gate is also known as Inverter. It has one input (A) & one output (Y). IC No. is Its logical equation is, Y = NOT A Y = A ` PROCEDURE: OBSERVATION TABLE: (g) Fix the IC s on breadboard & give the input supply. (h) Connect the +ve terminal of supply to pin 14 & -ve to pin 7. (i) Give input at pin 1, 2 & take output from pin 3. It is same for all except NOT & NOR IC. (j) For NOR, pin 1 is output & pin 2&3 are inputs. (k) For NOT, pin 1 is input & pin 2 is output. (l) Note the values of output for different combination of inputs & draw the TRUTH TABLE. SL NO AND OR NOT INPUT OUTPUT OUTPUT OUTPUT INPUT INPUT RESULT: We have learnt all the gates ICs according to the IC pin diagram.

25 PRECAUTIONS: 1) Make the connections according to the IC pin diagram. 2) The connections should be tight. 3) The Vcc and ground should be applied carefully at the specified pin only. QUIZ: QUESTION ANSWER Q.1 Define gates? A1. Gates are the digital circuits, which perform a specific type of logical operation Q.2 Define IC? A2. IC means integrated circuit. It is the integration of no. of components on a common substrate. Q.3 Explain Demorgan s theorem. A3. (AB)=A+B (A+B)=A.B Q.4 (A+A) A =? A4. A Q5 Define Universal gates. Q6.Write the logical equation for AND gate. Q7 How many no. of input variables can a NOT Gate have? Q8.Under what conditions the output of a two input AND gate is one? Q9.1+0 =? A5. Universal gates are those gates by using which we can design any type of logical expression. A6.Y=A.B A7. One A8. Both the inputs are one A9. One..