Engineer-to-Engineer Note

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1 Engineer-to-Engineer Note EE-306 Technicl notes on using Anlog Devices DSPs, processors nd development tools Visit our Web resources nd or e-mil or for technicl support. PGO Linker - A Code Lyout Tool for Blckfin Processors Contributed by Kushl Snghi Rev 1 December 4, 2006 Introduction Blckfin processors provide on-chip Level 1 (L1) memory tht cn be configured to tke dvntge of ppliction-specific worklod chrcteristics. L1 memory cn be configured s SRAM, or it cn be split into mix of SRAM nd cche memory. L1 SRAM memory improves performnce by stticlly mpping the most frequently executed code sections nd criticl rel-time code. To chieve the best system performnce, n ppliction developer cn utilize the execution profile of n ppliction nd domin knowledge to hnd-tune the code memory lyout. However, this cn be extremely time-consuming for lrge pplictions. To ssist in utomting this tedious process nd decrese development time, link-time profileguided optimiztion (PGO) tool, PGO Linker, hs been developed to produce n efficient code mp for L1 SRAM instruction memory. It uses the execution profile of the ppliction nd progrm optimiztion techniques to yield the most efficient code lyout. This document describes the functionl behvior of the PGO Linker tool, s well s its usge, performnce benefits, fetures, nd limittions. Motivtion Figure 1 shows the Blckfin processor memory hierrchy. L1 memory cn be used entirely s SRAM memory, or it cn be split between SRAM nd cche memory. Core One Core Cycle Multiple System Clock Cycles SRAM/Cche SRAM L1 Instruction Figure 1. Blckfin Memory Hierrchy SDRAM (Externl) 4x ( MB) nd/or L2 SRAM Internl L2 memory shown in Figure 1 is vilble only on ADSP-BF561 dulcore Blckfin processors. It cn be configured s SRAM only. All ddresses tht do not resolve to L1 SRAM re ccessed directly by the core in externl memory vi the Externl Bus Interfce Unit (EBIU), resulting in costly system clock (SCLK) domin ccesses. However, when L1 cche memory is used, externl memory is ccessed only fter cche miss, which improves verge memory ccess time. Performnce cn be further improved by utilizing L1 SRAM. Code mpped to L1 SRAM is not subject to cche misses, thereby completely eliminting ny externl memory ccesses nd providing gurnteed fst ccess to ll requests by the core. Unfortuntely, ll code cnnot be mpped to L1 SRAM, due to the limited mount of internl memory vilble. Copyright 2006, Anlog Devices, Inc. All rights reserved. Anlog Devices ssumes no responsibility for customer product design or the use or ppliction of customers products or for ny infringements of ptents or rights of others which my result from Anlog Devices ssistnce. All trdemrks nd logos re property of their respective holders. Informtion furnished by Anlog Devices pplictions nd development tools engineers is believed to be ccurte nd relible, however no responsibility is ssumed by Anlog Devices regrding technicl ccurcy nd topiclity of the content provided in Anlog Devices Engineer-to-Engineer Notes.

2 For better performnce, only criticl rel-time code nd the most frequently executed code re mpped to L1 SRAM spce. This ensures minimum memory ccess ltency for most of the progrm s execution. The less frequently ccessed code cn be mpped to externl memory, which is ccessed directly by the core or through L1 cche (if cche is enbled). The PGO Linker utomtes the process of mpping the most frequently executed code to L1 SRAM memory by using progrm optimiztion techniques to produce n efficient code lyout. This elimintes the need to hndtune the code lyout nd sves the developer from hving to mke tedious chnges to source code. How Does the PGO Linker Work? This section describes the functionl behvior of the PGO Linker utility. Figure 2 shows the steps performed by the tool. Appliction Red Function Symbol Module Gther Profile Informtion Module Code Lyout Module Generte Output File (ASM) Module Re-Link nd Test Figure 2. Functionl Flow of PGO Linker First, the PGO Linker gthers the functionl symbol informtion nd the profile dt output from the VisulDSP++ IDDE. To obtin the profile dt, the tool uses profiling mechnism bsed on the type of session being run. Emultor sessions use the sttisticl profiler, nd simultor sessions use the liner profiler. The PGO Linker's optimiztion commnd line switches (O1 nd O2) specify the optimiztion technique to be employed during the build to produce n output.sm file. The output.sm file contins n ordered priority list for ll functions in the ppliction. Once this file is included in the project, the linker uses the priority list of functions specified in the output file (.sm) nd the linker description file (.ldf) to produce the optiml code lyout. How Do I Use the PGO Linker? The PGO Linker is commnd-line utility instlled under the VisulDSP++ directory. This tool requires Blckfin processor executble (.dxe) file nd input profile dt to produce the code lyout. The output of the PGO Linker is only s good s the profile dt set it gthers from the VisulDSP++ IDDE. The input profile dt should be independent of the initil memory plcement of the code by the linker. By defult, the linker plces functions in the order in which they pper in the source files listed in the project folder. Functions re first mpped to L1 SRAM memory, nd the remining functions (if ny) re mpped to the higher levels of the memory hierrchy. The sttisticl profiler ccounts for memory ccess ltencies to the different levels of memory. This implies tht functions plced in externl memory will hve higher execution percentge (in terms of rel time) thn if the sme functions were to be plced in on-chip L1 SRAM. Thus, to void ny bis to functions plced in externl memory, plce ll code in one level of memory hierrchy (preferbly in externl memory) with cche enbled. This minimizes the PGO Linker - A Code Lyout Tool for Blckfin Processors (EE-306) Pge 2 of 7

3 memory ccess ltencies to the different levels of memory in the execution profile. To completely exclude memory ltencies in the execution profile, run the PGO Linker tool in compiled simultion session. In compiled simultion session, the liner profiler profiles only the instruction count; therefore, it does not ccount for ny ccess ltencies due to memory hierrchy. The smple input dt set should be representtive nd smll for better nd fster results. To run the PGO Linker: 1. Lod the progrm in VisulDSP Choose Tools->Profiler to open the Profiler window. 3. Run the progrm with smple input dt set. 4. Wit until the progrm hlts or is hlted mnully. 5. Open Windows Commnd Prompt window. 6. Execute the PGO Linker utility with the pproprite commnd-line rguments (Listing 1). The tool produces n.sm file. 7. Include the generted.sm file in the project. 8. Rebuild the project. PGOLinker <dxefile(.dxe)> <Output file (.sm)> -L1Min -L1Mx -L1Step lgorithm <dxefile(.dxe)> - Blckfin executble <Output file(.sm)> - The file would contin ll the linker directives for the function symbols Options help: To disply ll options -L1Min: Minimum size of L1 Instruction SRAM, defult: 4KB -L1Mx: Mximum size of L1 Instruction SRAM, defult: 80KB -L1Step: Steps of increse in L1 SRAM, defult: 4KB -lgorithm: O1 O2 Listing 1. PGO Linker Commnd Line Exmple The.sm file produced by the PGO Linker is dded to the project. Upon rebuilding the project, the linker plces functions bsed on the priorities ssigned in the generted.sm file. The performnce cn be evluted with test inputs. Output File Formt nd.priority Directive The output hs n.sm extension nd the following formt:.extern function_symbol;.priority function_symbol, src_file_pth, ssigned_priority #; PGO Linker - A Code Lyout Tool for Blckfin Processors (EE-306) Pge 3 of 7

4 where:.extern notifies the linker tht function_symbol is n externlly defined symbol. function_symbol is the mngled function nme. The linker uses mngled function nmes for mpping object code..priority is the linker directive used for mpping functions bsed on the ssigned priority level. src_file_pth is used to resolve sttic symbols. ssigned_priority # is positive integer whose vlue specifies the order of mpping for the functions the higher the number, the higher the priority. An exmple of n output file is:.extern _foo;.priority _foo,"..\..\src\", 900;.extern _br;.priority _br,"..\..\src\", 897; In this cse, the foo( ) function hs higher priority thn the br( ) function. Becuse of the.priority directives ssocited with function symbols in the exmple bove, the linker will plce the foo( ) function before mpping the br( ) function in L1 memory since 900 is greter thn 897. In the generted file, function priorities re ssigned with n intervl of "3", providing the user with the flexibility to dd functions bsed on ppliction knowledge. Also, ny number of functions cn be given higher priority bove the highest priority function. In the sme wy, ny number of functions cn be ssigned lower priority below the lowest priority function. Note tht the.priority directive cn lso be used without the PGO Linker. Besides the output file, the PGO Linker lso provides informtion pertining to L1 size versus execution percentge in order to help evlute L1 memory configurtions nd size. The drk blue text in Figure 3 indictes when the PGO Linker tool should be used in typicl embedded system design cycle. Note tht for ny chnges to source code, the lyout should be regenerted. Code Development Debug Successful Progrm Optimiztion Compiler Optimiztion nd/or Profile-Guided Compiler Optimiztions Evlute L1 Memory Configurtions nd Size Within PGO Linker Frmework System design Figure 3. When To Use PGO Linker Benefits, Fetures, Limittions, nd Usge Performnce improvements re lrgely dependent on ppliction chrcteristics in terms of code size nd the number of functions. Experiments over set of benchmrk progrms showed 3% to 32% improvement in core cycles s compred to the defult linker mpping. In most cses, the O2 lgorithm provided n dditionl 1% to 5% improvement compred to the O1 lgorithm. The tests were conducted with cche enbled for 16K L1 SRAM. As generl rule of thumb, the PGO Linker is most useful for pplictions with code size exceeding 150 Kbytes nd with over 200 functions. PGO Linker - A Code Lyout Tool for Blckfin Processors (EE-306) Pge 4 of 7

5 Benefits In ddition to performnce benefits, the PGO Linker lso: Reduces development time Performs code lyout on per-function bsis without the need to modify source code Provides greter control over code ordering nd reduces code development effort, s there is no need to modify the.ldf file Incorportes two optimiztion techniques to produce n efficient code lyout Fetures Completely utomted user intervention is not required Used in ll VisulDSP++ sessions (simultor, compiled simultor, nd emultor) Efficient in runtime Output is trnsprent to the user Limittions Profile dependent if the smple input dt set is not representtive, the results my vry for different test inputs. This phenomenon is less sensitive in the cse of code execution profiles. It is restricted only to code lyout. Dt lyout should still be mnged by the developer. Typicl Usge Scenrios Applictions with lrge code size nd lrge number of functions Performnce evlutions of out-of-the-box benchmrk progrms Porting of legcy code, when user knowledge of ppliction behvior is miniml To Get Strted Downlod the PGO Linker utility from the ssocited.zip file. Copy PGOLinker.exe into the VisulDSP++ instlltion folder (defult): Progrm Files\Anlog Devices\VisulDSP++ The PGO Linker utility works for VisulDSP++ releses strting with version 4.0 (updted July, 2006). PGO Linker - A Code Lyout Tool for Blckfin Processors (EE-306) Pge 5 of 7

6 Appendix A Smple Commnd-Line Output C:\ProgrmFiles\visuldsp>PGOLinker.exe "C:\mpeg\ mpeg2dec\bf533\mp2decoddt2.dxe" "mp2.sm" The commnd line options re configured s follows:- DSPExecutble-->C:\mpeg\mpeg2dec\BF533\mp2 decoddt2.dxe Linker directive Mp File --> mp2.sm Minimum L1 size selected --> 4 Mximum L1 size selected --> 80 L1 memory incremented in steps of --> 4 Optimiztion switch --> -O2 Connecting to the IDDE nd loding Progrm Connection to the IDDE estblished Obtining function symbol informtion Function symbol informtion obtined Getting profile Informtion Anlyzing the profile informtion Anlysis Done Totl smple count collected is --> The totl execution from L1 for 4KB of L1 is % Totl functions in L1 17 The totl execution from L1 for 8KB of L1 is 100% Totl functions in L Redy to generte the sm file Linker directive.sm file generted PGO Linker - A Code Lyout Tool for Blckfin Processors (EE-306) Pge 6 of 7

7 References [1] ADSP-BF533 Blckfin Processor Hrdwre Reference. Rev 3.2, July Anlog Devices Inc. [2] VisulDSP Linker nd Utilities Mnul, Rev 2.0, April Anlog Devices Inc. [3] Guide to Blckfin Processor LDF Files (EE-237), Rev 1, My Anlog Devices Inc. Document History Revision Rev 1 December 4, 2006 by Kushl Snghi Description Initil Relese PGO Linker - A Code Lyout Tool for Blckfin Processors (EE-306) Pge 7 of 7