2 Port, USB 2.0 High Speed (480 Mbps) Switch, DPDT Analog Switch

Transcription

1 2 Port, UB 2. High peed (48 Mbps) witch, DPDT Analog witch DG273 DECRIPTION The DG273 is 2 port high speed analog switch optimized for UB 2. signal switching. The DG273 switch is configured in DPDT. It handles bidirectional signal flow, achieving a 9 MHz - 3 db bandwidth, and a port to port crosstalk and isolation at - 49 db. Processed with high density sub micron CMO, the DG273 provide low parasitic capacitance. ignals are routed with minimized phase distortion and attain a bit to bit skew is as low as 4 p. The DG273 is designed for a wide range of operating voltages, from 2.7 V to 4.3 V that can be driven directly from one cell Li-ion battery. On-chip circuitry protects against conditions when either the D+/D- lines are shorted to the V BU at the UB port. Additionally, logic control pins ( and ) can tolerate the presence of voltages that are above the supply power rail (). The control logic threshold is guaranteed to be (V IH = 1.3 V/min). Latch up current is 3 ma, as per JED78, and its ED tolerance exceeds 8 kv. Packaged in ultra small miniqfn-1 (1.4 mm x 1.8 mm x. mm), it is ideal for portable high speed mix signal switching application. As a committed partner to the community and the environment, manufactures this product with lead (Pb)-free device termination. The miniqfn-1 package has a nickel-palladium-gold device termination and is represented by the lead (Pb)-free -E4 suffix to the ordering part number. The nickel-palladium-gold device terminations meet all JEDEC standards for reflow and ML rating. As a further sign of 's commitment, the DG273 is fully RoH complaint. FEATURE Halogen-free according to IEC definition Wide operation voltage range Low on-resistance, 7 (typical at 3 V) Low capacitance, C ON =.8 pf (typical) 3 db high bandwidth: 9 MHz (typical) Low bit to bit skew: 4 p (typical) Low power consumption Low logic threshold: V Power down protection: D+/D- pins can tolerate up to V when = V Logic ( and ) above tolerance 8 kv ED protection (HBM) Latch-up current 3 ma per JED78 Lead (Pb)-free low profile miniqfn-1 (1.4 mm x 1.8 mm x. mm) Compliant to RoH Directive 22/9/EC APPLICATION Cellular phones Portable media players PDA Digital camera GP Notebook computer TV, monitor, and set top box FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION miniqfn-1l Pin 1: LONG LEAD Control D+ HD1+ D- HD HD2+ HD2- Pin 1 x Top View Device marking: x for DG273 x = Date/Lot Traceability Code Rev. F, -Dec-11 1 THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

2 DG273 ORDERING INFORMATION Temp. Range Package Part Number - 4 C to 8 C miniqfn-1 DG273DN-T1-GE4 TRUTH TABLE (Pin 8) (Pin 1) Function 1 D+ = HD1+ and D- = HD1- D+ = HD2+ and D- = HD2-1 X Disconnect PIN DECRIPTION Pin Name HD1±, HD2±, D± Description Bus witch Enable elect Input Data Port ABOLUTE MAXIMUM RATING (T A = 2 C, unless otherwise noted) Parameter Limit Unit Reference to -.3 to 6,, D±, HD1±, HD2± a -.3 to ( +.3) V Current (Any Terminal except,, D±, HD1±, HD2±) 3 Continuous Current (,, D±, HD1±, HD2±) ± 2 ma Peak Current (Pulsed at 1 ms, 1 % Duty Cycle) ± torage Temperature (D uffix) - 6 to 1 C Power Dissipation (Packages) b miniqfn-1 c 28 mw ED (Human Body Model) I/O to 8 kv Latch-up (Current Injection) 3 ma Notes: a. ignals on,, D±, HD1±, HD2± exceeding will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 2.6 mw/ C above 7 C. PECIFICATION ( = 3 V) Parameter ymbol Test Conditions Otherwise Unless pecified Temp. a Limits - 4 C to 8 C Min. b Typ. c Max. b Analog witch Analog ignal Range d V ANALOG R D(on) Full V On-Resistance R D(on) = 3 V, I D± = 8 ma, V HD1/2± =.4 V Room 7 8 Full 9 On-Resistance Match d R ON = 3 V, I D± = 8 ma, V HD1/2± =.4 V Room.8 On-Resistance Resistance Flatness d R ON Flatness = 3 V, I D± = 8 ma, V HD1/2± = V, 1 V Room 2 = 4.3 V, V witch Off Leakage Current I HD1/2± =.3 V, 3 V, (off) V D± = 3 V,.3 V = 4.3 V, V Channel On Leakage Current I HD1/2± =.3 V, 4 V, (on) V D± = 4 V,.3 V Digital Control = 3 V to 3.6 V Full 1.3 Input Voltage High V INH = 4.3 V Full 1. Full Full Input Voltage Low V INL = 3 V to 4.3 V Full. Input Capacitance C IN Full 6. pf Input Current I INL or I INH V IN = or Full µa Unit na V Rev. F, -Dec-11 THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

3 DG273 PECIFICATION ( = 3 V) Limits Test Conditions - 4 C to 8 C Parameter ymbol Otherwise Unless pecified Temp. a Min. b Typ. c Max. b Unit Dynamic Characteristics Break-Before-Make Time e, d t BBM Room Full, Turn-On Time e, d t ON = 3 V, V D1/2 ± = 1. V, R L =, Room C L = 3 pf Full 3 ns, Turn-Off Time e, d Room t OFF Full 2 Charge Injection d Q INJ C L = 1 nf, R GEN =, V GEN = V. pc Off-Isolation d OIRR = 3 V to 3.6 V, R L =, C L = pf, - 3 Crosstalk d X TALK f = 24 MHz - 4 db Bandwidth d BW = 3 V to 3.6 V, R L =, - 3 db 9 MHz D+/D- On Capacitance C ON = 3.3 V, = V, f = 24 MHz Room.8 D1n, D2n Off Capacitance C OFF = = 3.3 V, f = 24 MHz 2.2 pf Channel-to-Channel kew d t K(O) kew Off Opposite Transitions of the ame Output d t K(p) = 3 V to 3.6 V, R L =, C L = pf 2 ps Total Jitter d t J 2 Power upply Power upply Range V Power upply Current I+ V IN = V, or Full 2 µa Notes: a. Room = 2 C, Full = as determined by the operating suffix. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet. c. Typical values are for design aid only, not guaranteed nor subject to production testing. d. Guarantee by design, not subjected to production test. e. V IN = input voltage to perform proper function. f. Crosstalk measured between channels. tresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Rev. F, -Dec-11 3 THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

4 DG273 TYPICAL CHARACTERITIC (T A = 2 C, unless otherwise noted) = 2.6 V = 3. V = 3.3 V = 3.6 V = 4.3 V T = 2 C I = 8 ma D1± = 2.6 V I ON = 8 ma - 4 C + 8 C + 2 C R ON vs. V D and ingle upply Voltage R ON vs. Analog Voltage and Temperature = 3. V I ON = 8 ma - 4 C + 8 C + 2 C = 3.3 V I ON = 8 ma - 4 C + 8 C + 2 C R ON vs. Analog Voltage and Temperature R ON vs. Analog Voltage and Temperature = 3.6 V I ON = 8 ma + 8 C - 4 C + 2 C = 4.3 V I ON = 8 ma + 8 C - 4 C + 2 C R ON vs. Analog Voltage and Temperature R ON vs. Analog Voltage and Temperature Rev. F, -Dec-11 THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

5 DG273 TYPICAL CHARACTERITIC (T A = 2 C, unless otherwise noted) I+ - upply Current (A) 1 ma 1 ma 1 µa 1 µa 1 µa 1 na 1 na 1 na = 4.3 V = 3.6 V = 3.3 V = 3. V = 2.6 V Leakage Current (pa) = 4.3 V I D±(ON) I D±(OFF) I D±(OFF) 1 pa K 1 K 1 K 1 M 1 M Input witching Frequency (Hz) upply Current vs. Input witching Frequency Temperature ( C) Leakage Current vs. Temperature V T - witching Threshold (V) V IH.9.8 V IL upply Voltage (V) Gain (db) Frequency (MHz) witching Threshold vs. upply Voltage Gain vs. Frequency, = 3.3 V Off Isolation (db) Frequency (MHz) Off-Isolation, = 3.3 V Crosstalk (db) Frequency (MHz) Crosstalk, = 3.3 V Rev. F, -Dec-11 THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

6 DG273 TET CIRCUIT witch Input Logic Input HD1± or HD2± D± witch Output R L Ω V OUT C L 3 pf Logic Input witch Output V INH V INL V % t r t f < ns < ns.9 x V OUT V t ON t OFF C L (includes fixture and stray capacitance) V OUT = D± ( ) R L R + L R ON Logic "1" = witch on Logic input waveforms inverted for switches that have the opposite logic sense. Figure 1. witching Time V HD1± HD1± D± V O Logic Input V INH V INL t r < ns t f < ns V HD2± HD2± R L Ω C L 3 pf HD1± = HD2± V O 9 % witch Output V t D t D C L (includes fixture and stray capacitance) Figure 2. Break-Before-Make Interval V gen + R gen V IN = - HD1± or HD2± D± V OUT C L = 1 nf V OUT IN On V OUT Off Q = OUT x C L On IN depends on switch configuration: input polarity determined by sense of switch. Figure 3. Charge Injection Rev. F, -Dec-11 THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

7 DG273 TET CIRCUIT 1 nf 1 nf HD1± or HD2± V, 2.4 V D± Analyzer R L D± V, 2.4 V HD1± or HD2± Meter HP4192A Impedance Analyzer or Equivalent f = 1 MHz Off Isolation = 2 log V D± V HD2± or HD1± Figure 4. Off-Isolation Figure. Channel Off/On Capacitance maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for ilicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg? Rev. F, -Dec-11 7 THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

8 Package Information MINI QFN-1L CAE OUTLINE DIM MILLIMETER INCHE MIN. NAM. MAX. MIN. NAM. MAX. A A b c.1 or.127 REF (1).6 or. REF (1) D E e.4 BC.16 BC L L Note (1) The dimension depends on the leadframe that assembly house used. ECN T Rev. B, 16-May-16 DWG: 97 Revision: 16-May-16 1 Document Number: THI DOCUMENT I UBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCT DECRIBED HEREIN AND THI DOCUMENT ARE UBJECT TO PECIFIC DICLAIMER, ET FORTH AT /doc?91

9 PAD Pattern RECOMMENDED MINIMUM PAD FOR MINI QFN 1L 1.7 (.669) 9 x.63 (.221).663 (.261).2 (.79) (.827).4 (.17) Pitch 1 x.22 (.89) Mounting Footprint Dimensions in mm (inch) Document Number: 664 Revision: -Mar-1 1

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