DG2515, DG Ω, 235-MHz Bandwidth, Dual SPDT Analog Switch. Vishay Siliconix. Not for New Design. RoHS COMPLIANT DESCRIPTION FEATURES BENEFITS

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1 Not for New Design DG, DG -Ω, -MHz Bandwidth, Dual SPDT Analog Switch DESCRIPTION The DG, DG are low-voltage dual single-pole/ double-throw monolithic CMOS analog switches. Designed to operate from.8 V to. V power supply, the DG, DG achieves a bandwidth of MHz while providing low on-resistance ( Ω), excellent on-resistance matching (. Ω) and flatness ( Ω) over the entire signal range. The DG, DG offers the advantage of high linearity that reduces signal distortion, making ideal for audio, video, and USB signal routing applications. Additionally, the DG, DG are. V logic compatible within the full operation voltage range. Built on s proprietary sub-micron highdensity process, the DG, DG brings low power consumption at the same time as reduces PCB spacing with the MSOP package. As a committed partner to the community and the environment, manufactures this product with the lead (Pb)-free device terminations. For analog switching products manufactured with % matte tin device termination, the lead (Pb)-free "- E" suffix is being used as a designator. FEATURES.8 V to. V single supply operation Low R ON : Ω at 4. V MHz, - db bandwidth Low off-isolation, - db at MHz +. V logic compatible BENEFITS High linearity Low power consumption High bandwidth rail signal swing range APPLICATIONS USB/UART signal switching Audio/video switching Cellular phone Media players Modems Hard drives PCMCIA RoHS PLIANT FUNCTIONAL BLOCK DIAGRAM AND P CONFIGURATION DGDQ NO 9 8 NO 4 NC NC TRUTH TABLE Logic NC and NC NO and NO ON OFF OFF ON Top View DGDQ NC 9 8 NO ORDERG FORMATION Temp Range Package Part Number - 4 C to 8 C MSOP- DGDQ-T-E DGDQ-T-E NC 4 NO Top View Document Number: 4 S-889-Rev. B, -Oct-8

2 DG, DG Not for New Design ABSOLUTE MAXIMUM RATGS Parameter Limit Unit Reference to -. to +,, NC, NO a -. to ( +.) V Continuous Current (Any terminal) ± Peak Current (Pulsed at ms, % Duty Cycle) ± ma Storage Temperature (D Suffix) - to C Power Dissipation (Packages) b MSOP- c mw Notes: a. Signals on NC, NO, or or exceeding will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC board. c. Derate 4. mw/ C above C. SPECIFICATIONS = V Parameter Analog Switch Symbol Test Conditions Otherwise Unless Specified = V, ± %, V =. or.4 V e Temp. a Limits - 4 C to 8 C Min. b Typ. c Max. b Analog Signal Range d V NO, V NC, V V On-Resistance R ON =. V, V =. V I NO/NC = ma R ON Flatness R ON Flatness =. V, V =., V I NO/NC = ma R ON Match Between Channels ΔR ON =. V, V =. V I NO/NC = ma Switch Off Leakage Current f I NO(off), I NC(off) I (off) =. V, V NO, V NC =. V/ V V = V/. V Channel-On Leakage Current f I (on) =. V, V NO, V NC = V =. V/ V Digital Control Input High Voltage d V H.4 V Input Low Voltage V L. Input Capacitance C in pf Input Current I L or I H V = V or µa Dynamic Characteristics Turn-On Time t ON =. V, V NO or V NC =. V Turn-Off Time t OFF R L = Ω, C L = pf ns Break-Before-Make Time t d V NO or V NC =. V, R L = Ω, C L = pf Charge Injection d Q J C L = nf, V GEN = V, R GEN = Ω 4 pc - db Bandwidth BW dbm, C L = pf, R L = Ω MHz Off-Isolation d OIRR R L = Ω, C L = pf f = MHz - f = MHz - Crosstalk d X TALK R L = Ω, C L = pf f = MHz - 4 f = MHz - db N O, N C Off Capacitance d C NO(off) C NC(off) V = or, f = MHz pf C NO(on) 4 Channel-On Capacitance d C NC(on) 4 Power Supply Power Supply Current I+ V = or.. µa Unit Ω na Document Number: 4 S-889-Rev. B, -Oct-8

3 Not for New Design DG, DG SPECIFICATIONS = V Parameter Analog Switch Symbol Test Conditions Otherwise Unless Specified = V, ± %, V =.8 or. V e Temp. a Limits - 4 C to 8 C Min. b Typ. c Max. b Analog Signal Range d V NO, V NC, V V On-Resistance R ON = 4. V, V =. V, I NO/NC = ma R ON Flatness R ON Flatness = 4. V, V =,,. V I NO/NC = ma R ON Match Between Channels ΔR ON = 4. V, V =. V, I NO/NC = ma Switch Off Leakage Current I NO(off), I NC(off) I (off) =. V V NO, V NC = V/4. V, V = 4. V/ V Channel-On Leakage Current I (on) =. V, V NO, V NC = V = V/4. V Notes: a. = C, = as determined by the operating suffix. b. Typical values are for design aid only, not guaranteed nor subject to production testing. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Guarantee by design, nor subjected to production test. e. V = input voltage to perform proper function. f. Guaranteed by V leakage testing, not production tested. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Digital Control Input High Voltage d V H. Input Low Voltage V L.8 V Input Capacitance C in pf Input Current I L or I H V = V or µa Dynamic Characteristics Turn-On Time t ON = 4. V, V NO or V NC = V Turn-Off Time t OFF R L = Ω, C L = pf 4 ns Break-Before-Make Time t d V NO or V NC = V, R L = Ω, C L = pf Charge Injection d Q J C L = nf, V GEN = V, R GEN = Ω 49 pc - db Bandwidth BW dbm, C L = pf, R L = Ω MHz Off-Isolation d OIRR R L = Ω, C L = pf f = MHz - f = MHz - Crosstalk d X TALK R L = Ω, C L = pf f = MHz - 4 f = MHz - db C NO(off) Source Off Capacitance d C NC(off) V = or, f = MHz C NO(on) 4 pf Channel-On Capacitance d C NC(on) 4 Power Supply Power Supply Range.8. V Power Supply Current I+ V = or.. µa Unit Ω na Document Number: 4 S-889-Rev. B, -Oct-8

4 DG, DG Not for New Design TYPICAL CHARACTERISTICS C, unless otherwise noted On-Resistance (Ω) R O N =.8 V =. V T = C I S = ma = 4. V 4 V - Analog Voltage (V) R ON vs. V and Supply Voltage On-Resistance (Ω) R O N - ) A = V V = V n t ( n e r l r u y C p t =. V 8 C C 4-4 C = 4. V 8 C - C - 4 C 4 V - Analog Voltage (V) R ON vs. Analog Voltage and Temperature ma A ) ma µa r e n t ( µa µa p u I + - S r y C u p p t I l = V + - S u na na na Temperature ( C) Supply Current vs. Temperature pa K K K M M Input Switching Frequency (Hz) Supply Current vs. Input Switching Frequency ( p A ) g e C u r r e n = V I (on) I NO(off), I NC(off) ( p A ) k a g e C u r r e n = V I (on) I NO(off), I NC(off) L e a k a I (off) L e a I (off) Temperature ( C) Leakage Current vs. Temperature V, V NO, V NC - Analog Voltage (V) Leakage vs. Analog Voltage 4 Document Number: 4 S-889-Rev. B, -Oct-8

5 Not for New Design DG, DG TYPICAL CHARACTERISTICS C, unless otherwise noted R L = Ω t ON = 4. V Switching Time (µs) - Loss (db) t OF F t O N / t OFF =. V = V R L = Ω Temperature ( C) Switching Time vs. Temperature - K M M M G Frequency (Hz) Insertion Loss vs. Frequency - - = V R L = Ω 4 O IRR, X TAL K (db) OIRR Charge Injection (pc) - = V = V X TALK Q K M M M G Frequency (Hz) Off-Isolation and Crosstalk vs. Frequency - 4 V - Analog Voltage (V) Charge Injection vs. Analog Voltage. - Switching Thr eshold (V ).... V T Supply Voltage (V) Switching Threshold vs. Supply Voltage Document Number: 4 S-889-Rev. B, -Oct-8

6 DG, DG Not for New Design TEST CIRCUITS Logic Input Switch Input NO or NC V Switch Output R L Ω V OUT C L pf Logic Input Switch Output V H V L V t ON % t r < ns t f < ns.9 x V OUT t OFF C L (includes fixture and stray capacitance) R V OUT V L R L R ON Logic = Switch On Logic input waveforms inverted for switches that have the opposite logic sense. Figure. Switching Time Logic Input V H t r < ns t f < ns V NO NO V O V L V NC NC R L Ω C L pf V NC = V NO V O 9 % Switch Output V t D t D C L (includes fixture and stray capacitance) Figure. Break-Before-Make Interval V gen + R gen V = - NC or NO V OUT C L = nf V OUT On ΔV OUT Off On Q = ΔV OUT x C L depends on switch configuration: input polarity determined by sense of switch. Figure. Charge Injection Document Number: 4 S-889-Rev. B, -Oct-8

7 Not for New Design DG, DG TEST CIRCUITS nf nf NC or NO V,. V R L V,. V NC or NO Meter HP49A Impedance Analyzer or Equivalent Analyzer V Off Isolation = log V NO NC f = MHz Figure 4. Off-Isolation Figure. Channel Off/On Capacitance maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see Document Number: 4 S-889-Rev. B, -Oct-8

8 Package Information MSOP: LEADS JEDEC Part Number: MO-8, (Variation AA and BA) (N/) Tips) N N- A B C X. E..48 Max Detail B (Scale: /) Dambar Protrusion.. N/ Top View b.8 M C B S A S b e See Detail B e A With Plating c c. BSC Parting Line L 4 Detail A (Scale: /) NOTES:. Die thickness allowable is.... Dimensioning and tolerances per ANSI.Y4.M Dimensions D and E do not include mold flash or protrusions, and are measured at Datum plane -H-, mold flash or protrusions shall not exceed. mm per side. 4. Dimension is the length of terminal for soldering to a substrate.. Terminal positions are shown for reference only.. Formed leads shall be planar with respect to one another within. mm at seating plane.. The lead width dimension does not include Dambar protrusion. Allowable Dambar protrusion shall be.8 mm total in excess of the lead width dimension at maximum material condition. Dambar cannot be located on the lower radius or the lead foot. Minimum space between protrusions and an adjacent lead to be.4 mm. See detail B and Section C-C. 8. Section C-C to be determined at. mm to. mm from the lead tip. 9. Controlling dimension: millimeters. D Side View.9. This part is compliant with JEDEC registration MO-8, variation AA and BA.. Datums -A- and -B- to be determined Datum plane -H-.. Exposed pad area in bottom side is the same as teh leadframe pad size. A. R. Min Places Seating Plane. C Seating Plane Base Metal See Detail A A. S Section C-C Scale: / (See Note 8) ς E End View N = L MILLIMETERS Dim Min Nom Max Note A - -. A... A..8.9 b b... 8 c. -. c...8 D. BSC E 4.9 BSC E.9.. e. BSC e. BSC L N 4 ECN: T-8 Rev. C, -Jul- DWG: 8 C C -H- -A- -C- -B- Document Number: 4 -Jul-

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