MC14013B. Dual Type D Flip-Flop

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1 M403B ual Type Flip-Flop The M403B dual type flipflop is cotructed with MO Pchannel and Nchannel enhancement mode devices in a single monolithic structure. Each flipflop has independent ata, (), irect et, (), irect Reset, (R), and lock () inputs and complementary outputs ( and ). These devices may be used as shift register elements or as type T flipflops for counter and toggle applicatio. Features tatic Operation iode Protection on ll Inputs upply Voltage Range = 3.0 to 8 Logic Edgelocked FlipFlop esign Logic tate is Retained Indefinitely with lock Level either High or Low; Information is Traferred to the Output only on the Positivegoing Edge of the lock Pulse apable of riving Two Lowpower TTL Loads or One Lowpower chottky TTL Load Over the Rated Temperature Range PinforPin Replacement for 403B NLV Prefix for utomotive and Other pplicatio Requiring Unique ite and ontrol hange Requirements; E0 ualified and PPP apable These evices are PbFree, Halogen Free and are RoH ompliant OI4 UFFIX E OEIJ4 F UFFIX E 96 PIN IGNMENT R V V B B B R B B B TOP4 T UFFIX E 948G MXIMUM RTING (Voltages Referenced to V ) ymbol Parameter Value Unit V upply Voltage Range 0. to +8.0 V V in, V out Input or Output Voltage Range ( or Traient) 0. to V + 0. V I in, I out P Input or Output urrent ( or Traient) per Pin Power issipation, per Package (Note ) ± m 00 mw T mbient Temperature Range to + T stg torage Temperature Range 6 to +0 T L Lead Temperature (8econd oldering) 60 tresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. Temperature erating: /W Packages:.0 mw/ From 6 To This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V in and V out should be cotrained to the range V (V in or V out ) V. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V or V ). Unused outputs must be left open BG WLYWW OI4 MRKING IGRM 4 WL, L YY, Y WW, W G or 4 03B LYW TOP4 4 M403B LYWG OEIJ4 = ssembly Location = Wafer Lot = Year = Work Week = PbFree Package (Note: Microdot may be in either location) ORERING INFORMTION ee detailed ordering and shipping information in the package dimeio section on page of this data sheet. emiconductor omponents Industries, LL, 04 July, 04 Rev. Publication Order Number: M403B/

2 M403B TRUTH TBLE Inputs Outputs lock ata Reset et X 0 0 X X 0 0 X X 0 0 X X X = on t are = Level hange No hange BLOK IGRM 6 3 R R V = PIN 4 V = PIN ORERING INFORMTION evice Package hipping M403BG NLV403BG* M403BRG NLV403BRG* M403BTRG OI4 (PbFree) OI4 (PbFree) OI4 (PbFree) OI4 (PbFree) TOP4 (PbFree) Units / Rail Units / Rail 00 Units / Tape & Reel 00 Units / Tape & Reel 00 Units / Tape & Reel NLV403BTRG* M403BFG TOP4 (PbFree) OEIJ4 (PbFree) 00 Units / Tape & Reel 0 Units / Rail M403BFELG OEIJ4 (PbFree) 000 Units / Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging pecificatio Brochure, BR80/. *NLV Prefix for utomotive and Other pplicatio Requiring Unique ite and ontrol hange Requirements; E0 ualified and PPP apable.

3 M403B ELETRIL HRTERITI (Voltages Referenced to V ) haracteristic Output Voltage V in = V or 0 V in = 0 or V Input Voltage (V O = 4. or 0. ) (V O = 9.0 or.0 ) (V O = 3. or. ) 0 Level Level 0 Level (V O = 0. or 4. ) Level (V O =.0 or 9.0 ) (V O =. or 3. ) Output rive urrent (V OH =. ) ource (V OH = 4.6 ) (V OH = 9. ) (V OH = 3. ) (V OL = 0.4 ) ink (V OL = 0. ) (V OL =. ) ymbol V V OL V OH V IL V IH I OH I OL Min Max Min Typ () Max Min Max Input urrent I in ±0. ± ±0. ±.0 dc Input apacitance (V in = 0) uiescent urrent (Per Package) Total upply urrent (3) (4) (ynamic plus uiescent, Per Package) ( L = 0 pf on all outputs, all buffers switching) in. pf I I T I T = (0. /khz) f + I I T = (. /khz) f + I I T = (.3 /khz) f + I Product parametric performance is indicated in the Electrical haracteristics for the listed test conditio, unless otherwise noted. Product performance may not be indicated by the Electrical haracteristics if operated under different conditio.. ata labelled Typ is not to be used for design purposes but is intended as an indication of the I s potential performance. 3. The formulas given are for the typical characteristics only at. 4. To calculate total supply current at loads other than 0 pf: I T ( L ) = I T (0 pf) + ( L 0) Vfk where: I T is in (per package), L in pf, V = (V V ) in volts, f in khz is input frequency, and k = Unit mdc mdc dc dc 3

4 M403B WITHING HRTERITI (Note ) ( L = 0 pf, T = ) haracteristic ymbol V Min Typ (Note 6) Max Unit Output Rise and Fall Time t TLH, t THL = (. /pf) L + t TLH, t THL 0 00 t TLH, t THL = (0. /pf) L t TLH, t THL = (0. /pf) L Propagation elay Time lock to, t PLH, t PHL = (. /pf) L + 90 t PLH, t PHL = (0.66 /pf) L + 4 t PLH, t PHL = (0. /pf) L + et to, t PLH, t PHL = (. /pf) L + 90 t PLH, t PHL = (0.66 /pf) L + 4 t PLH, t PHL = (0. /pf) L + Reset to, t PLH, t PHL = (. /pf) L + 6 t PLH, t PHL = (0.66 /pf) L + 6 t PLH, t PHL = (0. /pf) L + 0 t PLH t PHL etup Times (Note ) t su Hold Times (Note ) t h lock Pulse Width t WL, t WH lock Pulse Frequency f cl lock Pulse Rise and Fall Time t TLH t THL et and Reset Pulse Width t WL, t WH Removal Times et t rem Reset. The formulas given are for the typical characteristics only at. 6. ata labelled Typ is not to be used for design purposes but is intended as an indication of the I s potential performance.. ata must be valid for 0 with a V supply, 0 with V, and 0 with V MHz s LOGI IGRM (/ of evice hown) R 4

5 M403B 0 0 t su (H) t WH 0% % t su (L) t h f cl t PLH 0% % 0% % t WL t PHL V V 0 V V V OH V OL ET OR REET LOK OR 0 0 t PLH t PHL t w 0% % t rem 0 0 0% % 0% t w V V V V V OH V OL Inputs R and low. t TLH t THL Figure. ynamic ignal Waveforms (ata, lock, and Output) Figure. ynamic ignal Waveforms (et, Reset, lock, and Output) TYPIL PPLITION ntge HIFT REGITER n th LOK BINRY RIPPLE UPOUNTER (ivideby n ) n th LOK T FLIP-FLOP MOIFIE RING OUNTER (ivideby(n+)) n th LOK

6 M403B PKGE IMENION OI4 NB E 03 IUE K H M B M e 3X b B E 0. M B ETING PLNE L ETIL h X 4 M 3 ETIL NOTE:. IMENIONING N TOLERNING PER ME Y4.M, ONTROLLING IMENION: MILLIMETER. 3. IMENION b OE NOT INLUE MBR PROTRUION. LLOWBLE PROTRUION HLL BE 0.3 TOTL IN EXE OF T MXIMUM MTERIL ONITION. 4. IMENION N E O NOT INLUE MOL PROTRUION.. MXIMUM MOL PROTRUION 0. PER IE. MILLIMETER INHE IM MIN MX MIN MX b E e. B 0 B H h L M 0 0 OLERING FOOTPRINT* 6.0 4X.8. PITH 4X 0.8 IMENION: MILLIMETER *For additional information on our PbFree strategy and soldering details, please download the ON emiconductor oldering and Mounting Techniques Reference Manual, OLERRM/. 6

7 M403B PKGE IMENION TOP4 E 948G IUE B 0. (0.006) T 0. (0.006) T L 0. (0.004) T ETING PLNE U U X L/ PIN IENT. 4 4X K REF 0. (0.004) M T U V N 8 0. (0.0) M B U V G H N J J F ETIL E K K ETIL E ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ ETION NN NOTE:. IMENIONING N TOLERNING PER NI Y4.M, 98.. ONTROLLING IMENION: MILLIMETER. 3. IMENION OE NOT INLUE MOL FLH, PROTRUION OR GTE BURR. MOL FLH OR GTE BURR HLL NOT EXEE 0. (0.006) PER IE. 4. IMENION B OE NOT INLUE INTERLE FLH OR PROTRUION. INTERLE FLH OR PROTRUION HLL NOT EXEE 0. (0.0) PER IE.. IMENION K OE NOT INLUE MBR PROTRUION. LLOWBLE MBR PROTRUION HLL BE 0.08 (0.003) TOTL IN EXE OF THE K IMENION T MXIMUM MTERIL ONITION. 6. TERMINL NUMBER RE HOWN FOR REFERENE ONLY.. IMENION N B RE TO BE ETERMINE T TUM PLNE W. MILLIMETER INHE IM MIN MX MIN MX B F G 0.6 B 0.06 B H J J W K K L 6.40 B 0. B M OLERING FOOTPRINT* PITH 4X X.6 IMENION: MILLIMETER *For additional information on our PbFree strategy and soldering details, please download the ON emiconductor oldering and Mounting Techniques Reference Manual, OLERRM/.

8 M403B PKGE IMENION OEIJ4 E 96 IUE B L E 4 8 E H E M L Z ETIL P VIEW P e c b 0.3 (0.00) M 0. (0.004) NOTE:. IMENIONING N TOLERNING PER NI Y4.M, 98.. ONTROLLING IMENION: MILLIMETER. 3. IMENION N E O NOT INLUE MOL FLH OR PROTRUION N RE MEURE T THE PRTING LINE. MOL FLH OR PROTRUION HLL NOT EXEE 0. (0.006) PER IE. 4. TERMINL NUMBER RE HOWN FOR REFERENE ONLY.. THE LE WITH IMENION (b) OE NOT INLUE MBR PROTRUION. LLOWBLE MBR PROTRUION HLL BE 0.08 (0.003) TOTL IN EXE OF THE LE WITH IMENION T MXIMUM MTERIL ONITION. MBR NNOT BE LOTE ON THE LOWER RIU OR THE FOOT. MINIMUM PE BETWEEN PROTRUION N JENT LE TO BE 0.46 ( 0.08). MILLIMETER INHE IM MIN MX MIN MX b c E e. B 0 B H E L L E M Z ON emiconductor and the are registered trademarks of emiconductor omponents Industries, LL (ILL) or its subsidiaries in the United tates and/or other countries. ILL ow the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of ILL s product/patent coverage may be accessed at ILL reserves the right to make changes without further notice to any products herein. ILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in ILL data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. ILL does not convey any licee under its patent rights nor the rights of others. ILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the ILL product could create a situation where personal injury or death may occur. hould Buyer purchase or use ILL products for any such unintended or unauthorized application, Buyer shall indemnify and hold ILL and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ILL was negligent regarding the design or manufacture of the part. ILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLITION ORERING INFORMTION LITERTURE FULFILLMENT: Literature istribution enter for ON emiconductor P.O. Box 63, enver, olorado 80 U Phone: 3036 or Toll Free U/anada Fax: or Toll Free U/anada [email protected] N. merican Technical upport: Toll Free U/anada Europe, Middle East and frica Technical upport: Phone: Japan ustomer Focus enter Phone: ON emiconductor Website: Order Literature: For additional information, please contact your local ales Representative M403B/

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