CS8182. Micropower 200 ma Low Dropout Tracking Regulator/Line Driver

Transcription

1 Micropower 2 m Low Dropout Tracking Regulator/Line Driver The is a monolithic integrated low dropout tracking regulator designed to provides an adjustable buffered output voltage that closely tracks (±1 mv) the reference input. The output delivers up to 2 m while being able to be configured higher, lower or equal to the reference voltages. The device has been designed to operate over a wide range (2.8 V to 45 V) while still maintaining excellent DC characteristics. The is protected from reverse battery, short circuit and thermal runaway conditions. The device also can withstand 45 V load dump transients and 5 V reverse polarity input voltage transients. This makes it suitable for use in automotive environments. The V REF / lead serves two purposes. It is used to provide the input voltage as a reference for the output and it also can be pulled low to place the device in sleep mode where it nominally draws 3 from the supply. Features 2 m Source Capability Output Tracks within ±1 mv Worst Case Low Dropout (.35 V 2 m) Low Quiescent Current Thermal Shutdown Short Circuit Protection Wide Operating Range Internally Fused Leads in SO8 Package For utomotive and Other pplications Requiring Site and Change Control These are PbFree Devices 8 SO8 DF SUFFIX CSE 751 CS 8182 WLYWWG 1 1 WL, L Y WW, W G or 1 5 D 2 PK5 DPS SUFFIX CSE 936C PIN CONNECTIONS ND MRKING DIGRMS 1 8 dj Tab Pin 8182 LYW dj 5. V REF 1 = ssembly Location = Wafer Lot = Year = Work Week = PbFree Device 5 DPK5 DT SUFFIX CSE 175 V REF / 8182G LYWW 1 5 Current Limit & ST Sense ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. dj + V REF / Thermal Shutdown + 2. V Figure 1. Block Diagram Semiconductor Components Industries, LLC, 212 September, 212 Rev Publication Order Number: /D

2 PCKGE PIN DESCRIPTION Package Lead Number SO8 D 2 PK 5PIN DPK 5PIN Lead Symbol Input Voltage Function Regulated Output 2, 3, 6, Ground dj djust Lead V REF / Reference Voltage and Input MXIMUM RTINGS Rating Value Unit Storage Temperature Range 65 to +15 C Junction Temperature +15 C Supply Voltage Range (Continuous) 16 to 45 V Peak Transient Voltage ( = 14 V, Load Dump Transient = 31 V) 45 V Voltage Range (dj,, V REF /) 1 to + V Package Thermal Resistance, SO8: JunctiontoCase, R JC 25 Junctiontoir, R J 8 Package Thermal Resistance, D 2 PK JunctiontoCase, R JC 4. Junctiontoir, R J 48 Package Thermal Resistance, DPK JunctiontoCase, R JC 8. Junctiontoir, R J 64 C/W C/W C/W C/W C/W C/W ESD Capability (Human Body Model) (Machine Model) 2. 2 kv V Lead Temperature Soldering: (Note 1) (SO8) (D 2 PK) (DPK) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability second maximum above 183 C C RECOMMENDED OPERTING RNGES Rating Value Unit Junction Temperature, T J 4 to+125 C Input Voltage, Continuous 3.4 to 45 V 2

3 ELECTRICL CHRCTERISTICS ( = 14 V; V REF / > 2.75 V; 4 C < T J < +125 C; C OUT 1 F;.1 < C OUTESR < 1 khz, unless otherwise specified.) Regular Output Parameter Test Conditions Min Typ Max Unit V REF Tracking Error 4.5 V 26 V, 1 I OUT 2 m, Note 2 = 12 V, I OUT = 3 m, V REF = 5. V, Note mv mv Dropout Voltage ( ) I OUT = 1 I OUT = 3 m I OUT = 2 m mv mv mv Line Regulation 4.5 V 26 V, Note 2 1 mv Load Regulation 1 I OUT 2 m, Note 2 1 mv dj Lead Current Loop in Regulation.2 1. Current Limit = 14 V, V REF = 5. V, = 9% of V REF, Note m Quiescent Current (I IN I OUT ) = 12 V, I OUT = 2 m = 12 V, I OUT = 1 = 12 V, V REF / = V m Reverse Current = 5. V, = V m Ripple Rejection f = 12 Hz, I OUT = 2 m, 4.5 V 26 V 6 db Thermal Shutdown GBD C V REF / Enable Voltage V Input Bias Current V REF / connected to dj lead. 3

4 TYPICL CHRCTERISTICS 18 QUIESCENT CURRENT (m) OUTPUT CURRENT (m) Figure 2. Quiescent Current vs. Output Current QUIESCENT CURRENT (m) I ( ) = 2 m I ( ) = 1 m , INPUT VOLTGE (V) Figure 3. Quiescent Current vs. Input Voltage (Operating Mode) QUIESCENT CURRENT ( ) V REF / = V , INPUT VOLTGE (V) Figure 4. Quiescent Current vs. Input Voltage (Sleep Mode) CURRENT INTO (m) * Graph is duplicate for > 1.6 V. **Dip (@5 V) shifts with V REF voltage. = 6 V* 6 V REF = 5 V** 4 2 = V FORCED VOLTGE (V) Figure 5. Reverse Current CURRENT INTO (m) * Graph is duplicate for > 1.6 V. **Dip (@5 V) shifts with V REF voltage FORCED VOLTGE (V) Figure 6. Reverse Current = V = 6 V* V REF = 5 V** 4

5 CIRCUIT DESCRIPTION Function By pulling the V REF / lead below 2. V typically, (see Figure 1 or Figure 11), the IC is disabled and enters a sleep state where the device draws less than 55 from supply. When the V REF / lead is greater than 2.75 V, tracks the V REF / lead normally. Output Voltage The output is capable of supplying 2 m to the load while configured as a similar (Figure 7), lower (Figure 9), or higher (Figure 8) voltage as the reference lead. The dj lead acts as the inverting terminal of the op amp and the V REF lead as the noninverting. The device can also be configured as a highside driver as displayed in Figure 12., 2 m Loads C2** 1 F dj V REF / VOUT VREF 1 nf 1. F 5. V Figure 7. Tracking Regulator at the Same Voltage, 2 m Loads C2** 1 F R F R dj V REF / 1 nf 1. F V REF VOUT VREF(1 R E R ) Figure 8. Tracking Regulator at Higher Voltages, 2 m Loads C2** 1 F dj V REF / 1 nf 1. F R1 R2 V REF C2** 1 F from MCU, 2 m dj V REF / 1 nf 1. F R V REF VOUT VREF( R2 R1 R2 ) Figure 9. Tracking Regulator at Lower Voltages Figure 1. Tracking Regulator with Circuit 6. V4 V 1 nf NCV851 V REF (5. V) 2 m 5. V To Load 1 F (e.g. sensor) dj V REF / 1. F I/O 1 nf C dj V REF / VOUT B VST 1 nf MCU Figure 11. lternative Circuit * C1 is required if the regulator is far from the power source filter. ** C2 is required for stability. *** C3 is recommended for EMC susceptibility. Figure 12. HighSide Driver 5

6 PPLICTION NOTES Short to Battery The will survive a short to battery when hooked up the conventional way as shown in Figure 13. No damage to the part will occur. The part also endures a short to battery when powered by an isolated supply at a lower voltage as in Figure 14. In this case the supply input voltage is set at 7 V when a short to battery (14 V typical) occurs on which normally runs at 5 V. The current into the device (ammeter in Figure 14) will draw additional current as displayed in Figure 15. Short to battery Loads C2** 1 F 7 m 1. F + utomotive Battery typically 14 V dj V REF / = V REF 1 nf 5. V + 5. V Figure 13. Short to battery utomotive Battery typically 14 V Loads C2** 1 F 7 m 1. F 7 V + * C1 is required if the regulator is far from the power source filter. ** C2 is required for stability. *** C3 is recommended for EMC susceptibility. dj Figure 14. V REF / = V REF 1 nf 5. V + 5. V CURRENT (m) VOLTGE (V) Figure 15. Short to Battery Switched pplication The has been designed for use in systems where the reference voltage on the V REF / pin is continuously on. Typically, the current into the V REF / pin will be less than 1. when the voltage on the pin (usually the ignition line) has been switched out ( can be at high impedance or at ground.) Reference Figure 16. Ignition Switch C2 1 F dj V REF / < 1. C1 1. F V REF 5. V V BT Figure 16. 6

7 External Capacitors The output capacitor for the is required for stability. Without it, the regulator output will oscillate. ctual size and type may vary depending upon the application load and temperature range. Capacitor effective series resistance (ESR) is also a factor in the IC stability. Worstcase is determined at the minimum ambient temperature and maximum load expected. The output capacitor can be increased in size to any desired value above the minimum. One possible purpose of this would be to maintain the output voltage during brief conditions of negative input transients that might be characteristic of a particular system. The capacitor must also be rated at all ambient temperatures expected in the system. To maintain regulator stability down to 4 C, a capacitor rated at that temperature must be used. Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 17) is: PD(max) {VIN(max) VOUT(min)} IOUT(max) VIN(max)IQ (1) where: (max) is the maximum input voltage, (min) is the minimum output voltage, I OUT(max) is the maximum output current, for the application,and I Q is the quiescent current the regulator consumes at I OUT(max). Once the value of PD(max) is known, the maximum permissible value of R J can be calculated: R J 15 C T (2) PD The value of R J can then be compared with those in the package section of the data sheet. Those packages with R J s less than the calculated value in equation 2 will keep the die temperature below 15 C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required. I IN SMRT REGULTOR Heatsinks Control Features I OUT Figure 17. Single Output Regulator with Key Performance Parameters Labeled I Q heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of R J: R J R JC R CS R S (3) where: R JC = the junctiontocase thermal resistance, R CS = the casetoheatsink thermal resistance, and R S = the heatsinktoambient thermal resistance. R JC appears in the package section of the data sheet. Like R J, it is a function of package type. R CS and R S are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heatsink manufacturers. 7

8 J ( C/W) oz 2 oz J ( C/W) oz 2 oz COPPER RE (mm 2 ) COPPER RE (mm 2 ) Figure Lead SOIC (Fused) Thermal Resistance Figure Lead DPK Thermal Resistance 8 J ( C/W) oz 2 oz Figure 2. 5 Lead D 2 PK Thermal Resistance 8 J ( C/W) COPPER RE (mm 2 ) COPPER RE (mm 2 ) Lead SOIC w/ 4 Thermal Leads 1 oz 8 Lead SOIC w/ 4 Thermal Leads 2 oz 2 5 Lead DPK 1 oz 5 Lead D 2 PK 1 oz Lead DPK 2 oz 5 Lead D 2 PK 2 oz Figure 21. Thermal Resistance Summary 8 8

9 ORDERING INFORMTION YDF8G Device Package Shipping SO8 (PbFree) 95 Units / Rail YDFR8G YDPS5G YDPSR5G DTG SO8 (PbFree) D 2 PK 5PIN (PbFree) D 2 PK 5PIN (PbFree) DPK 5L (PbFree) 25 / Tape & Reel 5 Units / Rail 75 / Tape & Reel 5 Units / Rail DTRKG DPK 5L (PbFree) 25 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. 9

10 PCKGE DIMENSIONS SOIC8 DF SUFFIX CSE 7517 ISSUE K X B Y S.25 (.1) M Y M K NOTES: 1. DIMENSIONING ND TOLERNCING PER NSI Y14.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION ND B DO NOT INCLUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION.15 (.6) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE.127 (.5) TOTL IN EXCESS OF THE D DIMENSION T MXIMUM MTERIL CONDITION THRU 7516 RE OBSOLETE. NEW STNDRD IS Z H G D C.25 (.1) M Z Y S X S SETING PLNE.1 (.4) N X 45 M J MILLIMETERS INCHES DIM MIN MX MIN MX B C D G 1.27 BSC.5 BSC H J K M 8 8 N S SOLDERING FOOTPRINT* SCLE 6:1 mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 1

11 PCKGE DIMENSIONS D 2 PK5 DP SUFFIX CSE 936C ISSUE L1 D E E/2 c2 H B SETING PLNE DETIL C E1.1 M B D1 M NOTES: 1. DIMENSIONING ND TOLERNCING PER SME Y14.5M, CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS D ND E DO NOT INCLUDE MOLD FLSH ND GTE PROTRUSIONS. MOLD FLSH ND GTE PROTRUSIONS NOT TO EXCEED.5 MXIMUM PER SIDE. THESE DIMENSIONS TO BE MESURED T DTUM H. 4. THERML PD CONTOUR OPTIONL WITHIN DIMENSIONS E, L1, D1, ND E1. DIMENSIONS D1 ND E1 ESTBLISH MINIMUM MOUNTING SURFCE FOR THE THERML PD. 5X b.13 M B M e RECOMMENDED SOLDERING FOOTPRINT*.424 c H VIEW SETING B PLNE 1 L3 L GUGE PLNE INCHES MILLIMETERS DIM MIN MX MIN MX b c c D D E E e.67 BSC 1.7 BSC H L L L3.1 BSC.25 BSC M M DETIL C.176 5X.4.67 PITCH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 11

12 PCKGE DIMENSIONS DPK5 DT SUFFIX CSE 175 ISSUE B C T SETING PLNE NOTES: 1. DIMENSIONING ND TOLERNCING PER NSI Y14.5M, CONTROLLING DIMENSION: INCH. V S F R G L K D 5 PL J H.13 (.5) M T E U R1 Z INCHES MILLIMETERS DIM MIN MX MIN MX B C D E F G.18 BSC 4.56 BSC H J K L.45 BSC 1.14 BSC R R S U.2.51 V Z SOLDERING FOOTPRINT* SCLE 4:1 mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SMRT REGULTOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of SCILLC s product/patent coverage may be accessed at SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 US Phone: or Toll Free US/Canada Fax: or Toll Free US/Canada orderlit@onsemi.com N. merican Technical Support: Toll Free US/Canada Europe, Middle East and frica Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative /D