SEMICONDUCTOR TECHNICAL DATA

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1 SEMICONDUCTOR TECHNICAL DATA The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is desired. Supply Voltage Range =. Vdc to Vdc All Outputs Buffered Capable of Driving Two Low power TTL Loads or One Low power Schottky TTL Load Over the Rated Temperature Range. Double Diode Protection on All Inputs Except: Triple Diode Protection on MCB and MCB Pin for Pin Replacements for Corresponding CD Series B Suffix Devices (Exceptions: MCB and MCB) L SUFFIX CERAMIC CASE P SUFFIX PLASTIC CASE ORDERING INFORMATION D SUFFIX SOIC CASE A MCXXXBCP Plastic MCXXXBCL Ceramic MCXXXBD SOIC TA = to C for all packages. MAXIMUM RATINGS (Voltages Referenced to ) Symbol Parameter Value Unit Î ÎÎ DC Supply Voltage. to +. Î ÎÎ V Vin, Vout Input or Output Voltage (DC or Transient). to +. Î ÎÎ V lin, lout Input or Output Current (DC or Transient), ± ma Î ÎÎ Î per Pin PD ÎÎ Power Dissipation, per Package Î mw Tstg ÎÎ Storage Temperature to + Î C TL ÎÎ Lead Temperature ( Second Soldering) C Maximum Ratings are those values beyond which damage to the device may occur. Temperature Derating: Plastic P and D/DW Packages:. mw/ C From C To C Ceramic L Packages: mw/ C From C To C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range (Vin or Vout). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either or ). Unused outputs must be left open. REV / MOTOROLA Motorola, Inc. CMOS LOGIC DATA MCB

2 LOGIC DIAGRAMS NOR NAND OR AND MCB Quad Input NOR Gate MCB Quad Input NAND Gate MCB Quad Input OR Gate MCB Quad Input AND Gate INPUT MCB Triple Input NOR Gate MCB Triple Input NAND Gate MCB Triple Input OR Gate MCB Triple Input AND Gate INPUT MCB Dual Input NOR Gate MCB Dual Input NAND Gate MCB Dual Input OR Gate MCB Dual Input AND Gate INPUT =, =, =, =, INPUT MCB Input NOR Gate MCB Input NAND Gate =, =, = PIN = PIN FOR ALL DEVICES MCB

3 PIN ASSIGNMENTS MCB Quad Input NOR Gate MCB Dual Input NOR Gate MCB Quad Input NAND Gate MCB Dual Input NAND Gate IN A IN A IN A IN D IN A IN A IN D IN A IN D IN A IN B IN D IN A IN B OUTD IN A IN B OUTD IN A IN B IN B IN A IN B IN B IN A IN B IN B IN C IN B IN B IN C IN B IN C IN C MCB Triple Input NAND Gate MCB Triple Input NOR Gate MCB Input NAND Gate MCB Quad Input OR Gate IN A IN A IN A IN A IN C IN A IN C IN OUT IN A IN D IN B IN C IN B IN C IN IN IN D IN B IN C IN B IN C IN IN OUTD IN B IN B IN IN IN B IN IN B IN C IN A IN A IN C MCB Dual Input OR Gate MCB Triple Input AND Gate MCB Triple Input OR Gate MCB Input NOR Gate IN A IN A IN A IN A IN C IN A IN C IN OUT IN A IN B IN B IN C IN B IN C IN IN IN A IN B IN B IN C IN B IN C IN IN IN A IN B IN B IN B IN IN IN B IN IN A IN A MCB Quad Input AND Gate MCB Dual Input AND Gate IN A IN A IN D IN A IN D IN A IN B OUTD IN A IN B IN B IN A IN B IN B IN C IN B IN C = NO CONNECTION MCB

4 Î Î Î ELECTRICAL CHARACTERISTICS (Voltages Referenced to ) Î C C C Î Characteristic Î Symbol Vdc Î Min Max Min Typ # Max Min Max Unit Î Output Voltage Level Î VOL.. Î. Î. Vdc Î Vin = or Î Î. Î Î..... Level VOH..... Vdc Î Vin = or Î. Î. Î Î. Î Î Î. Î. Î. Î Input Voltage Level Î VIL Î Vdc (VO =. or. Vdc)..... Î (VO =. or. Vdc) Î Î. Î.. Î. Î Î (VO =. or. Vdc) Î. Î Î.. Î. Level Î VIH Vdc (VO =. or. Vdc)..... Î Î Î (VO =. or. Vdc). Î (VO =. or. Vdc).. Î.. ÎÎ Output Drive Current Î IOH madc Î (VOH =. Vdc) Source..... Î (VOH =. Vdc) Î Î.. Î (VOH =. Vdc) (VOH =. Vdc)... Î ÎÎ. Î Î Î Î Î (VOL =. Vdc) Sink IOL..... madc Î (VOL =. Vdc) Î. (VOL =. Vdc) Î Î Î Î Î Î Î Î Input Current Iin ±. ±. ±. ±. µadc Î Î Î Î Î Input Capacitance Cin (Vin = ).. Î Î pf Quiescent Current IDD..... µadc Î Î (Per Package) ÎÎ Î Total Supply Current Î IT. ÎÎ IT = (. µa/khz) f + IDD/N µadc Î (Dynamic plus Quiescent, IT = (. µa/khz) f + IDD/N Î Per Gate, CL = pf) IT = (. µa/khz) f + IDD/N #Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. The formulas given are for the typical characteristics only at C. To calculate total supply current at loads other than pf: IT(CL) = IT( pf) + (CL ) Vfk where: IT is in µa (per package), CL in pf, V = ( ) in volts, f in khz is input frequency, and k =. x the number of exercised gates per package. MCB

5 Î B SERIES GATE SWITCHING TIMES Î Î SWITCHING CHARACTERISTICS (CL = pf, TA = C) Î Characteristic Symbol Vdc Min Typ # Max Unit ÎÎ Î Î Output Rise Time, All B Series Gates ttlh ns Î Î ÎÎ ttlh = (. ns/pf) CL + ns. Î Î Î Î Î ÎÎ Î ttlh = (. ns/pf) CL + ns ttlh = (. ns/pf) CL + ns Î Î ÎÎ Î Î Output Fall Time, All B Series Gates tthl ns Î tthl = (. ns/pf) CL + ns Î ÎÎ Î Î Î. Î Î ÎÎ Î tthl = (. ns/pf) CL + ns tthl = (. ns/pf) CL + ns Î Î ÎÎ Î Î Î Propagation Delay Time tplh, tphl ns MCB, MCB only Î ÎÎ Î tplh, tphl = (. ns/pf) CL + ns. Î Î Î Î tplh, tphl = (. ns/pf) CL + ns tplh, tphl = (. ns/pf) CL + ns ÎÎ ÎÎ Î Î Î Î Î Î Î All Other,, and Input Gates Î tplh, tphl = (. ns/pf) CL + ns. tplh, tphl = (. ns/pf) CL + ns ÎÎ Î Î Î ÎÎ Î tplh, tphl = (. ns/pf) CL + ns ÎÎ Î Î Input Gates (MCB, MCB) tplh, tphl = (. ns/pf) CL + ns. Î Î Î ÎÎ Î tplh, tphl = (. ns/pf) CL + ns tplh, tphl = (. ns/pf) CL + ns ÎÎ Î Î Î Î The formulas given are for the typical characteristics only at C. #Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. PULSE GENERATOR INPUT CL OUTPUT All unused inputs of AND, NAND gates must be connected to. All unused inputs of OR, NOR gates must be connected to. INPUT OUTPUT INVERTING ns ns tphl OUTPUT NON INVERTING tthl tplh ttlh % % % tplh V % VOH % % VOL ttlh tphl % VOH % % VOL tthl Figure. Switching Time Test Circuit and Waveforms MCB

6 CIRCUIT SCHEMATIC NOR, OR GATES MCB, MCB One of Four Gates Shown,,,,,,,,, MCB, MCB One of Three Gates Shown Inverter omitted in MCB,,,, MCB, MCB One of Two Gates Shown,,,,,, Inverter omitted in MCB,,, Inverter omitted in MCB MCB Eight Input Gate MCB

7 CIRCUIT SCHEMATIC NAND, AND GATES MCB, MCB One of Four Gates Shown MCB, MCB One of Three Gates Shown,,,,,,,,, Inverter omitted in MCB,,,,,,,, MCB, MCB One of Two Gates Shown Inverter omitted in MCB MCB Eight Input Gate,,,,, Inverter omitted in MCB MCB

8 TYPICAL B SERIES GATE CHARACTERISTICS N CHANNEL DRAIN CURRENT (SINK) P CHANNEL DRAIN CURRENT (SOURCE) TA = C + C C + C + C TA = C + C C + C + C Figure. VGS =. Vdc Figure. VGS =. Vdc... TA = C C + C + C + C TA = C C + C + C + C Figure. VGS = Vdc Figure. VGS = Vdc TA = C C + C + C + C TA = C C + C + C + C..... Figure. VGS = Vdc.... Figure. VGS = Vdc These typical curves are not guarantees, but are design aids. Caution: The maximum rating for output current is ma per pin. MCB

9 TYPICAL B SERIES GATE CHARACTERISTICS (cont d) VOLTAGE TRANSFER CHARACTERISTICS V out, OUTPUT VOLTAGE (Vdc)..... SINGLE INPUT NAND, AND MULTIPLE INPUT NOR, OR SINGLE INPUT NOR, OR MULTIPLE INPUT NAND, AND V out, OUTPUT VOLTAGE (Vdc).... SINGLE INPUT NAND, AND MULTIPLE INPUT NOR, OR SINGLE INPUT NOR, OR MULTIPLE INPUT NAND, AND Vin, INPUT VOLTAGE (Vdc) Vin, INPUT VOLTAGE (Vdc) Figure. =. Vdc Figure. = Vdc V out, OUTPUT VOLTAGE (Vdc).... SINGLE INPUT NAND, AND MULTIPLE INPUT NOR, OR SINGLE INPUT NOR, OR MULTIPLE INPUT NAND, AND DC NOISE MARGIN The DC noise margin is defined as the input voltage range from an ideal or input level which does not produce output state change(s). The typical and guaranteed limit values of the input values VIL and VIH for the output(s) to be at a fixed voltage VO are given in the Electrical Characteristics table. VIL and VIH are presented graphically in Figure. Guaranteed minimum noise margins for both the and levels =. V with a. V supply. V with a. V supply. V with a. V supply.... Vin, INPUT VOLTAGE (Vdc) Figure. = Vdc Vout Vout VO VO VO VO Vin Vin VIL VIH (a) Inverting Function VIL VIH = VOLTS DC (b) Non Inverting Function Figure. DC Noise Immunity MCB

10 OUTLINE DIMENSIONS A B C L SUFFIX CERAMIC DIP PACKAGE CASE ISSUE Y L NOTES:. DIMENSIONING AND TOLERAING PER ANSI Y.M,.. CONTROLLING DIMENSION: IH.. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.. DIMENSION F MAY NARROW TO. (.) WHERE THE LEAD ENTERS THE CERAMIC BODY. T SEATING PLANE F D PL G. (.) M T A N S K J PL M. (.) M T B S IHES MILLIMETERS DIM MIN MAX MIN MAX A.... B.... C.... D.... F.... G. BSC. BSC J.... K.... L. BSC. BSC M N.... B P SUFFIX PLASTIC DIP PACKAGE CASE ISSUE L NOTES:. LEADS WITHIN. (.) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION.. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.. DIMENSION B DOES NOT ILUDE MOLD FLASH.. ROUNDED CORNERS OPTIONAL. A F H G D N SEATING PLANE C K L M J IHES MILLIMETERS DIM MIN MAX MIN MAX A.... B.... C.... D.... F.... G. BSC. BSC H.... J.... K.... L. BSC. BSC M N.... MCB

11 OUTLINE DIMENSIONS A B P PL D SUFFIX PLASTIC SOIC PACKAGE CASE A ISSUE F. (.) M B M NOTES:. DIMENSIONING AND TOLERAING PER ANSI Y.M,.. CONTROLLING DIMENSION: MILLIMETER.. DIMENSIONS A AND B DO NOT ILUDE MOLD PROTRUSION.. MAXIMUM MOLD PROTRUSION. (.) PER SIDE.. DIMENSION D DOES NOT ILUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE. (.) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. T SEATING PLANE G D PL K C. (.) M T B S A S R X M J F MILLIMETERS IHES DIM MIN MAX MIN MAX A.... B.... C.... D.... F.... G. BSC. BSC J.... K.... M P.... R.... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi SPD JLDC, F Seibu Butsuryu Center, P.O. Box ; Phoenix, Arizona. or Tatsumi Koto Ku, Tokyo, Japan. MFAX: TOUCHTONE ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; B Tai Ping Industrial Park, INTERNET: NET.com Ting Kok Road, Tai Po, N.T., Hong Kong. MCB/D

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