NLX2G66. Dual Bilateral Analog Switch / Digital Multiplexer

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1 Dual Bilateral nalog Switch / Digital Multiplexer The NLX2G66 is a dual single pole, single throw (SPST) analog switch / digital multiplexer. This single supply voltage IC is designed with a sub micron CMOS technology to provide low propagation delays (t pd ) and ON resistance (R ON ), while maintaining low power dissipation. This bi lateral switch can be used with either analog or digital signals that may vary across the full power supply range from to. Features Wide Operating Range:.65 V to 5.5 V OVT up to +5.5 V for Control Pin R ON : Typically 5.5 at = 4.5 V and I S = 32 m Rail to Rail Input/Output High On Off Output Voltage Ratio High Degree of Linearity Ultra Small Pb Free, Halide Free, RoHS Compliant Packages ESD Performance: > 5000 V HBM, > 400 V MM Typical pplications Cell Phones, PDs, MP3 and other Portable Media Players B XX M UDFN MU SUFFIX CSE 57BZ UDFN MU SUFFIX CSE 57C = Specific Device Code = Date Code = Pb Free Package WLCSP FC SUFFIX CSE 567MR = ssembly Location Y = Year WW = Work Week MRKING DIGRMS XXM XXM XXXX YWW C 2 2B 2C Figure. nalog Symbol PIN SSIGNMENTS UDFN WLCSP Description 2 B B 3 C 2C 4 D 5 D2 2 6 C2 2B 7 B2 C 2 B 2C UDFN (Top View) PIN SSIGNMENTS C 2B 2 FUNCTION TBLE Control Input (C) L H 2C B DD2 CC2 BB2 2 WLCSP (Bottom View) Switch OFF ON 2 2B C ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. This document contains information on some products that are still under development. ON Semiconductor reserves the right to change or discontinue these products without notice. Semiconductor Components Industries, LLC, 206 May, 206 Rev. 5 Publication Order Number: NLX2G66/D

2 Table. MXIMUM RTINGS Symbol Rating Value Unit Positive DC Supply Voltage 0.5 to +7.0 V V S Switch Input / Output Voltage (Pins, B, 2 and 2B) 0.5 to V V I Digital Control Input Voltage (Pins C and 2C) 0.5 to +7.0 V I OK I/O port diode current ±50 m I IK Control input diode current 50 m I I/O Continuous DC Current Through nalog Switch ±00 m I L Latch up Current, (bove and below at 25 C) ±00 m T s Storage Temperature 65 to +50 C V ESD ESD Withstand Voltage: Human Body Model (HBM) Machine Model (MM) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 2. RECOMMENDED OPERTING CONDITIONS 5000 > 400 Symbol Parameter Min Max Unit Positive DC Supply Voltage V V S Switch Input / Output Voltage (Pins, 2, B and 2B) V V I Digital Control Input Voltage (Pins C and 2C) 5.5 V T Operating Temperature Range C t r, t f Input Transition Rise or Fall Time (ON/OFF Control Input) = < 3.0 V 0 20 ns/v = 3.0 V 0 0 V Table 3. ELECTRICL CHRCTERISTICS Symbol Parameter Condition V IH High Level Input Voltage, Control Input.65 to to C Guaranteed Limit 55 to 25 C Min Max Min Max x 0.65 x 0.7 Unit V V IL Low Level Input Voltage, Control Input.65 to.95 x 0.35 V 2.3 to 5.5 x 0.30 I I Input Leakage Current, Control Input V I = or 5.5 ±0. ± I S(ON) ON State Switch Leakage Current V IS = or, V I = V IH, V OS = Open 5.5 ±0. ± I S(OFF) OFF State Switch Leakage Current V IS = and V OS =, or V IS = and V OS =, V I = V IL, 5.5 ±0. ± I CC Quiescent Supply Current V I = or ΔI CC Supply Current Change V I = C I Control Input Capacitance pf C I/O(Off) Switch OFF Input / Output Capacitance See Figure pf C I/O(On) Switch ON Input / Output Capacitance See Figure pf 2

3 Table 4. SWITCHING CHRCTERISTICS Guaranteed Limit 55 to 25 C Symbol Parameter Condition Min Max Unit t PLH, t PHL Propagation Delay, C L = 30 pf, R L = kω. 6.5 ns to B, B to t EN (t PZL, t PZH ) t DIS (t PLZl, t PHZ ) Enable Time, C to nalog Output ( or B) Disable Time, C to nalog Output ( or B) Table 5. NLOG SWITCH CHRCTERISTICS C L = 50 pf, R L = 500 Ω C L = 50 pf, R L = 500 Ω See Figure 6 C L = 50 pf, R L = 500 Ω See Figure 6 Symbol Parameter Conditions R ON On Resistance V IS = or, V I = V IH, See Figure 2 R ON(peak) Peak On Resistance V IS = to ; V I = V IH, See Figure 2 R ON On Resistance Mismatch between Switches V IS = to ; V I = V IH, See Figure 2 BW Bandwidth (f 3dB ) R L = 50, C L = 5 pf, f IN = Sine Wave See Figure ns ns C 55 to 25 C Typ Min Max Unit I S = 4 ma I S = ma I S = 24 ma I S = 32 ma I S = 4 ma I S = ma I S = 24 ma I S = 32 ma I S = 4 ma.65.0 I S = ma I S = 24 ma I S = 32 ma > 270 MHz 2.3 > > > 270 3

4 Table 5. NLOG SWITCH CHRCTERISTICS (continued) Symbol Parameter Conditions Typ Unit ISO Off Off Channel R L = 600 Ω, C L = 50 pf, db Feedthrough f IN = MHz Sine Wave Isolation See Figure XTalk THD Crosstalk Between Switches Feedthrough Noise, Control to Switch Total Harmonic Distortion R L = 50 Ω, C L = 5 pf, f IN = MHz Sine Wave See Figure 9 R L = 600 Ω, C L = 50 pf, f IN = MHz Sine Wave See Figure 0 R L = 50 Ω, C L = 5 pf, f IN = MHz Sine Wave See Figure 0 R L = 600 Ω, C L = 50 pf, f IN = MHz Square Wave, t r = t f = 2 ns, See Figure C L = 50 pf, R L = 50 Ω, f IN = 600 Hz to 20 KHz Sine Wave, See Figure 2 Table 6. POWER DISSIPTION CHRCTERISTICS 25 C db mv pp % Symbol Parameter Conditions Typ Unit C PD Power Dissipation f = 0 MHz.65.0 pf Capacitance C

5 Table 7. DEVICE ORDERING INFORMTION NLX2G66DMUTG Device Order Number Package Shipping UDFN 0.5P,.95 mm x.0 mm (Pb Free) 3000 / Tape & Reel NLX2G66DMUTCG NLX2G66MU3TCG (In Development) UDFN 0.5P,.95 mm x.0 mm (Pb Free) UDFN 0.35P,.45 mm x.0 mm (Pb Free) 3000 / Tape & Reel 3000 / Tape & Reel NLX2G66FCTG WLCSP,. mm x 0. mm (Pb Free) 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD0/D. 5

6 PLOTTER - POWER SUPPLY + COMPUTER DC PRMETER NLYZER V IH V IL Figure 2. On Resistance Test Set Up Figure 3. Maximum Off Channel Leakage Current Test Set Up N/C V IH TEST POINT Figure 4. Maximum On Channel Leakage Current Test Set Up Figure 5. Propagation Delay Test Set Up Switch to Position 2 when testing t PLZ and t PZL Switch to Position when testing t PHZ and t PZH 2 TEST POINT R L C L * N/C N/C 2 *Includes all probe and jig capacitance. Figure 6. Propagation Delay Output Enable/Disable Test Set Up Figure 7. Power Dissipation Capacitance Test Set Up 6

7 V OS V IS V OS 0. F 0. F f in f in db Meter db Meter R L *Includes all probe and jig capacitance. *Includes all probe and jig capacitance. Figure. Maximum On Channel Bandwidth Test Set Up Figure 9. Off Channel Feedthrough Isolation Test Set Up Figure 0. Crosstalk (between Switches) ( )/2 R L V OS R L I S V MHz IN t r t f 2ns *Includes all probe and jig capacitance. Figure. Feedthrough Noise, ON/OFF Control to nalog Out, Test Set Up 7

8 To Distortion Meter ( )/2 V IS 0. F R L f in V OS *Includes all probe and jig capacitance. Figure 2. Total Harmonic Distortion Test Set Up X 50% 50% t PLH t PHL V OH Y 50% V OL Figure 3. Propagation Delay, nalog In to nalog Out Waveforms t r t f Control 90% 0% 50% t PZL 50% nalog Out 50% tpzh t PLZ 0% 90% t PHZ High Impedance V OL V OH High Impedance Figure 4. Propagation Delay, ON/OFF Control

9 PCKGE DIMENSIONS UDFN.45x.0, 0.35P CSE 57BZ ISSUE O PIN ONE REFERENCE 2X 2X 0.0 C 0.0 C 0.05 C 0.05 C L ÉÉ ÉÉ ÉÉ e/2 D TOP VIEW SIDE VIEW 4 e B E 3 7X L C SETING PLNE NOTES:. DIMENSIONING ND TOLERNCING PER SME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b PPLIES TO PLTED TERMINL ND IS MESURED BETWEEN 0.5 ND 0.20 MM FROM TERMINL TIP. 4. PCKGE DIMENSIONS EXCLUSIVE OF BURRS ND MOLD FLSH. MILLIMETERS DIM MIN MX REF b D.45 BSC E.00 BSC e 0.35 BSC L L RECOMMENDED SOLDERING FOOTPRINT* 7X X BOTTOM VIEW X b 0.0 M C B 0.05 M C NOTE PKG OUTLINE 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 9

10 PCKGE DIMENSIONS UDFN.95x.0, 0.5P CSE 57C ISSUE O PIN ONE REFERENCE 2X 2X 0.0 C ÉÉÉ ÉÉÉ ÉÉÉ 0.0 C 0.05 C 0.05 C L D TOP VIEW SIDE VIEW e/2 e 4 B E 3 7X L C SETING PLNE NOTES:. DIMENSIONING ND TOLERNCING PER SME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b PPLIES TO PLTED TERMINL ND IS MESURED BETWEEN 0.5 ND 0.20 MM FROM TERMINL TIP. 4. PCKGE DIMENSIONS EXCLUSIVE OF BURRS ND MOLD FLSH. MILLIMETERS DIM MIN MX REF b D.95 BSC E.00 BSC e 0.50 BSC L L RECOMMENDED SOLDERING FOOTPRINT* 7X 0.49 X BOTTOM VIEW 5 X b 0.0 M C B 0.05 M C NOTE PKG OUTLINE 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 0

11 PCKGE DIMENSIONS WLCSP,.x0. CSE 567MR ISSUE O PIN REFERENCE E ÈÈ ÈÈ TOP VIEW B D NOTES:. DIMENSIONING ND TOLERNCING PER SME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. COPLNRITY PPLIES TO SPHERICL CROWNS OF SOLDER BLLS. MILLIMETERS DIM MIN MX 0.50 b D.5.9 E e 0.50 BSC NOTE 3 X 0.05 C b 0.5 C B 0.03 C D C B SIDE VIEW e/2 e 2 BOTTOM VIEW e/2 C SETING PLNE e RECOMMENDED SOLDERING FOOTPRINT* 0.50 PITCH 0.50 PITCH PCKGE OUTLINE X 0.20 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of SCILLC s product/patent coverage may be accessed at /site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 952 E. 32nd Pkwy, urora, Colorado 00 US Phone: or Toll Free US/Canada Fax: or Toll Free US/Canada orderlit@onsemi.com N. merican Technical Support: Toll Free US/Canada Europe, Middle East and frica Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NLX2G66/D

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