C106 Series. Sensitive Gate Silicon Controlled Rectifiers

Transcription

1 C6 Series Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Glassivated PNPN devices designed for high volume consumer applications such as temperature, light, and speed control; process and remote control, and warning systems where reliability of operation is important. Features Glassivated Surface for Reliability and Uniformity Power Rated at Economical Prices Practical Level Triggering and Holding Characteristics Flat, Rugged, Thermopad Construction for Low Thermal Resistance, High Heat Dissipation and Durability Sensitive Gate Triggering These are PbFree Devices MAXIMUM RATINGS (T J = 25 C unless otherwise noted) Characteristic Symbol Max Unit Peak Repetitive OffState Voltage (Note 1) (Sine Wave, 5060 Hz, R GK = 1 k, V DRM, V RRM V T C = 40 to 1 C) C6B 200 C6D, C6D1* 400 C6M, C6M1* 600 On-State RMS Current (180 Conduction Angles, T C = 80 C) Average OnState Current (180 Conduction Angles, T C = 80 C) Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave, 60 Hz, T J = +25 C) I T(RMS) 4.0 A I T(AV) 2.55 A I TSM 20 A Circuit Fusing Considerations (t = 8.3 ms) I 2 t 1.65 A 2 s Forward Peak Gate Power (Pulse Width 1.0 sec, T C = 80 C) Forward Average Gate Power (Pulse Width 1.0 sec, T C = 80 C) Forward Peak Gate Current (Pulse Width 1.0 sec, T C = 80 C) P GM 0.5 W P G(AV) 0.1 W I GM 0.2 A Operating Range T J 40 to +1 Storage Temperature Range T stg 40 to +150 Mounting Torque (Note 2) 6.0 in. lb. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM and V RRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. 2. Torque rating applies with use of compression washer (B52200F006). Mounting torque in excess of 6 in. lb. does not appreciably lower case-to-sink thermal resistance. Anode lead and heatsink contact pad are common. C C SCRs 4 A RMS, Volts A TO225AA CASE 077 STYLE 2 MARKING DIAGRAM & PIN ASSIGNMENT 1. Cathode 2. Anode 3. Gate Y WW C6xx xx G ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. G K YWW C6xxG = Year = Work Week = Device Code = B, D, D1, M, M1 = PbFree Package Semiconductor Components Industries, LLC, 2011 September, 2011 Rev. 1 Publication Order Number: C6/D

2 C6 Series THERMAL CHARACTERISTICS (T C = 25 C unless otherwise noted.) Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC 3.0 C/W Thermal Resistance, JunctiontoAmbient R JA 75 C/W Maximum Lead Temperature for Soldering Purposes 1/8 in. from Case for Seconds T L 260 C ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (V AK = Rated V DRM or V RRM, R GK = 1 k ) T J = 25 C T J = 1 C ON CHARACTERISTICS Peak Forward OnState Voltage (Note 3) (I TM = 4 A) Gate Trigger Current (Continuous dc) (Note 4) (V AK = 6 Vdc, R L = 0 ) T J = 25 C T J = 40 C I DRM, I RRM 0 A A V TM 2.2 V Peak Reverse Gate Voltage (I GR = A) V GRM 6.0 V Gate Trigger Voltage (Continuous dc) (Note 4) (V AK = 6 Vdc, R L = 0 ) T J = 25 C T J = 40 C Gate NonTrigger Voltage (Continuous dc) (Note 4) (V AK = 12 V, R L = 0, T J = 1 C) Latching Current (V AK = 12 V, I G = 20 ma, R GK = 1 k ) T J = 25 C T J = 40 C Holding Current (V D = 12 Vdc) (Initiating Current = 20 ma, R GK = 1 k ) T J = 25 C T J = 40 C T J = +1 C DYNAMIC CHARACTERISTICS I GT V GT V GD 0.2 V I L I H A V ma ma Critical RateofRise of OffState Voltage (V AK = Rated V DRM, Exponential Waveform, R GK = 1 k, T J = 1 C) dv/dt 8.0 V/ s 3. Pulse Test: Pulse Width 2.0 ms, Duty Cycle 2%. 4. R GK is not included in measurement. 2

3 C6 Series Voltage Current Characteristic of SCR + Current Anode + Symbol V DRM I DRM V RRM I RRM V TM I H Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage Holding Current I RRM at V RRM on state Reverse Blocking Region (off state) Reverse Avalanche Region V TM I H + Voltage I DRM at V DRM Forward Blocking Region (off state) Anode T C, CASE TEMPERATURE ( C) HALF SINE WAVE RESISTIVE OR INDUCTIVE LOAD. 50 to 400 Hz I T(AV) AVERAGE ON STATE CURRENT (AMPERES) DC Figure 1. Average Current Derating P (AV), AVERAGE ON STATE POWER DISSIPATION (WATTS) HALF SINE WAVE RESISTIVE OR INDUCTIVE LOAD 50 TO 400Hz. JUNCTION TEMPERATURE 1 C I T(AV) AVERAGE ON STATE CURRENT (AMPERES) Figure 2. Maximum OnState Power Dissipation DC 3

4 C6 Series 0 00 I GT, GATE TRIGGER CURRENT ( A) I H, HOLDING CURRENT ( A) Figure 3. Typical Gate Trigger Current versus Figure 4. Typical Holding Current versus , GATE TRIGGER VOLTAGE (V) I L, LATCHING CURRENT ( A) 0 VGT Figure 5. Typical Gate Trigger Voltage versus Figure 6. Typical Latching Current versus 4

5 C6 Series PACKAGE INTERCHANGEABILITY The dimensional diagrams below compare the critical dimensions of the ON Semiconductor C-6 package with competitive devices. It has been demonstrated that the smaller dimensions of the ON Semiconductor package make it compatible in most lead-mount and chassis-mount applications. The user is advised to compare all critical dimensions for mounting compatibility DIA TYP BSC ON Semiconductor C-6 Package Competitive C-6 Package ORDERING INFORMATION Device Package Shipping C6BG TO225AA (PbFree) C6DG C6D1G* C6MG C6M1G* TO225AA (PbFree) TO225AA (PbFree) TO225AA (PbFree) TO225AA (PbFree) *D1 signifies European equivalent for D suffix and M1 signifies European equivalent for M suffix. 5

6 C6 Series PACKAGE DIMENSIONS TO225 CASE 7709 ISSUE Z H Q B U F A K V G S D 2 PL M C J R 0.25 (0.0) M A M B M 0.25 (0.0) M A M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH THRU -08 OBSOLETE, NEW STANDARD INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G BSC 2.39 BSC H J K M 5 TYP 5 TYP Q R S U V STYLE 2: PIN 1. CATHODE 2. ANODE 3. GATE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative C6/D