AMD/ATI RV840 Juniper GPU (from Radeon TM HD 5750 Graphics Card)

Transcription

1 AMD/ATI RV840 Juniper GPU (from Radeon TM HD 5750 Graphics Card) Circuit Analysis of GDDR5 I/O Drivers, Receivers, DLL, and PLL Table of Contents 3685 Richmond Road, Suite 500, Ottawa, ON K2H 5B7 Canada Tel: Fax:

2 Overview Introduction Brief Design Overview Component Descriptions Device Summary Figures To view, please click on the appropriate bookmark in the panel on the left Package Markings Package X-Ray Die Markings Die Photograph Die Architecture Die Architecture (High Magnification) Schematics Top Level Diagram TX Output Drivers Output Buffer with Impedance Control Unused PULLDN_X TX Data Delay Latches DELAY_D6_ Latched Data Buffers Buffer Buffer Clock Generator INV22F_ Clock Generator TRIGATE Clock Controller Decoder TX Data Buffers Logic Controller DELAY_D Output Buffers with Impedance Control Counter

3 Counter Impedance Controller OR52F_ BUF2F_ UNUSED Level Shifters DIFBUF_ Flip-Flop Latch Output Buffer Circuit Output Buffer Cell RT_ NAND2F_X NAND2F_X NAND2F_X NAND2F_X NAND2F_X AND2B1F_X AND2B1F_X AND2B1F_X AND2B1F_X AND2B1F_X High Side Pre-Buffer Low Side Pre-Buffer Delay Circuit PULLDN_X PULLUP_X Output Buffer Cell Programmable Output Buffer Parallel-Serial Converter XOR MUX ESD Impedance Clock Controller TX Data Path BUF_ Bit Latched Data DELAY_D8_ DELAY_D8_ Bit Latched Data

4 DELAY_D8_ DELAY_D6_ Bit Latched Data DELAY_D DELAY_D8_ Latched Data DELAY_D DELAY_D6_ Bit Data Selector Logic AOI22_ AO22_ Bit Data Selector Logic AOI22_ AO22_ TX Latch Clock Control Buffers DELAY_D Test Circuitry Test Circuitry DIFINV_ Output Buffer with Impedance Control Latched Data Buffers TX Data Delay Latches Delay Latches (x8) Delay Latches (x8) Delay Latches (x7) Delay Latches (x6) Delay Latches (x8) Delay Latches (x4) Delay Latches Logic Controller TX Data Buffers TX Data Path Data Selector Logic Data Selector Logic Bit Data Selector AOI22_ AOI22_ AOI22_ Bit Data Selector

5 AOI22_2S AOI22_ Bit Latched Data Output Buffer with Impedance Control Impedance Clock Controller OR Gates OR2F_ OR2F_1S OR2F_1S TX Delay Latch Clock Control TX Output Logic Controller Clock Buffer Buffers Circuit Receiver Bias Generator Folded Cascode Amplifier Folded Cascode Amplifier Bias Generator Current Mirror Bias Generator 1S DIFBUF_ Reference Selector Level Shifter x Programmable Current Control Bias Generator Differential Amplifier Series Transistors Programmable Current Mirror Programmable Current Mirror Leg TRIGATE_ Programmable Current Mirror Leg NCASC_X Programmable Current Mirror Leg TRIGATE_ Programmable Current Mirror CASC_SWITCH_ Programmable Current Control Level Shifter x Bit Buffer Input Data Interface

6 3.5.1 Data Test Circuitry Test Interface RS NAND2D Test Signal Generator 1-to Test Signal Generator 1-to Clock Selector Bit Counter MX MX21B1_ MX21_ Frequency Selector Bit Counter Scan Chain Interface Bit Decoder to-4 Decoder Clock Selector Scan Chain x Scan Chain Cell Inverter x MUX 2-to Input Data Buffer Comparator BUF_ Comparator TRIGATE_ INV_ Comparator Amplifier TRIGATE_ TRIGATE_ TRIGATE_ TRIGATE_ TRIGATE_ Amplifier Data Path Switch TRIGATE_ Comparator TRIGATE_ INV_2

7 BUF2_ Level Shifter Clock Generator Level_Shifter_ Latch FF Edge Trigger FF Latch Latch Latch Delay Test Code Detector AOI Data Detector OA Data Buffer Data Buffer AO AO22_ AO22_ AO22_ COUNT_1B OR XNOR Bit Decoder Control Bit Decoder to-8 Bit Data Encoder MUX MUX 8S MUX 8S MUX 8S MUX 8S MUX 8S MUX 8S MUX 8S8

8 4.0.0 DLL DLL Decoder Pull-Up_x Clock Latch Phase Detector LANF Charge Pump Amplifier BUF2_ Bias Circuit TRIGATE_ BUF Charge Circuit Charge Cell TRIGATE_ Programmable Delay Cap TRIGATEF TRIGATEF_ TRIGATEF_ Delay Cell Current Current Delay Cell Current Current Buffer Buffer Buffer Clock Select Decoder NOR2B Pull-Down X Pull-Up X Data Buffers BUF2F INVX INVX BUF2F_ INVX5

9 BUF2F_ BUF2_ Delay Circuit Programmable Delay PLL Clock Output Frequency Divedor Decoder Frequency Selection INVX DFS_LAT PLL Core Clock Buffer Clock Buffer Amplifier Voltage Generator Voltage Generator S Voltage Detector Frequency CK Feed MUX Power-Down Control Clock Multiplexer Divide-by-M Counter DFSF DFSF_ Phase Frequency Detector TRINOT NAND2F Comparator Comparator 7S Divide-by-N Counter Pull-Down x LAN Voltage Generator TRIGATE_ Amplifier FCAP_x DIFINV_ Charge Pump Charge Switch x8

10 Charge Switch x CHARGE_SWITCH Amplifier Amplifier Control Bias Generator BUF2_ Charge Switch x Charge Switch x Charge Switch x Control OR2_ VCO VCO_UNUSED Adjust Delay Cell VS_INV_ VS_INV_ VS_TRINOT23_X VS_TRINOT23_ Power-Up Power-Up Power-Up PLL Control PLL Control Bit Counter NAND PLL Control Pull-Up x Comparator PLL Control Delay Circuit Buffers x Buffers x Adder Bit Counter OA Data Path Data Path Data Path Adder 1

11 Bit Counter OA AND Bit Counter Bit Counter Bit Counter XOR2 X XOR XOR2_ Decoder Adder Control Bit Counter NOR Gate Bit Counter Half Adder Half Adder Bit Counter Bit Counter REG Cell Clock Input Clock Related Circuits Bias Generator PCASC_UNUSED Amplifier Clock Buffers CLK_BUF BUF_ CLK_BUFS CLK_BUFS CLK_BUFS TRX Clocks RX Clocks CLK_MUX_ MX21B12_ MX21B MX ADJ_MX MX21B12_2

12 MX21B12_ MX21B12_ MX21B12_ MX21B12_ MX21B12_ MX21B12_ ADJ_TRINOT ADJ_MX ADJ_ XOR XNOR2_ AND ADJ_ AND TX Clocks DELAY_LINES CLK_MUX ADJ_ Clock Control Decoder REG_6B S_XNOR2_2P5_2D S_XNOR2_1_2D BUF Bit Counter Bit Counter CTRL_ DC_4B CTRL Bit REG S_XNOR2_2P5_2D S_XNOR2_2P5_2P S_XOR2F_2_2D S_XOR2F_E3_E2P S_XOR2F_2P5_1P S_XNOR2F_2P5_2P BUF LOGIC MUX10_DFN MUX10_DFNS1

13 DATADET3BS CTRL13S DATADET3B DFN_6B MUX2_6BS MUX2_6BS REGS MUX2_6BS Miscellaneous Buffers Buffers INV_D Level Shifter Miscellaneous Components Unused Unused Inverters X Pull-Up Unused MOS Capacitors Impedance Control Circuit DC38F_ LAN_X LANF_X BUF_X INV_X7_ INV_X UNUSED_DIFX BUF_X BUF_X BUF_X INV_X BUF_X BUF_X3_ BUF_X5_ BUF_X12_ BUF_X MUX 2-to-1 Channel Selector UNUSED_ INV_X14_2

14 INV_X14_ UNUSED_ BUF_X3_ UNUSED_ INV_X INV_X14_ Bypass Capacitors and ESD Protection RC Triggered Active MOSFET ESD Clamp Cell Library Signal Cross-Reference List About Chipworks

15 About Chipworks Chipworks is the recognized leader in reverse engineering and patent infringement analysis of semiconductors and electronic systems. The company s ability to analyze the circuitry and physical composition of these systems makes them a key partner in the success of the world s largest semiconductor and microelectronics companies. Intellectual property groups and their legal counsel trust Chipworks for success in patent licensing and litigation earning hundreds of millions of dollars in patent licenses, and saving as much in royalty payments. Research & Development and Product Management rely on Chipworks for success in new product design and launch, saving hundreds of millions of dollars in design, and earning even more through superior product design and faster launches. Contact Chipworks To find out more information on this report, or any other reports in our library, please contact Chipworks at Chipworks 3685 Richmond Rd., Suite 500 Ottawa, Ontario K2H 5B7 Canada T: F: Web site: [email protected] Please send any feedback to [email protected]