VENDING MACHINE. ECE261 Project Proposal Presentaion. Members: ZHANG,Yulin CHEN, Zhe ZHANG,Yanni ZHANG,Yayuan
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1 VENDING MACHINE ECE261 Project Proposal Presentaion Members: ZHANG,Yulin CHEN, Zhe ZHANG,Yanni ZHANG,Yayuan
2 Abstract This project will design and implement a coin operated vending machine controller The project involved: System-level architecture (top-level schematic) cell designs (register, 7-segment LCD) gate-level schematic Verification of the functionality: do simulation (digital and analog) using ModelSim transistor-level schematic gate layout pass DRC/LVS Cost estimation
3 Vending Machine Features Vend 4 products Accept 3 kinds of coins Change back in Nickels Displaying the amount of money inputted Displaying which product a user has chosen One coin can be entered at one time Self-starting with the initial coin The controller will display warning if insufficient money has been deposited First insert coins, then choose one product at a time!! (cannot vend more than one product at a time)
4 Design Specifications Inputs: Dimes, Nickels, Quarters Outputs: Product and/or coins (only one cent) User Interface Buttons: A,B,C,D for product select. These buttons will be used as the action button E for Cash back LCDs: Two digital 7-seg LCDs showing amount of coins inputted one digital 7-seg LCD showing which product the user chooses
5 Data flow Diagram 4 electrical-to-mechanical drivers Iutput Vector X Vending Machine Controller of Logic Output Vector Y 7-Segment Display Decoder 2 7-Segment Display Decoder 1 To be implemented
6 Top-level Schematic (1) reset X1 X2 X3 X4 X5 X6 X7 x1 x2 x3 X [7:4] Q[3:0] CLK1 4 ORs encoder1: 3-bit input to 8-bit output clk B[7:0] Q[7:0] D[3:0] A2 Q[3:0] R CLK1 Adder OR OR clk D[7:0] A1 Q[7:0] R Items Prices Logic localreset2 Money [7:0] Clk1=20MHZ ItemPrice [7:0] X8 reset OR OR Encoder2: 4-bit input to 7-bit output #[6:0] 7-seg digital display localreset1 M [3:0]
![clk D[7:0] A1 Q[7:0] R Items Prices Logic localreset2 Money [7:0] Clk1=20MHZ ItemPrice [7:0]](/docs-images/46/21407181/images/page_6.jpg "X8 reset OR OR Encoder2: 4-bit input to 7-bit output #[6:0] 7-seg digital display")
7 Top-level Schematic (2) Clk2=10MHZ localreset1 clk2 D localreset2 reset Money[7:0] Comparator /Subtracter OR s [7:0] 8-bit binary data to 2 decimal data Y[6:0] Y[13:7] 7-seg Logic 7-seg Logic ItemPrice[7:0] Result[7:0] m0 en1 m1 en2 m2 en3 m3 en4 If difference>0 difference=0 then localreset2=1; If differece<0 Then localreset=1;y display error.
![7-seg Logic 7-seg Logic ItemPrice[7:0] Result[7:0] m0 en1 m1 en2 m2 en3 m3 en4 If](/docs-images/46/21407181/images/page_7.jpg "difference>0 difference=0 then localreset2=1; If differece<0 Then localreset=1;y")
8 Vending Machine Controller of Logic(1) Input X1,X2,X3 X1=1: a nickle is deposited in the slot reset X2=1: a dime is deposited in the slot X3=1: a quarter is deposited in the slot X1 X2 x1 x2 encoder1: 3-bit input to 8-bit output B[7:0] Reset:when reset=1, the input ports are eliminated usually reset keeps 0. X3 x3 x1 x2 x3 B0 B1 B2 B3 B4 B5 B
![3-bit input to 8-bit output B[7:0] Reset:when reset=1, the input ports are eliminated usually reset](/docs-images/46/21407181/images/page_8.jpg "keeps 0.")
9 Vending Machine Controller of Logic(2) B[7:0] Q[7:0] CLK1 Adder D[7:0] clk D[7:0] Q[7:0] R Q[7:0] D D D D Clk1=20MHZ
![CLK1 Adder D[7:0] clk D[7:0]](/docs-images/46/21407181/images/page_9.jpg "Q[7:0] R Q[7:0] D D D D")
10 Vending Machine Controller of Logic(4) Encoder2: 4-bit input to 7-bit output #[6:0] 7-seg digital display m0 m1 m2 m
11 Vending Machine Controller of Logic(3) m0 1 en wire[7:0] m1 m2 2 3 en en Ors Ors ItemPrice [7:0] Ors m3 4 en Items Prices Logic Use shift register to implement block Prices of each has been programed before user uses the machine
12 Number of Transistors 8-bit+8-bit input Adder: 640 Transistors Four 8-bit output shift registers: 4*8*16=512 Transistors One 8 D flip-flop arrays:8*16=144 Transistors One 4 D flip-flop arrays 144/2=77 T 16-bit input subtracter: apporximately =684 T First encoder(3-bit input to 8-bit output): Two 2-input OR Gates=2*4=8 T Second encoder(4-bit input to 7-bit output): Two 2-input OR Gates=2*4=8 T Three 4-input AND Gates:3*(4*2+2)=30 T Six 2-input OR Gates:6*(2*2+2)=36T One 3-input OR Gate and One-4-input OR Gate:(6+2)+(8+2)=18T One 2-input And Gate: 4T One D flip-flop: 16T; One inverter:2t (8+4) And Gates: 4*12=28T Third encoder(8-bit to 14-bit output):appoximately 250T Four ens and Three Ors: 4*8*(4+2)+3*8*(4+2)=256T Total:appoximately 2447Tansistors
13 System Clocks Power System contains two clocks: clk1-20mhz clk2-10mhz Clk1 is the main clock which controls the A1 D flip-flop array and A2 D flip-flop array. These two arrays are used to maintain the system status. System status is defined by the money deposited and the which the customer wants to buy. Since the 1 level voltage created by coins and by user s pressing the button cannot maintain a long time, we use D flipflop arrays to record the amount of money and the. Clk2 is used to control a D flip-flop which can delay the localreset2 signal to make sure that before the system reset it has finished enabling the mechanical component. VDD=5v. Suppose average capacitance of each nmos transistor is C then each pmos transistor is 2C, then the average capacitance of each MOS transistor is 1.5C. Given the activity factor of static logic circuits is 0.1 while for register and flip-flop circuits the value is 1, then we can calculate the power by using P=aC*V*V*f (144+77)*1*1.5C*25*20MHz+16*1*1.5C*25*10MHz+( )*0.1*1.5C*25*20MHZ= *1.5C*(volt*volt)*MHZ If 1.5C= 12*10(-6)nF Then P ~14.6mW
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