Chapter Three Morgan Kaufmann Publishers

Transcription

1 Chapter Three

2 Numbers Bits are just bits (no inherent meaning) conventions define relationship between bits and numbers Binary numbers (base 2)... decimal:...2 n - Of course it gets more complicated: numbers are finite (overflow) fractions and real numbers negative numbers e.g., no MIPS subi instruction; addi can add a negative number How do we represent negative numbers? i.e., which bit patterns will represent which numbers? 2

3 Possible Representations Sign Magnitude: One's Complement Two's Complement = + = + = + = + = + = + = +2 = +2 = +2 = +3 = +3 = +3 = - = -3 = -4 = - = -2 = -3 = -2 = - = -2 = -3 = - = - Issues: balance, number of zeros, ease of operations Which one is best? Why? 3

4 MIPS 32 bit signed numbers: two = ten two = + ten two = + 2 ten... two = + 2,47,483,646 ten two = + 2,47,483,647 ten two = 2,47,483,648 ten two = 2,47,483,647 ten two = 2,47,483,646 ten... two = 3 ten two = 2 ten two = ten maxint minint 4

5 Two's Complement Operations Negating a two's complement number: invert all bits and add remember: negate and invert are quite different! Converting n bit numbers into numbers with more than n bits: MIPS 6 bit immediate gets converted to 32 bits for arithmetic copy the most significant bit (the sign bit) into the other bits -> -> "sign extension" (lbu vs. lb) 5

6 Addition & Subtraction Just like in grade school (carry/borrow s) Two's complement operations easy subtraction using addition of negative numbers + Overflow (result too large for finite computer word): e.g., adding two n-bit numbers does not yield an n-bit number + note that overflow term is somewhat misleading, it does not mean a carry overflowed 6

7 Arithmetic Where we've been: Performance (seconds, cycles, instructions) What's up ahead: Implementing the Architecture operation a 32 ALU result b

8 Constructing an ALU (Arithmetic Logic Unit) ALU is a device that performs the arithmetic operations like addition and subtraction, or logical operations like AND and OR. An ALU can be constructed from four hardware building blocks: AND gate, OR gate, Inverter, and Multiplexor. (What is the truth table of each?) The Multiplexor: If S == then C = A else C = B Selects one of the inputs to be the output, based on a control input. S A B C 8

9 ALU (Cont.) Let's build an ALU to support the andi and ori instructions We'll just build a bit ALU, and use 32 of them because MIPS word is 32 bits wide operation op a b res a b result 9

10 The -bit Logical Unit for AND and OR Operation a Result b

11 Different Implementations Not easy to decide the best way to build something Don't want too many inputs to a single gate Don t want to have to go through too many gates for our purposes, ease of comprehension is important Let's look at a -bit ALU for addition: a b CarryIn CarryOut Sum A full adder or a (3,2) adder has three inputs (a, b, & Cin) and two outputs (Sum & Cout). A half adder or a (2,2) adder has only 2 inputs (a & b) and 2 outputs (Sum & Cout). How could we build a -bit ALU for Add, AND, and OR? How could we build a 32-bit ALU?

12 2 Input and Output Specification for -bit Adder Sum CarryOut CarryIn b a Outputs Inputs

13 Values of the Inputs when CarryOut is a Inputs a b CarryIn CarryOut = (b. CarryIn) + (a. CarryIn) + (a. b) + (a. b. CarryIn) If a. b. CarryIn is true, then all of the other terms must be true, so we leave out the last term. c out = a b + a c in + b c in 3

14 Adder Hardware for the Carry Out Signal CarryIn a b CarryOut The above Hardware was constructed from the following equation: CarryOut = (b. CarryIn) + (a. CarryIn) + (a. b) 4

15 The Sum bit The Sum bit is set to when exactly one input is or when all three inputs are. (check Truth Table on slide 7). Sum = (a. b. CarryIn ) + (a. b. CarryIn ) + (a. b. CarryIn) + (a. b. CarryIn) Sum = a XOR b XOR c in Draw the logic circuit? (Left as exercise). 5

16 A -bit ALU that Performs AND, OR, & Addition C arryin Operation a Result b 2 C arryo ut 6

17 A 32 bit ALU Constructed from 32 -bit ALUs. Ripple carry: CarryOut of the less significant bit is connected to the CarryIn of the more significant bit. a b a b CarryIn CarryIn ALU C a rry O u t CarryIn ALU C a rry O u t O p e ra tio n Result Result a2 b2 CarryIn ALU2 C a rry O u t Result2 a3 b3 CarryIn ALU3 Result3 7

18 What about subtraction (a b)? Two's complement approach: just negate b and add. How do we negate? A very clever solution: Binvert Operation CarryIn a Result b 2 CarryOut 8

19 Detecting Overflow No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: overflow when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive Consider the operations A + B, and A B Can overflow occur if B is? Can overflow occur if A is? 9

20 Effects of Overflow An exception (interrupt) occurs Control jumps to predefined address for exception Interrupted address is saved for possible resumption Details based on software system / language example: flight control vs. homework assignment Don't always want to detect overflow new MIPS instructions: addu, addiu, subu note: addiu still sign-extends! note: sltu, sltiu for unsigned comparisons 2

21 Multiplication More complicated than addition accomplished via shifting and addition More time and more area Let's look at 3 versions based on grade school algorithm (multiplicand) x_ (multiplier) (Product) If we ignore the sign bits, the length of the multiplication of an n-bit multiplicand and an m-bit multiplier is a product that is n + m bits long. That is, n + m bits are required to represent all possible products. 2

22 Multiplication Each step of multiplication is simple:. Just place a copy of the multiplicand ( x multiplicand) in the proper place if the multiplier digit is, or 2. Place ( x multiplicand) in the proper place if the digit is. Negative numbers: convert and multiply there are better techniques, we won t look at them. 22

23 Multiplication: Implementation Start Multiplier =. Test Multiplier Multiplier = Multiplicand Shift left 64 bits a. Add multiplicand to product and place the result in Product register 64-bit ALU Multiplier Shift right 32 bits 2. Shift the Multiplicand register left bit Product Write Control test 3. Shift the Multiplier register right bit 64 bits 32nd repetition? No: < 32 repetitions Datapath Control Done Yes: 32 repetitions 23

24 First Version of the Multiplication Hardware The Multiplicand register, ALU, and Product register are all 64 bits wide, with only the Multiplier register containing 32 bits. We will need to move the multiplicand left one digit each step as it may be added to the intermediate products. So, over 32 steps a 32-bit multiplicand would move 32 bits to the left. Hence we need a 64-bit Multiplicand register, initialized with the 32-bit multiplication in the right half and in the left half. The multiplier is shifted in the opposite direction at each step. The Product register initialized to. Control decides when to shift the Multiplicand and Multiplier registers and when to write new values into the Product register. 24

25 Final Version Start Multiplier starts in right half of product Product =. Test Product Product = Multiplicand 32 bits 32-bit ALU Product 64 bits Shift right Write Control test 3. Shift the Product register right bit 32nd repetition? No: < 32 repetitions What goes here? Yes: 32 repetitions Done 25

26 Multiply in MIPS MIPS provides a separate pair of 32-bit registers to contain the 64-bit product, called Hi and Lo. To produce a properly signed or unsigned product, MIPS has two instructions: multiply (mult) and multiply unsigned (multu). 26

27 Floating Point (a brief look) We need a way to represent numbers with fractions, e.g., 3.46 very small numbers, e.g.,. very large numbers, e.g., Representation: sign, exponent, significand: ( ) sign significand 2 exponent more bits for significand gives more accuracy more bits for exponent increases range IEEE 754 floating point standard: single precision: 8 bit exponent, 23 bit significand double precision: bit exponent, 52 bit significand 27

28 IEEE 754 floating-point standard Leading bit of significand is implicit Exponent is biased to make sorting easier all s is smallest exponent all s is largest bias of 27 for single precision and 23 for double precision summary: ( ) sign (+significand) 2exponent bias Example: decimal: -.75 = - ( ½ + ¼ ) binary: -. = -. x 2 - floating point: exponent = 26 = IEEE single precision: 28

29 Floating point addition Sign Exponent Fraction Sign Exponent Fraction Start. Compare the exponents of the two numbers. Small ALU Shift the smaller number to the right until its exponent would match the larger exponent Exponent difference 2. Add the significands Control Shift right 3. Normalize the sum, either shifting right and incrementing the exponent or shifting left and decrementing the exponent Big ALU Overflow or underflow? Yes No Exception Increment or decrement Shift left or right 4. Round the significand to the appropriate number of bits Rounding hardware No Still normalized? Yes Sign Exponent Fraction Done 29

30 Floating Point Complexities Operations are somewhat more complicated (see text) In addition to overflow we can have underflow Accuracy can be a big problem IEEE 754 keeps two extra bits, guard and round four rounding modes positive divided by zero yields infinity zero divide by zero yields not a number other complexities Implementing the standard can be tricky Not using the standard can be even worse see text for description of 8x86 and Pentium bug! 3

31 Chapter Three Summary Computer arithmetic is constrained by limited precision Bit patterns have no inherent meaning but standards do exist two s complement IEEE 754 floating point Computer instructions determine meaning of the bit patterns Performance and accuracy are important so there are many complexities in real machines Algorithm choice is important and may lead to hardware optimizations for both space and time (e.g., multiplication) You may want to look back (Section 3. is great reading!) 3