Digital Electronics Student Objectives One Credit
|
|
|
- Sibyl Stevenson
- 7 years ago
- Views:
Transcription
1 First Six Weeks DE 1.1(A) The student will know and practice proper safety while working with electronics. DE 1.1(B) The student will be able to express numbers in scientific notation, engineering notation, and System International (SI) notation. DE 1.1(C) The student will identify many of the common components used in electronics. DE 1.1(D) The student will be able to determine a resistor s nominal value by reading its color code. DE 1.1(E) The student will be able to determine a resistor s actual value by reading its resistance with a Digital Multimeter (DMM). DE 1.1(F) The student will be able to determine a capacitor s nominal value by reading its labeled nomenclature. DE 1.1(G) The student will be able to properly tin the tip of a soldering iron. DE 1.2(A) The student will be able to identify the parts of an atom and determine if an element would make a good conductor, insulator, or semiconductor. DE 1.2(B) The student will use Ohm s Law, Kirchhoff s Voltage Law, and Kirchhoff s Current Law to solve for simple series and parallel circuit. DE 1.2(C) The student will be able to use a Circuit Design Software to analyze simple analog circuits. DE 1.2(D) The student will be able to use a breadboard and digital multimeter to analyze simple analog circuits. DE 1.2(E) The student will be able to determine the amplitude, period, frequency, and duty cycle analog and digital signals. DE 1.2(F) The student will be able to analyze and design simple digital oscillators using the 555 Timer chip. DE 1.2(G) The student will utilize the Circuit Design Software (CDS) to simulate and test a complete analog design. DE 1.3(A) The student will be able to obtain and extract information from the manufacturer datasheets for components commonly used in digital electronics. DE 1.3(B) The student will know how to identify commonly used electronic components given their part number or schematic symbol. DE 1.3(C) The student will be able to identify various integrated circuit (IC) package styles. DE 1.3(D) The student will know the fundamental differences between combinational and sequential logic. DE 1.3(E) The student will identify and describe the function of AND, 10 Days 12 Days
2 OR, & Inverter gates. DE 1.3(F) The student will be able to use Circuit Design Software (CDS) to simulate and test a simple combinational logic circuit designed with AND, OR, & Inverter gates. DE 1.3(G) The student will identify and describe the function of a D flip-flop. Second Six Weeks DE 1.3(H) The student will be able to use Circuit Design Software (CDS) to simulate and test a simple sequential logic circuit design with D flip-flops. DE 1.3(I) The student will utilize the Circuit Design Software (CDS) to simulate and test a complete design containing both combinational and sequential logic. DE 2.1(A) The student will convert numbers between the binary and decimal number systems. DE 2.1(B) The student will translate design specifications into truth tables. DE 2.1(C) The student will extract un-simplified logic expressions from truth tables. DE 2.1(D) The student will construct truth tables from logic expressions. DE 2.1(E) The student will use the rules and laws of Boolean algebra, including DeMorgan s, to simplify logic expressions. DE 2.1(F) The student will analyze AOI (AND/OR/Invert) combinational logic circuits to determine their equivalent logic expressions and truth tables. DE 2.1(G) The student will design combinational logic circuits using AOI logic gates. DE 2.1(H) The student will translate a set of design specifications into a functional AOI combinational logic circuit following a formal design process. DE 2.1(I) The student will use Circuit Design Software (CDS) and a Digital Logic Board (DLB) to simulate and prototype AOI logic circuits. DE 2.2(A) The student will use the K-Mapping technique to simplify combinational logic problems containing two, three, and four variables. DE 2.2(B) The student will be able to solve K-Maps that contain one or more don t care conditions. DE 2.2(C) The student will design combinational logic circuit using NAND and NOR logic gates. 4 Days 20 Days 6Days
3 Third Six Weeks DE 2.2(D) The student will translate a set of design specifications into a functional NAND or NOR combinational logic circuit following a formal design process. DE 2.2(E) The student will be able to compare and contrast the quality of combinational logic designs implemented with AOI, NAND, and NOR logic gates. DE 2.2(F) The student will use Circuit Design Software (CDS) and a Digital Logic Board (DLB) to simulate and prototype NAND and NOR logic circuits. DE 2.3(A) The student will use a seven-segment display in a combinational logic design to display alpha/numeric values. DE 2.3(B) The student will select the correct current limiting resistor and properly wire both common cathode and common anode sevensegment displays. DE 2.3(C) The student will follow a formal design process to translate a set of design specifications for a design containing multiple outputs into a functional combinational logic circuit. DE 2.3(D) The student will design AOI, NAND, & NOR solutions for a logic expression and select the solution that uses the least number of ICs to implement. DE 2.3(E) The student will use Circuit Design Software (CDS) and Digital Logic Board (DLB) to simulate and prototype AOI, NAND, & NOR logic circuits. DE 2.4(A) The student will convert numbers between the hexadecimal or octal number systems and the decimal number system. DE 2.4(B) The student will use XOR and XNOR gates to design binary half-adders and full-adders. DE 2.4(C) The student will use SSI and MSI gates to design and implement binary adders. DE 2.4(D) The student will design electronics displays using sevensegment displays that utilize de-multiplexers. DE 2.4(E) The student will use the two s complement process to add and subtract binary numbers. DE 2.4(F) The student will use Circuit Design Software (CDS) and a Digital Logic Board (DLB) to simulate and prototype specific combinational logic circuits. DE 2.5(A) The student will design combinational logic circuits using a programmable logic device. DE 2.5(B) The student will be able to cite the advantages and disadvantages of programmable logic devices over discrete logic gates. 6 Days 9 Days 7 Days
4 Fourth Six Weeks DE 2.5(C) The student will use Circuit Design Software (CDS) and a Digital Logic Board (DLB) to simulate and prototype combinational logic designs implemented with programmable logic DE 3.1(A) The student will know the schematic symbols and excitation tables for the D and J/K flip-flops. DE 3.1(B) The student will describe the function of the D and J/K flipflops. DE 3.1(C) The student will describe the function of, and differences between, level sensitive and edge sensitive triggers. DE 3.1(D) The student will describe the function of, and differences between, active high and active low signals. DE 3.1(E) The student will describe the function of, and differences between, a flip-flop s synchronous and asynchronous inputs. DE 3.1(F) The student will draw detailed timing diagrams for the D or J/K flip-flop s Q output in response to a variety of synchronous and asynchronous input conditions. DE 3.1(G) The student will analyze and design introductory flip-flop applications such as event detection circuits, data synchronizers, shift registers, and frequency dividers. DE 3.1(H) The student will use Circuit Design Software (CDS) and a Digital Logic Board (DLB) to simulate and prototype introductory flipflop applications. DE 3.2(A) The student will know the advantages and disadvantage of counters designed using the asynchronous counter method. DE 3.2(B) The student will be able to describe the ripple effect of an asynchronous counter. DE 3.2(C) The student will be able to analyze and design up, down and modulus asynchronous counters using discrete D and J/K flip-flops. DE 3.2(D) The student will be able to analyze and design up, down and modulus asynchronous counters using medium scale integrated (MSI) circuit counters. DE 3.2(E) The student will use Circuit Design Software (CDS) and Digital Logic Board (DLB) to simulate and prototype SSI and MSI asynchronous counters. DE 3.3(A) The student will know the advantages and disadvantage of counters designed using the synchronous counter method. DE 3.3(B) The student will be able to analyze and design up, down and modulus synchronous counters using discrete D and J/K flip-flops. 2 Days 6 Days 14 Days Fifth Six Weeks
5 DE 3.3(C) The student will be able to analyze and design up, down and modulus synchronous counters using medium scale integrated (MSI) circuit counters. DE 3.3(D) The student will use Circuit Design Software (CDS) and Digital Logic Board (DLB) to simulate and prototype SSI and MSI synchronous counters. DE 3.4(A) The student will be able to describe the components of a state machine. DE 3.4(B) The student will be able to draw a state graph and construct a state transition table for a state machine. DE 3.4(C) The student will be able to derive a state machine s Boolean equations from its state transition table. DE 3.4(D) The student will be able to implement Boolean equations into a functional state machine. DE 3.4(E) The student will describe the two variations of state machines and list the advantages of each. DE 3.4(F) The student will use Circuit Design Software (CDS) and a Digital Logic Board (DLB) to simulate and prototype state machines designs implemented with discrete and programmable logic. DE 4.1(A) The student will create flowcharts to use in programming DE 4.1(B) The student will use the Board of Education to write programs 8Days 20 Days 2Days Sixth Six Weeks DE 4.1(C) The student will create a program that utilizes the Debug screen DE 4.1(D) The student will create programs that use variables DE 4.1(E) The student will create programs that use various loops DE 4.1(F) The student will create programs that use inputs and outputs DE 4.2(A) The student will program a servo motor. DE 4.2(B) The student will program and test an autonomous robot. DE 4.2(C) The student will use mathematics to calculate programming values. DE 4.3(A) The student will design and build a maze course. DE 4.3(B) The student will design and build a timing device with remote triggers. DE 4.3(C) The student will program a microcontroller to guide a robot through a maze. 11 Days 11 Days
Digital Electronics Detailed Outline
Digital Electronics Detailed Outline Unit 1: Fundamentals of Analog and Digital Electronics (32 Total Days) Lesson 1.1: Foundations and the Board Game Counter (9 days) 1. Safety is an important concept
Upon completion of unit 1.1, students will be able to
Upon completion of unit 1.1, students will be able to 1. Demonstrate safety of the individual, class, and overall environment of the classroom/laboratory, and understand that electricity, even at the nominal
The components. E3: Digital electronics. Goals:
E3: Digital electronics Goals: Basic understanding of logic circuits. Become familiar with the most common digital components and their use. Equipment: 1 st. LED bridge 1 st. 7-segment display. 2 st. IC
Gates, Circuits, and Boolean Algebra
Gates, Circuits, and Boolean Algebra Computers and Electricity A gate is a device that performs a basic operation on electrical signals Gates are combined into circuits to perform more complicated tasks
Electronics Technology
Teacher Assessment Blueprint Electronics Technology Test Code: 5907 / Version: 01 Copyright 2011 NOCTI. All Rights Reserved. General Assessment Information Blueprint Contents General Assessment Information
1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.
File: chap04, Chapter 04 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. 2. True or False? A gate is a device that accepts a single input signal and produces one
Lecture 8: Synchronous Digital Systems
Lecture 8: Synchronous Digital Systems The distinguishing feature of a synchronous digital system is that the circuit only changes in response to a system clock. For example, consider the edge triggered
Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa
Experiment # 9 Clock generator circuits & Counters Eng. Waleed Y. Mousa 1. Objectives: 1. Understanding the principles and construction of Clock generator. 2. To be familiar with clock pulse generation
A Digital Timer Implementation using 7 Segment Displays
A Digital Timer Implementation using 7 Segment Displays Group Members: Tiffany Sham u2548168 Michael Couchman u4111670 Simon Oseineks u2566139 Caitlyn Young u4233209 Subject: ENGN3227 - Analogue Electronics
Content Map For Career & Technology
Content Strand: Applied Academics CT-ET1-1 analysis of electronic A. Fractions and decimals B. Powers of 10 and engineering notation C. Formula based problem solutions D. Powers and roots E. Linear equations
Counters and Decoders
Physics 3330 Experiment #10 Fall 1999 Purpose Counters and Decoders In this experiment, you will design and construct a 4-bit ripple-through decade counter with a decimal read-out display. Such a counter
Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill
Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill Objectives: Analyze the operation of sequential logic circuits. Understand the operation of digital counters.
SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks
![SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks](/thumbs/35/17285180.jpg "SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks")
UNIVERSITY OF KERALA First Degree Programme in Computer Applications Model Question Paper Semester I Course Code- CP 1121 Introduction to Computer Science TIME : 3 hrs Maximum Mark: 80 SECTION A [Very
Unit/Standard Number. High School Graduation Years 2010, 2011 and 2012
1 Secondary Task List 100 SAFETY 101 Demonstrate an understanding of State and School safety regulations. 102 Practice safety techniques for electronics work. 103 Demonstrate an understanding of proper
Principles of Engineering (PLTW)
Indiana Department of Education Indiana Academic Course Framework Principles of Engineering (PLTW) Principles of Engineering is a course that focuses on the process of applying engineering, technological,
Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng
Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction
Operating Manual Ver.1.1
4 Bit Binary Ripple Counter (Up-Down Counter) Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731-
ELEC 2210 - EXPERIMENT 1 Basic Digital Logic Circuits
Objectives ELEC - EXPERIMENT Basic Digital Logic Circuits The experiments in this laboratory exercise will provide an introduction to digital electronic circuits. You will learn how to use the IDL-00 Bit
Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop.
Objectives Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop. describe how such a flip-flop can be SET and RESET. describe the disadvantage
University of St. Thomas ENGR 230 ---- Digital Design 4 Credit Course Monday, Wednesday, Friday from 1:35 p.m. to 2:40 p.m. Lecture: Room OWS LL54
Fall 2005 Instructor Texts University of St. Thomas ENGR 230 ---- Digital Design 4 Credit Course Monday, Wednesday, Friday from 1:35 p.m. to 2:40 p.m. Lecture: Room OWS LL54 Lab: Section 1: OSS LL14 Tuesday
Electronics Technology
Job Ready Assessment Blueprint Electronics Technology Test Code: 4035 / Version: 01 Copyright 2010. All Rights Reserved. General Assessment Information Blueprint Contents General Assessment Information
CHAPTER 3 Boolean Algebra and Digital Logic
CHAPTER 3 Boolean Algebra and Digital Logic 3.1 Introduction 121 3.2 Boolean Algebra 122 3.2.1 Boolean Expressions 123 3.2.2 Boolean Identities 124 3.2.3 Simplification of Boolean Expressions 126 3.2.4
COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design
PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits
ANALOG & DIGITAL ELECTRONICS
ANALOG & DIGITAL ELECTRONICS Course Instructor: Course No: PH-218 3-1-0-8 Dr. A.P. Vajpeyi E-mail: apvajpeyi@iitg.ernet.in Room No: #305 Department of Physics, Indian Institute of Technology Guwahati,
Chapter 2 Logic Gates and Introduction to Computer Architecture
Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are
ESYST 123 - Residential Wiring
ESYST 123 - Residential Wiring Approval Date: Effective Term: Department: ELECTRONIC SYSTEMS TECHNOLOGY Division: Career Technical Education Units: 4.00 Grading Option: Letter Grade Transferability: CSU
ETEC 2301 Programmable Logic Devices. Chapter 10 Counters. Shawnee State University Department of Industrial and Engineering Technologies
ETEC 2301 Programmable Logic Devices Chapter 10 Counters Shawnee State University Department of Industrial and Engineering Technologies Copyright 2007 by Janna B. Gallaher Asynchronous Counter Operation
DEPARTMENT OF INFORMATION TECHNLOGY
DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF INFORMATION TECHNLOGY Lab Manual for Computer Organization Lab ECS-453
T146 Electro Mechanical Engineering Technician MTCU Code 51021 Program Learning Outcomes
T146 Electro Mechanical Engineering Technician MTCU Code 51021 Program Learning Outcomes Synopsis of the Vocational Learning Outcomes* The graduate has reliably demonstrated the ability to: 1. fabricate
Course: Bachelor of Science (B. Sc.) 1 st year. Subject: Electronic Equipment Maintenance. Scheme of Examination for Semester 1 & 2
UPDATED SCHEME OF EXAMS. & SYLLABI FOR B.SC. Course: Bachelor of Science (B. Sc.) 1 st year Subject: Electronic Equipment Maintenance Scheme of Examination for Semester 1 & 2 (i) Theory: Two papers of
Module 3: Floyd, Digital Fundamental
Module 3: Lecturer : Yongsheng Gao Room : Tech - 3.25 Email : yongsheng.gao@griffith.edu.au Structure : 6 lectures 1 Tutorial Assessment: 1 Laboratory (5%) 1 Test (20%) Textbook : Floyd, Digital Fundamental
Digital Fundamentals. Lab 8 Asynchronous Counter Applications
Richland College Engineering Technology Rev. 0 B. Donham Rev. 1 (7/2003). Horne Rev. 2 (1/2008). Bradbury Digital Fundamentals CETT 1425 Lab 8 Asynchronous Counter Applications Name: Date: Objectives:
ENGI 241 Experiment 5 Basic Logic Gates
ENGI 24 Experiment 5 Basic Logic Gates OBJECTIVE This experiment will examine the operation of the AND, NAND, OR, and NOR logic gates and compare the expected outputs to the truth tables for these devices.
Copyright Peter R. Rony 2009. All rights reserved.
Experiment No. 1. THE DIGI DESIGNER Experiment 1-1. Socket Connections on the Digi Designer Experiment No. 2. LOGIC LEVELS AND THE 7400 QUADRUPLE 2-INPUT POSITIVE NAND GATE Experiment 2-1. Truth Table
DEGREE: Bachelor in Biomedical Engineering YEAR: 2 TERM: 2 WEEKLY PLANNING
SESSION WEEK COURSE: Electronic Technology in Biomedicine DEGREE: Bachelor in Biomedical Engineering YEAR: 2 TERM: 2 WEEKLY PLANNING DESCRIPTION GROUPS (mark X) SPECIAL ROOM FOR SESSION (Computer class
Test Code: 8094 / Version 1
Blueprint Electromechanical Engineering Technology PA Test Code: 8094 / Version 1 Copyright 2014. All Rights Reserved. General Assessment Information Electromechanical Engineering Technology PA Blueprint
List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447).
G. H. RAISONI COLLEGE OF ENGINEERING, NAGPUR Department of Electronics & Communication Engineering Branch:-4 th Semester[Electronics] Subject: - Digital Circuits List of Experiment Sr. Name Of Experiment
Figure 8-1 Four Possible Results of Adding Two Bits
CHPTER EIGHT Combinational Logic pplications Thus far, our discussion has focused on the theoretical design issues of computer systems. We have not yet addressed any of the actual hardware you might find
Flip-Flops and Sequential Circuit Design. ECE 152A Winter 2012
Flip-Flops and Sequential Circuit Design ECE 52 Winter 22 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6
Flip-Flops and Sequential Circuit Design
Flip-Flops and Sequential Circuit Design ECE 52 Winter 22 Reading ssignment Brown and Vranesic 7 Flip-Flops, Registers, Counters and a Simple Processor 7.5 T Flip-Flop 7.5. Configurable Flip-Flops 7.6
Study Guide for the Electronics Technician Pre-Employment Examination
Bay Area Rapid Transit District Study Guide for the Electronics Technician Pre-Employment Examination INTRODUCTION The Bay Area Rapid Transit (BART) District makes extensive use of electronics technology
So far we have investigated combinational logic for which the output of the logic devices/circuits depends only on the present state of the inputs.
equential Logic o far we have investigated combinational logic for which the output of the logic devices/circuits depends only on the present state of the inputs. In sequential logic the output of the
Seven-Segment LED Displays
Seven-Segment LED Displays Nicholas Neumann 11/19/2010 Abstract Seven-segment displays are electronic display devices used as an easy way to display decimal numerals and an alterative to the more complex
BINARY CODED DECIMAL: B.C.D.
BINARY CODED DECIMAL: B.C.D. ANOTHER METHOD TO REPRESENT DECIMAL NUMBERS USEFUL BECAUSE MANY DIGITAL DEVICES PROCESS + DISPLAY NUMBERS IN TENS IN BCD EACH NUMBER IS DEFINED BY A BINARY CODE OF 4 BITS.
Indiana Department of Education Academic Standards Course Framework ELECTRONICS AND COMPUTER TECHNOLOGY II
Indiana Department of Education Academic Course Framework ELECTRONICS AND COMPUTER TECHNOLOGY II Electronics and Computer Technology II provides the opportunity for students to continue with foundational
EXPERIMENT 8. Flip-Flops and Sequential Circuits
EXPERIMENT 8. Flip-Flops and Sequential Circuits I. Introduction I.a. Objectives The objective of this experiment is to become familiar with the basic operational principles of flip-flops and counters.
Digital Logic Elements, Clock, and Memory Elements
Physics 333 Experiment #9 Fall 999 Digital Logic Elements, Clock, and Memory Elements Purpose This experiment introduces the fundamental circuit elements of digital electronics. These include a basic set
Digital Electronics Part I Combinational and Sequential Logic. Dr. I. J. Wassell
Digital Electronics Part I Combinational and Sequential Logic Dr. I. J. Wassell Introduction Aims To familiarise students with Combinational logic circuits Sequential logic circuits How digital logic gates
Design and Development of Virtual Instrument (VI) Modules for an Introductory Digital Logic Course
Session ENG 206-6 Design and Development of Virtual Instrument (VI) Modules for an Introductory Digital Logic Course Nikunja Swain, Ph.D., PE South Carolina State University swain@scsu.edu Raghu Korrapati,
Digital Logic Design Sequential circuits
Digital Logic Design Sequential circuits Dr. Eng. Ahmed H. Madian E-mail: ahmed.madian@guc.edu.eg Dr. Eng. Rania.Swief E-mail: rania.swief@guc.edu.eg Dr. Eng. Ahmed H. Madian Registers An n-bit register
DIGITAL COUNTERS. Q B Q A = 00 initially. Q B Q A = 01 after the first clock pulse.
DIGITAL COUNTERS http://www.tutorialspoint.com/computer_logical_organization/digital_counters.htm Copyright tutorialspoint.com Counter is a sequential circuit. A digital circuit which is used for a counting
Chapter 9 Latches, Flip-Flops, and Timers
ETEC 23 Programmable Logic Devices Chapter 9 Latches, Flip-Flops, and Timers Shawnee State University Department of Industrial and Engineering Technologies Copyright 27 by Janna B. Gallaher Latches A temporary
Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters:
Design Eample: ers er: a sequential circuit that repeats a specified sequence of output upon clock pulses. A,B,C,, Z. G, O, T, E, R, P, S,!.,,,,,,,7. 7,,,,,,,.,,,,,,,,,,,. Binary counter: follows the binary
ELECTRICAL/ELECTRONICS ENGINEERING TECHNOLOGY (EET) BODY OF KNOWLEDGE
ELECTRICAL/ELECTRONICS ENGINEERING TECHNOLOGY (EET) BODY OF KNOWLEDGE Page 2 of 11 1 Basic Concepts of Electricity 1.1 Systems of Units and Notation 1.1.1 Units Systems and Fundamental Units. 1.1.2 Standard
Lesson 12 Sequential Circuits: Flip-Flops
Lesson 12 Sequential Circuits: Flip-Flops 1. Overview of a Synchronous Sequential Circuit We saw from last lesson that the level sensitive latches could cause instability in a sequential system. This instability
ASYNCHRONOUS COUNTERS
LB no.. SYNCHONOUS COUNTES. Introduction Counters are sequential logic circuits that counts the pulses applied at their clock input. They usually have 4 bits, delivering at the outputs the corresponding
Lab 1: Study of Gates & Flip-flops
1.1 Aim Lab 1: Study of Gates & Flip-flops To familiarize with circuit implementations using ICs and test the behavior of different logic gates and Flip-flops. 1.2 Hardware Requirement a. Equipments -
Digital circuits make up all computers and computer systems. The operation of digital circuits is based on
Digital Logic Circuits Digital circuits make up all computers and computer systems. The operation of digital circuits is based on Boolean algebra, the mathematics of binary numbers. Boolean algebra is
ECEN 1400, Introduction to Analog and Digital Electronics
ECEN 1400, Introduction to Analog and Digital Electronics Lab 4: Power supply 1 INTRODUCTION This lab will span two lab periods. In this lab, you will create the power supply that transforms the AC wall
Binary Adders: Half Adders and Full Adders
Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order
COMBINATIONAL CIRCUITS
COMBINATIONAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/combinational_circuits.htm Copyright tutorialspoint.com Combinational circuit is a circuit in which we combine the different
FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder
FORDHAM UNIVERSITY CISC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. Science Spring, 2011 Lab 2 The Full-Adder 1 Introduction In this lab, the student will construct
EE360: Digital Design I Course Syllabus
: Course Syllabus Dr. Mohammad H. Awedh Fall 2008 Course Description This course introduces students to the basic concepts of digital systems, including analysis and design. Both combinational and sequential
Contents COUNTER. Unit III- Counters
COUNTER Contents COUNTER...1 Frequency Division...2 Divide-by-2 Counter... 3 Toggle Flip-Flop...3 Frequency Division using Toggle Flip-flops...5 Truth Table for a 3-bit Asynchronous Up Counter...6 Modulo
PLL frequency synthesizer
ANALOG & TELECOMMUNICATION ELECTRONICS LABORATORY EXERCISE 4 Lab 4: PLL frequency synthesizer 1.1 Goal The goals of this lab exercise are: - Verify the behavior of a and of a complete PLL - Find capture
Counters. Present State Next State A B A B 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0
ounter ounters ounters are a specific type of sequential circuit. Like registers, the state, or the flip-flop values themselves, serves as the output. The output value increases by one on each clock cycle.
CHAPTER 11: Flip Flops
CHAPTER 11: Flip Flops In this chapter, you will be building the part of the circuit that controls the command sequencing. The required circuit must operate the counter and the memory chip. When the teach
Active Learning in the Introduction to Digital Logic Design Laboratory Course
Active Learning in the Introduction to Digital Logic Design Laboratory Course Jing Pang Department of Electrical and Electronic Engineering, Computer Engineering Program, California State University, Sacramento,
To design digital counter circuits using JK-Flip-Flop. To implement counter using 74LS193 IC.
8.1 Objectives To design digital counter circuits using JK-Flip-Flop. To implement counter using 74LS193 IC. 8.2 Introduction Circuits for counting events are frequently used in computers and other digital
CMOS Binary Full Adder
CMOS Binary Full Adder A Survey of Possible Implementations Group : Eren Turgay Aaron Daniels Michael Bacelieri William Berry - - Table of Contents Key Terminology...- - Introduction...- 3 - Design Architectures...-
Lecture-3 MEMORY: Development of Memory:
Lecture-3 MEMORY: It is a storage device. It stores program data and the results. There are two kind of memories; semiconductor memories & magnetic memories. Semiconductor memories are faster, smaller,
DIGITAL ELECTRONICS. Counters. By: Electrical Engineering Department
Counters By: Electrical Engineering Department 1 Counters Upon completion of the chapter, students should be able to:.1 Understand the basic concepts of asynchronous counter and synchronous counters, and
Course Requirements & Evaluation Methods
Course Title: Logic Circuits Course Prefix: ELEG Course No.: 3063 Sections: 01 & 02 Department of Electrical and Computer Engineering College of Engineering Instructor Name: Justin Foreman Office Location:
Apprentice Telecommunications Technician Test (CTT) Study Guide
Apprentice Telecommunications Technician Test (CTT) Study Guide 1 05/2014 Study Guide for Pacific Gas & Electric Company Apprentice Telecommunications Technician Qualifying Test (CTT) About the Test The
Experiment teaching of digital electronic technology using Multisim 12.0
World Transactions on Engineering and Technology Education Vol.12, No.1, 2014 2014 WIETE Experiment teaching of digital electronic technology using Multisim 12.0 Qiu-xia Liu Heze University Heze, Shandong,
Digital Systems. Syllabus 8/18/2010 1
Digital Systems Syllabus 1 Course Description: This course covers the design and implementation of digital systems. Topics include: combinational and sequential digital circuits, minimization methods,
Flip-Flops, Registers, Counters, and a Simple Processor
June 8, 22 5:56 vra235_ch7 Sheet number Page number 349 black chapter 7 Flip-Flops, Registers, Counters, and a Simple Processor 7. Ng f3, h7 h6 349 June 8, 22 5:56 vra235_ch7 Sheet number 2 Page number
(1) /30 (2) /30 (3) /40 TOTAL /100
Your Name: SI Number: UNIVERSITY OF CALIFORNIA AT BERKELEY BERKELEY AVIS IRVINE LOS ANGELES RIVERSIE SAN IEGO SAN FRANCISCO epartment of Electrical Engineering and Computer Sciences SANTA BARBARA SANTA
RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY
RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY Fall 2012 Contents 1 LABORATORY No 1 3 11 Equipment 3 12 Protoboard 4 13 The Input-Control/Output-Display
Decimal Number (base 10) Binary Number (base 2)
LECTURE 5. BINARY COUNTER Before starting with counters there is some vital information that needs to be understood. The most important is the fact that since the outputs of a digital chip can only be
Counters & Shift Registers Chapter 8 of R.P Jain
Chapter 3 Counters & Shift Registers Chapter 8 of R.P Jain Counters & Shift Registers Counters, Syllabus Design of Modulo-N ripple counter, Up-Down counter, design of synchronous counters with and without
3-Digit Counter and Display
ECE 2B Winter 2007 Lab #7 7 3-Digit Counter and Display This final lab brings together much of what we have done in our lab experiments this quarter to construct a simple tachometer circuit for measuring
CONTENTS PREFACE 1 INTRODUCTION 1 2 NUMBER SYSTEMS AND CODES 25. vii
2006 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is CONTENTS PREFACE xv 1 INTRODUCTION 1 1.1 About Digital Design 1 1.2 Analog versus Digital 3 1.3 Digital Devices
DATA SHEETS DE COMPONENTES DA FAMÍLIA LÓGICA TTL GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS DESCRIÇÃO
GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS Hex Invertes 74LS04 Quadruple 2 Inputs Gates 74LS00 Triple 3 Inputs Gates 74LS10 Dual 4 Inputs Gates 74LS20 8 Inputs Gates 74LS30 13 Inputs Gates
SEQUENTIAL CIRCUITS. Block diagram. Flip Flop. S-R Flip Flop. Block Diagram. Circuit Diagram
SEQUENTIAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/sequential_circuits.htm Copyright tutorialspoint.com The combinational circuit does not use any memory. Hence the previous
COURSE SYLLABUS. PRE-REQUISITES: Take CETT-1303(41052); Minimum grade C, CR.
COURSE SYLLABUS COURSE NUMBER AND TITLE: CETT 1325- Digital Fundamentals COURSE (CATALOG) DESCRIPTION An entry level course in digital electronics covering number systems, binary mathematics, digital codes,
Machine Architecture and Number Systems. Major Computer Components. Schematic Diagram of a Computer. The CPU. The Bus. Main Memory.
1 Topics Machine Architecture and Number Systems Major Computer Components Bits, Bytes, and Words The Decimal Number System The Binary Number System Converting from Decimal to Binary Major Computer Components
PROGRAMMABLE LOGIC CONTROLLERS Unit code: A/601/1625 QCF level: 4 Credit value: 15 OUTCOME 3 PART 1
UNIT 22: PROGRAMMABLE LOGIC CONTROLLERS Unit code: A/601/1625 QCF level: 4 Credit value: 15 OUTCOME 3 PART 1 This work covers part of outcome 3 of the Edexcel standard module: Outcome 3 is the most demanding
Combinational Logic Design Process
Combinational Logic Design Process Create truth table from specification Generate K-maps & obtain logic equations Draw logic diagram (sharing common gates) Simulate circuit for design verification Debug
Yrd. Doç. Dr. Aytaç Gören
H2 - AC to DC Yrd. Doç. Dr. Aytaç Gören ELK 2018 - Contents W01 Basic Concepts in Electronics W02 AC to DC Conversion W03 Analysis of DC Circuits W04 Transistors and Applications (H-Bridge) W05 Op Amps
CHAPTER 11 LATCHES AND FLIP-FLOPS
CHAPTER 11 LATCHES AND FLIP-FLOPS This chapter in the book includes: Objectives Study Guide 11.1 Introduction 11.2 Set-Reset Latch 11.3 Gated D Latch 11.4 Edge-Triggered D Flip-Flop 11.5 S-R Flip-Flop
Wiki Lab Book. This week is practice for wiki usage during the project.
Wiki Lab Book Use a wiki as a lab book. Wikis are excellent tools for collaborative work (i.e. where you need to efficiently share lots of information and files with multiple people). This week is practice
AUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR
AUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR INTRODUCTION This Project "Automatic Night Lamp with Morning Alarm" was developed using Microprocessor. It is the Heart of the system. The sensors
LOGICOS SERIE 4000. Precios sujetos a variación. Ref. Part # Descripción Precio Foto Ref. Quad 2-Input NOR Buffered B Series Gate / PDIP-14
LOGICOS SERIE 4000 Precios sujetos a variación Ref. Part # Descripción Precio Foto Ref. A-6-1 CD4001 Quad 2-Input NOR Buffered B Series Gate / PDIP-14 $ 290 A-6-2 CD4001BCM Quad 2-Input NOR Buffered B
WEEK 8.1 Registers and Counters. ECE124 Digital Circuits and Systems Page 1
WEEK 8.1 egisters and Counters ECE124 igital Circuits and Systems Page 1 Additional schematic FF symbols Active low set and reset signals. S Active high set and reset signals. S ECE124 igital Circuits
Karaoke Circuit Building Instructions
Karaoke Circuit Building Instructions Background Most popular and rock music recordings use multiple microphones and mixers to generate the left and right signals. Listening in stereo gives a broad presence
SEM 1 SEM 2 SEM 3 SEM 4 AMT 101 201 301 401 BAHASA MELAYU I - IV 2.0 1.0 2.0 2.0 1.0 2.0 2.0 1.0 2.0 2.0 1.0 2.0 2.0 1.0 2.0 2.0 1.0 2.
ON JOB TRAINING PROGRAMME STRUCTURE VOCATIONAL COLLEGE. MINISTRY OF EDUCATION MALAYSIA. COURSE : ELECTRONIC TECHNOLOGY CLUSTER : ELECTRICAL AND ELECTRONIC ENGINEERING TECHNOLOGY MODUL CODE KOD S1 S2 S3
1. Oscilloscope is basically a graph-displaying device-it draws a graph of an electrical signal.
CHAPTER 3: OSCILLOSCOPE AND SIGNAL GENERATOR 3.1 Introduction to oscilloscope 1. Oscilloscope is basically a graph-displaying device-it draws a graph of an electrical signal. 2. The graph show signal change