Hitachi HD66770 LCD Source Driver Partial Circuit Analysis
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1 June 14, 2004 Hitachi HD66770 LCD Source Driver Partial Circuit Analysis Table of Contents Introduction... Page 1 List of Figures... Page 2 Device Summary Sheet... Page 7 Signal Naming Conventions and Symbol... Tab 1 Top Level of LCD Output Driver and Graduation Voltage Generator with Gamma Adjuster... Tab 2 Gamma Adjuster... Tab 3 Gradation Voltage Generator... Tab 4 RGB Output Path (1 of 8 Segments)... Tab 5 6-T CMOS SRAM Cell... Tab 6 ESD Protection Circuit (Input)... Tab 7 Signal Cross-Reference List... Tab 8 For questions, comments, or more information about this report, or for any additional technical needs concerning semiconductor technology, please call Sales at Chipworks. Rev. F2.0
2 Some of the information in this report may be covered by patents, mask and/or copyright protection. This report should not be taken as an inducement to infringe on these rights Chipworks Incorporated This report is provided exclusively for the use of the purchasing organization. It can be freely copied and distributed within the purchasing organization, conditional upon the accompanying Chipworks accreditation remaining attached. Distribution of the entire report outside of the purchasing organization is strictly forbidden. The use of portions of the document for the support of the purchasing organization's corporate interest (e.g., licensing or marketing activities) is permitted, as defined by the fair use provisions of the copyright act. Accreditation to Chipworks must be attached to any portion of the reproduced information. Y:\Reports\Hitachi\hd66770\CAR\pdf\Report\Copyright.doc
3 Hitachi HD66770 LCD Source Driver Page 2 List of Figures Package Markings (not available) Package X-Ray (not available) Pin Configuration (not available) Die Markings Die Photograph Annotated Die Photograph Metal 3 Photograph of Memory Array Metal 2 Photograph of Memory Array Metal 1 Photograph of Memory Array Polysilicon Photograph of Memory Array Annotated Polysilicon Photograph of Memory Array T SRAM Cell Schematic Metal 3 Photograph of Input Pin ESD Protection Circuit Metal 2 Photograph of Input Pin ESD Protection Circuit Metal 1 Photograph of Input Pin ESD Protection Circuit Polysilicon Photograph of Input Pin ESD Protection Circuit Annotated Polysilicon Photograph of Input Pin ESD Protection Circuit Input Pin ESD Protection Circuit Schematic Metal 3 Photograph of Input/Output Pin ESD Protection Circuit Metal 2 Photograph of Input/Output Pin ESD Protection Circuit Metal 1 Photograph of Input/Output Pin ESD Protection Circuit Polysilicon Photograph of Input/Output Pin ESD Protection Circuit Annotated Polysilicon Photograph of Input/Output Pin ESD Protection Circuit Input/output Pin ESD Protection Circuit Schematic Polysilicon Photograph of 1 of 132 Output Paths Polysilicon Photograph of Bitline Precharge Circuit of Output Path Annotated Polysilicon Photograph of Bitline Precharge Circuit of Output Path Polysilicon Photograph of Bitline Latches of Output Path
4 Hitachi HD66770 LCD Source Driver Page Annotated Polysilicon Photograph of Bitline Latches of Output Path Metal 1 Photograph of Bitline Latches of Output Path Polysilicon Photograph of AC Waveform Generator and Latch of Output Path Annotated Polysilicon Photograph of AC Waveform Generator and Latch of Output Path Polysilicon Photograph of Level Shifter of Output Path Annotated Polysilicon Photograph of Level Shifter of Output Path Polysilicon Photograph of Graduation Voltage Multiplexer of Output Path Annotated Polysilicon Photograph of Graduation Voltage Multiplexer of Output Path Polysilicon Photograph of RGB Outputs and Equalizing Metal 1 Photograph of RGB Outputs and Equalizing Metal 2 Photograph of RGB Outputs and Equalizing Annotated Polysilicon Photograph of RGB Outputs and Equalizing Metal 2 Photograph of RGB Output Bus Metal 1 Photograph of RGB Output Bus Polysilicon Photograph of Gamma Adjustment Circuit (part) Polysilicon Photograph of Gamma Adjustment Signal Latch Annotated Polysilicon Photograph of Gamma Adjustment Signal Latch Polysilicon Photograph of Gamma Adjustment Signal Latch and Level Shifter Annotated Polysilicon Photograph of Gamma Adjustment Signal Latch and Level Shifter Polysilicon Photograph of Ladder Resistor and 8-to-1 Multiplexer Metal 2 Photograph of Ladder Resistor and 8-to-1 Multiplexer Metal 3 Photograph of Ladder Resistor and 8-to-1 Multiplexer Annotated Polysilicon Photograph of Ladder Resistor and 8-to-1 Multiplexer Polysilicon Photograph of Variable Resistor (3-bit) Annotated Polysilicon Photograph of Variable Resistor (3-bit) Polysilicon Photograph of Graduation Voltage Generator (part) Metal 2 Photograph of Graduation Voltage Generator (part) Polysilicon Photograph of Graduation Voltage Amplifier Annotated Polysilicon Photograph of Graduation Voltage Amplifier
5 Hitachi HD66770 LCD Source Driver Page Metal 2 Photograph of Resistor Network (Voltage Divider) and Graduation Voltage Outputs Annotated Polysilicon Photograph of Resistor Network (Voltage Divider) and Graduation Voltage Outputs Top Level of LCD Output Driver and Graduation Voltage Generator with Gamma Adjuster Gamma Adjuster Gamma Adjustment Register Angle Adjustment Register Micro Adjustment Register Amplitude Adjustment Register Latch with Reset Ladder Resistor and 8-to-1 Selector (4-Transistor Resistor) Adjustment Signal Latch and Level Shifter to-1 Multiplexer Latch with Reset Level Shifter Ladder Resistor and 8-to-1 Selector (1-Transistor Resistor) Variable Resistor (3-Bit Control) Variable Resistor (5-Bit Control) Bit Adjustment Signal Latch and Level Shifter Configuration Resistor (2-Bit Control) Configuration Signal Register Gradation Voltage Generator Gradation Voltage Amplifier N Operation Amplifier (N Type) Gradation Voltage Amplifier N Gradation Voltage Amplifier P1
6 Hitachi HD66770 LCD Source Driver Page Operation Amplifier (P Type) Gradation Voltage Amplifier P Gradation Voltage Amplifier N Gradation Voltage Amplifier P Voltage Divider (4R) Voltage Divider (2R) Voltage Divider (1R) Switch Signal Decoder Reference Voltage Generator RGB Output Path (1 of 8 Segments) Precharge and Latch AC Waveform Generator and Latch Level Shifter I Level Shifter II Level Shifter III LCD Driver (32-to-1 Grayscale Multiplexer and Equalizing) to-1 Multiplexer to-1 Multiplexer LCD Driver (64-to-1 Grayscale Multiplexer and Equalizing) T CMOS SRAM Cell T CMOS SRAM Cell ESD Protection Circuit (Input) ESD Protection Circuit (Input/Output) A.1.0 Symbol Conventions 1 A.1.1 Symbol Conventions 2 A.2.0 Symbol Definitions 1
7 Hitachi HD66770 LCD Source Driver Page 6 A.2.1 Symbol Definitions 2 A.2.2 Symbol Definitions 3 A.3.0 Logic Gate Size Notation A.4.0 Transistor Size Notation A.5.0 Capacitor Size Notation
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