EB215E Printed Circuit Board Layout for Improved Electromagnetic Compatibility

Transcription

1 Printed Circuit Board Layout for Improved Author: Eilhard Haseloff Date: Rev: *

2 The electromagnetic compatibility (EMC) of electronic circuits and systems has recently become of increasing significance. This trend has been further reinforced by the more stringent requirements of authorities regarding the electromagnetic properties of equipment. Two aspects are of interest: on the one hand the ability of a circuit to generate zero or the lowest possible amount of interference, and on the other, the immunity of the circuit to the effects of the electromagnetic energy to which it is subjected. Whereas the latter property of electronic circuits and systems has been under discussion for a very long time, and has been well documented in the literature, until now little attention has been paid to their behavior with regard to the interference which they generate. This Report is intended to explain several of the most important criteria which determine the electromagnetic compatibility of a circuit, and thus provide the development engineer with relevant information regarding the design of circuits and the layout of circuit boards. IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer's applications, adequate design and operating safe-guards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 1995, Texas Instruments Incorporated 2 Applications Laboratory

3 Contents 1. Introduction The Behavior of Digital Circuits The Suppression of Interference on the Supply Lines : The Suppression of Interference on the Signal Lines : The Oscillator : Summary Applications Laboratory

4 1. Introduction The electromagnetic compatibility of an electronic circuit is to a large extent determined by the way the components are laid out with respect to each other, and the electrical connections between them which result. Every current flowing in a line generates a current of the same magnitude in the corresponding return line. This line loop creates an antenna which is able to radiate electromagnetic energy, the magnitude of which is determined by the current amplitude, the repetition frequency of the signal, and the geometrical area of the current loops. Figure 1 shows a typical circuit layout, with the current paths which result from it. Figure 1: Current paths in an electronic system It is possible to distinguish between various classes of lines, which contribute in varying degrees to the amount of undesirable radiation which is generated: - The supply lines, which in the example shown here form the loops A- C-D-B and A-E-F-B. The energy which the system needs to operate is conducted to it by these lines. Since the power consumption of the circuit is not constant, but instead depends on its instantaneous state, all the frequency components which are generated in the individual parts of the system are to be found represented on these lines. An important factor in this respect is the blocking capacitor Cb. Because of the relatively high impedance of the supply lines, usually of the order of 100 Ω, fast changes of current can not be suppressed on the way, and this function must therefore be fulfilled by the blocking capacitor Cb. - Addition loops are formed by the signal and control lines (L-M-F-D and N-Q-P-F). The area which these lines enclose is usually small, if account is not taken of those lines which are lead outside the system. On the other hand, along these lines are frequently transmitted signals at high frequencies - such for example as those between the 4 Applications Laboratory

5 microcomputer and the memory - and attention must therefore also be paid to these signal and control lines. - The oscillator circuit, together with its external frequency determining components, forms an additional loop (G-H-J-K). The highest frequencies are usually to be found at this point. For this reason, particular care must be taken both with the design of the circuit, to avoid unnecessary interference voltages, and with the routing of connecting lines, to reduce to a minimum the effective areas of the antennas. 2. The Behavior of Digital Circuits Several important properties of logic circuits will now be explained, in order to allow a better understanding of the relationships between digital circuits, and thus to indicate specific and effective ways of improving electromagnetic compatibility. One reason this will be demonstrated with a CMOS circuit is because this technology is these days of overriding significance for the development and manufacture of complex integrated circuits; also, in this example several effects can be satisfactorily explained which arise in a similar way with other circuit technologies. Figure 2 shows the circuit of a simple inverter, constructed with an N channel and a P channel transistor. If a voltage Vi is applied to the input which is less than the threshold voltage Vth of the N channel transistor, then this transistor will be non conducting, whereas the P channel transistor will conduct. In the opposite way, the N channel transistor will conduct and the P channel transistor will be non conducting, if at the input a voltage Vi > Vcc - Vth is applied (Utp is the threshold voltage of the P channel transistor). In both cases, no current flows through the circuit, apart from negligible leakage currents. This fact is also the reason for the extremely low current consumption of CMOS circuits when in a quiescent state. Figure 2: Circuit of a CMOS inverter. If however a voltage between the two limits mentioned of Vth and Vcc - Vth is applied to the input of this inverter, then both transistors will be more or less conducting. The result with this configuration is a considerable increase in 5 Applications Laboratory

6 the supply current (see Figure 3). HCMOS circuits take in such a case a current of up to about a milliampere, whereas with fast circuits (AC) the supply current can increase to over five milliamps. Figure 3: Supply current of CMOS circuits as a function of the input voltage Since the input voltage at such a circuit can not traverse the critical voltage region when changing from a Low to a High (or vice versa) in an infinitely short time, there flow during this time pulse shaped current peaks (often known as current spikes), which have a magnitude which can not be neglected. In an input stage current amplitudes of 1 to 5 ma must be expected, as can be seen in Figure 3. Considerably more critical is this phenomenon at the outputs of an integrated circuit. Since the output stages there must drive the load which is connected to the output, these transistors must be made considerably bigger. As a result the amplitude of the current peaks also increase correspondingly, to values of from 20 ma (HCMOS) to 60 ma (AC), with a pulse width of 5 to 10 ns. 3. The Suppression of Interference on the Supply Lines The current peaks mentioned above have been found to be one of the most significant causes of electromagnetic interference. It should be remembered that every time an output is switched, a corresponding pulse of current flows along the supply lines. The latter connections lead by a more or less direct route from the module to the central power supply. The problem will be aggravated when the outputs of an integrated circuit are switched at a high repetition rate, such as along the lines connecting a processor with its corresponding memory. In practice the recommendation can be made to decouple the supply voltage close to the integrated circuit with a ceramic capacitor Cb = 100 nf. In digital 6 Applications Laboratory

7 systems this technique has been also found effective to ensure that, with the load changes which are to be expected, no inadmissible supply voltage changes can arise. This will however only result in a very limited reduction of the electromagnetic interference. In order to achieve a significant improvement, it is first necessary to analyze the complete circuit, together with its parasitic components. Figure 4 shows the circuit under examination. The two transistors Q1 and Q2 make up the output stage of an integrated circuit whose behavior will be analyzed. The connection to the surrounding circuitry is made with the Lp/Rp/Cp network, which represents the parasitic components of the package. The following individual values will be assumed: - Inductance of the package leads Lp = nh - Capacitance of the package leads Cp = pf - Ohmic resistance of the package leads Rp = 0.1 Ω From the supply terminals V cc and GND of the integrated circuit, a connection is made to the blocking capacitor Cb. The following values for the components of the impedance per unit of length will be assumed: - Inductance per unit length L' = 5 nh/cm - Capacitance per unit length C' = 0.8 pf/cm - Resistance per unit length R' = 0.01 Ω/cm The supply line subsequently reaches the first blocking capacitor Cb, whose equivalent circuit is made up as follows: - Capacitance Cb = 100 nf (typical value) - Inductance of the leads Lb = 2 nh (SMD package) - Resistive losses Rb = 0.2 Ω From here a long line (l = 5 cm) is taken to the next blocking capacitor; this line and the capacitor can also be represented by the same equivalent circuit as mentioned above. For simplicity, it will be assumed that the subsequent circuit can be represented by the well-known vehicle power supply equivalent circuit components as follows: - Inductance Ln = 5 µh - Capacitance Cn = 0.1 µf - Resistance Rn = 50 Ω 7 Applications Laboratory

8 Figure 4: Circuit with parasitic components The behavior of this circuit was simulated with the help of a SPICE Program; it was assumed that no load was connected to the output of the integrated circuit, i.e. that it was left open circuit. Figure 5 shows the calculated current waveforms. The following definitions apply: - Icc: Current in the Vcc connection to the integrated circuit - Ic1: Current in the first blocking capacitor - Ic2: Current in the second blocking capacitor. Figure 5: Currents in the supply lines The waveform of the current Icc demonstrates the current peaks already mentioned above, having an amplitude of about 15 ma. From the previous discussion it will be realized that the blocking capacitor is now scarcely able to smooth out this pulse of current. On the contrary, the resonant circuit which is formed by the line inductance (principally that of the package of the 8 Applications Laboratory

9 integrated circuit) and the blocking capacitor will be excited, such that at that point in fact an increase of current will take place (current Ic1). A major part of the current is transplanted via the supply line, and flows with a scarcely diminished amplitude also into the second blocking capacitor Ic2. From the point of view of the electromagnetic compatibility of the circuit shown, this means that the blocking capacitor in this form is unable to reduce the radiated interference significantly. The long supply lines which in practice are always present, with the relatively large areas which these lines surround, together form an effective antenna, which with the frequencies present radiate an unacceptable level of interference. In order to improve the behavior of the circuit, measures must first be taken to ensure that the currents shown can not spread in the system without hindrance. This can not be achieved with the help of the blocking capacitor alone; an improvement of its properties in respect of the requirements detailed here can not be achieved. Since the inductance causing the interference has already been formed to a large extent by the packages of the integrated circuits and by the connection to the capacitor, no significant improvement can be achieved by simply connecting in parallel several capacitors having different capacitance values. Of greater concern should rather be that the current causing the disturbance should not reach other parts of the circuit. This can be achieved by introducing an inductive coil behind the first blocking capacitor, which represents a sufficiently high resistance at high frequencies. In the circuit which has been simulated, an inductor having an inductance Lch = 1 µh was assumed, the impedance of which was limited at high frequencies by a resistor of 50 Ω connected in parallel. The results of the simulation are shown in Figure 6. As might be expected, the currents in the leads to the integrated circuit Icc and in the first blocking capacitor Ic1 have not become any smaller. A significant reduction of the current amplitude Ich, by more than 20 db, can however be observed after the inductor. This method can thus contribute to a real reduction of the radiation. 9 Applications Laboratory

10 Figure 6: Currents in the supply lines with the use of an inductor The question now to be answered is how the individual components should be arranged on the circuit board in order to achieve the best possible results, with respect to the maximum reduction of the radiation. Figure 7 shows a circuit proposal for this purpose. Under the integrated circuit a grounded area is first envisaged, which is connected to the GND pin of the circuit. This Ground ensures that the major part of the field lines emanating from the integrated circuit are concentrated between the latter and the Ground level. As a result of the skin effect occurring on the large surface area, the line inductance to the blocking capacitor is reduced still further. It is immaterial whether the capacitor is situated near the positive (Vcc) or the negative (GND) supply connection: it is only important that the parasitic inductances and the effective areas of the antennas are kept as small as possible. With regard to the placing of the inductor Lch, again the rule is that it should be as close as possible to the part of the circuit where the interference is to be suppressed. 10 Applications Laboratory

11 Figure 7: Placing of the integrated circuit, blocking capacitor and inductor. 4: The Suppression of Interference on the Signal Lines In order to find ways of reducing the interference radiated from the signal lines, Figure 8 will first be used to examine how and where the signal currents actually flow. In this circuit, a gate drives a line which at its end is terminated with an impedance Z; the latter may for example be made up of the input capacitance Cin = 5 pf of an integrated circuit and its input resistance Rin, in the approximate range of from several kilohms to a few megohms. At the transmission of a negative signal edge, the current flows from the output of the driver to the drain, and from this via the ground line back to the signal source. Simply expressed, the capacitance of the connecting line and the input capacitance of the receiver are discharged via the output resistance of the driver. When a positive signal edge is transmitted, the opposite occurs: this capacitance must be charged by the supply voltage source via the output resistance of the driver. In this case, these signal currents also appear on the supply lines. This demonstrates that the precautions to reduce interference from the supply lines have also been effective. Figure 8: Arrangement of the signal lines, together with their return lines 11 Applications Laboratory

12 Figure 9 shows the results of the simulation of the arrangement just discussed. In this example, the output of the integrated circuit drives a 5 cm long line having a characteristic impedance Zo = 100 Ω, which at its end is terminated with 100 kω and 5 pf in parallel. As a result of the largely capacitive loading, the amplitude of the current peak Icc is significantly reduced on the negative edge at the output Vout. The capacitance at the output keeps the voltage at this point for a short time at the original potential (High), and thus largely prevents a current flow through the upper transistor of the output stage (voltage difference = 0 V). At the positive edge, the signal current Iout is, however, added to the lateral current in the output Icc. Figure 9: Currents in signal and supply lines A possible way of reducing the currents themselves consists of connecting a resistance R s in series with the output. Making use of line transmission theory, it can be shown that this resistance has no negative influence on the speed of the circuit, provided that the output resistance of the driver (consisting of its internal resistance + series resistance R s ) is smaller than or equal to the characteristic impedance of the line (Z o = Ω) to which it is connected. Resistance values of about 50 Ω arise in practice. In this way, the current amplitude can in fact be reduced by about 3 db. However, as a result of the need for more components with this solution, it should only be used when the distortion resulting from line reflections needs to be reduced at the same time. The only remaining precaution which can be taken is to make the antennas as ineffective as possible: i.e. the areas enclosed by the outward and return lines as small as possible. An effective method is to run the return line parallel to the signal line (Figure 10). (This is automatically ensured with multi-layer circuit boards, which have a continuous ground level under the 12 Applications Laboratory

13 signal lines). With very long lines, or lines over which signals with high frequencies such as clock signals are transmitted, this method will often be used, because lines having defined line impedances (take care of reflections!) will as a result be also provided. Also, with an appropriate layout of the additional ground lines, the cross talk between critical lines can be reduced. Figure 10: The layout of signal and ground lines The most cost-effective and also technically effective method consists simply of keeping the critical lines as short as possible, whilst bearing in mind the following priorities: 1. Clock Lines 2. Low order address lines between processor and memory 3. Data lines between processor and memory This means that all integrated circuits, between which information at high frequencies needs to be exchanged, should be situated as close to one another as possible, in order to keep the line lengths as short as possible. This applies in particular for the lines going between the microprocessor and the memory to which it is connected. The next step is to keep the areas of the antennas as small as possible, i.e. to provide the transmitted signals with a return path, which in turn is situated as close as possible to the corresponding signal line. When disentangling the lines on circuit boards for fast digital circuits, a ground connection of the circuit board in the form of a network has been found to be effective; however, the mesh area should be only a few square centimeters. In this way, the inductance of the connections to ground and their length can be optimized. This technique automatically results in short return lines, and in small areas of the antennas. With a logical reduction of the mesh area a final arrangement results which conforms electrically to a large extent to that of a continuous ground layer in a multi-layer circuit board. In practice, care will be 13 Applications Laboratory

14 taken to ensure that ground lines are provided with a spacing of 2 to 4 cm horizontally and vertically, which together make up the required network structure. Subsequently all free areas can be filled out with copper, which then must be connected by the shortest possible path with the ground potential. With large areas, it is advisable to make the contacts at several of the ends. Since the positive supply line is connected firmly to the supply voltage connections via the blocking capacitors to the ground system, in that case a network structure connection is not needed. 5: The Oscillator The highest frequencies in digital systems are usually to be found in the clock generator. From this point onwards, the oscillator signal is mostly transmitted in the form of a divided frequency to the other subsystems. It is customary for the amplifier needed for the generation of oscillations to be integrated into the microcomputer or processors, so that only passive components, such as the crystal and several capacitors, need to be connected externally (see Figure 11). Figure 11: Circuit of crystal oscillator The circuit of the crystal oscillator needs also to be analyzed with respect to the flow of significant currents, in order to decide where interference suppression is necessary. A parallel resonant circuit is formed by the delta section consisting of the crystal X and the two capacitors C; the crystal in fact behaves like an inductance, the resonant frequency of this arrangement being somewhat above the actual resonant frequency of the crystal. The impedance of the delta section - measured at the input or output - amounts typically to several 10's of kω's, because of the high Q of the crystal. When correctly dimensioned, a very small current Io flows between the amplifier and the external components, as a result of the high resistance of the circuit. There is however an opposite effect, as a result of the MOS circuits not having output impedances which are ideally matched to the crystal: they should also be of several kilohms. In addition they usually supply a square- 14 Applications Laboratory

15 wave signal containing harmonics, for which the delta section no longer represents a high resistance. The result of this is correspondingly high output currents in the amplifier. An improvement can usually be achieved by a resistor Rs in series with the amplifier output (see Figure 11). Ideally, the voltage waveform at the input of the resonant circuit will then be a sine wave. The delta section at the output is then correctly terminated by the high input impedance of the MOS circuit, such that in this case only a very small current Ii flows. The capacitor C (see Figure 11) however has an impedance of only a few 100's of Ω's at the resonant frequency. Consequently, there flows in the resonant circuit a current Is, which is about some orders higher than on the line leading to this part of the circuit. Also, this loop must be regarded as considerably more critical, and attention must therefore be paid to a compact construction with extremely short lines. Figure 12 suggests how this can be done. The two capacitors C of the resonant circuit are placed directly beside the crystal X. It should not be necessary to repeat that the components mentioned should also be situated as close as possible to the corresponding pins of the integrated circuit. This part of the circuit of the circuit board - the crystal and the capacitors - and the radiated interference which results from it are largely under the control of the development engineer. However, it can be seen that it is also necessary that the ground connection needed for the amplifier is made as near as can be done to the integrated circuit, if possible beside the amplifier connections. This ensures that, when there are also longer connections in the package of the integrated circuit, the current loops which are unavoidable will however again enclose only a small area. Figure 12: Proposal for the layout of the metallisation for an oscillator 15 Applications Laboratory

16 6: Summary This Report has attempted to bring out several of the important factors which need to be considered when designing circuit boards, in order to assure the electromagnetic compatibility of subsystems. Most of the proposals made have been well understood for a long while as far as basic principles are concerned, and have been successfully implemented to make electronic circuits immune to self-generated interference (e.g. cross talk), or to interference coupled into them from outside. Since radiation is, in the last resort, simply the opposite of irradiation, the logical further development and application of these rules results in circuits which can be considered electromagnetically compatible with respect to the requirements which they must fulfill. The implementation of EMC compatible circuit boards already begins at an early stage, when a circuit is being first developed and the decision taken as to which components will be used. If wrong decisions are made at this early stage, they can often only be corrected later with a considerable expenditure in time and effort - for example, with costly screening. An understanding of circuit operation is absolutely necessary when laying out circuit boards, in order to ensure that appropriate measures are taken in each case. The reduction of the effective areas of the antennas requires, for example, that not only the signal line is taken by the shortest route, but that provision is also made for a corresponding return line. It can well be that a longer line, but one that is taken parallel to an existing ground or supply line, will be the better solution. At this stage it should be mentioned that computer aided layout programs have, until now, not been able to provide useable results with respect to an improvement in electromagnetic compatibility. The processes used for these programs are not in a position to take account of electrical requirements. This means that the experience of the development engineer is needed to decide how and where every critical connection should be made. The computer can then provide a useful service as an "intelligent draftsman". 16 Applications Laboratory