A Plasma Doping Process for 3D FinFET Source/ Drain Extensions

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1 A Plasma Doping Process for 3D FinFET Source/ Drain Extensions JTG 2014 Cuiyang Wang*, Shan Tang, Harold Persing, Bingxi Wood, Helen Maynard, Siamak Salimian, and Adam Brand Varian Semiconductor Equipment Silicon Systems Group

2 Outline A Plasma Doping Process for 3D FinFET Source/ Drain Extensions 1. Plasma Doping for 3D FinFETs 2. Metrology for FinFET Doping Characterization 3. Doping Responses and Fin conductance 4. Summary and Acknowledgements 2

3 3D FinFET SDE Doping Challenges 3D FinFET for device 20nm beyond Key Challenges: Conformal Doping No Fin erosion No residual defect Low leakage Beamline: Shadowing Deposition and Thermal Drive in Highly Conformal Not PR compatible Cap layer Title angle of implantation <10 deg Plasma Doping: Good conformality PR compatible 2 X + X X + PLAD implant mode offers a simplified, photoresist compatible process 3

4 VIISta PLAD Advantages for Advanced Devices Production proven technology across memory, logic and CIS process spaces Plasma Doping Advantages: Pulsed DC bias allows for precision doping Sidewall doping for advanced 3D devices: FinFET s, VNAND, and CIS Independent control of RF plasma generation and DC bias balances deposition and implant Faraday dosimetry provides precision process tracking High Density Low Energy RF Plasma Shallow Sidewall doping doping to reduce for advanced contact3d resistance devices: and FinFET s, passivate VNAND, surfaces CIS Pulsed DC Bias High dose implants to modify material properties: workfunction, etching rate, & conductivity. All future devices are 3D PLAD can modify properties of vertical sidewalls 4

5 Benefits and Challenges for PLAD FinFET Doping 1: DIRECT IMPLANT 3: REFLECTED ION IMPLANT 2: DEPOSITION and KNOCK-IN 4: SPUTTERING Various Process parameters: Power, Pressure, gas mixture ratio Energy, Dose, PW, Frequency 2 Si Fin X Si Fin X X + Multiple Mechanisms: Direct implant Deposition and knock in Reflected implant Sputtering/Etching Wafer Results: Conformality Minimize fin erosion Eliminate residual defects Doping of Si Fin structures is a driven by multiple mechanisms and competing effects 5 Ion Implant Technology, 2014

6 Outline A Plasma Doping Process for 3D FinFET Source/ Drain Extensions 1. Plasma Doping for 3D FinFETs 2. Metrology for FinFET Doping Characterization 3. Doping Responses and Fin conductance 4. Summary and Acknowledgements 2

7 Dopant Characterization Metrology 1.5D SIMS 1. Lower detection limit 2. Results can be quantified 3. Average over number of fins 4. No lateral resolution EDS mapping/eds line scans 1. 1% detection limit 2. Lateral resolution 3. Hard to quantify A B C D E Fin resistor: active dopant A B C D E Each metrology has its limitations and the characterization results need to be interpreted carefully

8 Outline A Plasma Doping Process for 3D FinFET Source/ Drain Extensions 1. Plasma Doping for 3D FinFETs 2. Metrology for FinFET Doping Characterization 3. Doping Responses and Fin conductance 4. Summary and Acknowledgements 2

9 Process Flow and Structure of Samples PLAD Implant Approach Start Wafer PLAD Implant + Passivation Si SPM clean Anneal Post DHF Applied Materials Maydan Center Fin Structure Fin height: ~130nm Fin width: ~50nm Fin pitch: ~110nm PLAD implant mode offers a simplified, photoresist compatible process 9 Ion Implant Technology, 2014

10 Implant Approach: Energy and Dose Tuning of Fin Doping B D XTEM 1.5D SIMS SIMS As (atm/cm3) 1.E+21 1.E+20 1.E Depth (nm) 2D EDS B D - A: Low Energy, Low Dose - B: Low Energy, High Dose - C: High energy, Low Dose - D: High Energy, High Dose Sidewall Dose (at/cm2) 1.0E E E E E+14 A B C D Tunable Fin doping is demonstrated by energy and dose control A B C D ~50% increase in Average Sidewall Dose Fin height: ~130nm, Fin width: ~50nm, Fin pitch: ~110nm 10

11 Implant Approach: Plasma Process Parameter Tuning of Fin Doping XTEM DR1 DR3 - DR1: Dose Rate 1 - DR2: Dose Rate 2 - DR3: Dose Rate 3 SIMS As (Atoms/cm3) Sidewall Dose (at/cm2) 1E+21 1E+20 1E E E E E E D SIMS Depth (nm) DR1 DR2 DR3 Fin doping can be further optimized by plasma parameter tuning DR1 DR2 DR3 DR1 DR3 2D EDS ~36% increase in average sidewall Dose Fin height: ~130nm, Fin width: ~50nm, Fin pitch: ~110nm 11

12 Implant Approach: EDS Verification of Dopant into Fin Sidewall Si Fin Si or O composition (%) Si Fin SiO EDS Line Scan Site Fin height: ~130nm, Fin width: ~50nm, Fin pitch: ~110nm As Composition (%) O Si As EDS as-implanted line scan demonstrates As doping into fin sidewall 12

13 Outline A Plasma Doping Process for 3D FinFET Source/ Drain Extensions 1. Plasma Doping for 3D FinFETs 2. Metrology for FinFET Doping Characterization 3. Doping Responses and Fin conductance 4. Summary and Acknowledgements 2

14 Summary Plasma doping of Fin structures by an implant based approach has been demonstrated The application of plasma doping into logic device technology is rapidly accelerating Efforts to enhance fundamental understanding and to enable predictive approaches are in progress As 3D transistor technology continues to be implemented, PLAD will be required for doping and material property modification 14

15 Acknowledgements Appreciation is extended to Alexander Pagdanganan, Martin Hilkene, and Matthew Castle for providing the poly-silicon deposition and process flows at the Maydan Center We would also like to thank Peter Ryan for his support of the plasma doped sample preparation 15

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