BJT Ebers-Moll Model and SPICE MOSFET model

Transcription

1 Department of Electrical and Electronic Engineering mperial College London EE 2.3: Semiconductor Modelling in SPCE Course homepage: BJT Ebers-Moll Model and SPCE MOSFET model Paul D. Mitcheson Room 1111, EEE EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 1

2 Summary of last lecture We saw that: The SPCE diode model is a piecewise non-linear function, which includes breakdown t is essential to have the GMN convergence aid in that model because the conductance of the diode is set to zero for much of the characteristic in reverse bias The exponential equation you know for the behaviour of a BJT is not accurate in the saturation region and so not useful (on its own) for a SPCE model The started to look at the development of the Ebers Moll BJT model We can think of the currents in a saturated BJT as being a sum of forward and reverse carrier flows in the base for equivalent forward and reverse BJTs operating in active mode EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 2

3 This lecture We will finish the Ebers-Moll model and see how it relates to the SPCE model We will look briefly at the SPCE MOSFET models EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 3

4 Reminder from last time - the BJT in saturation Now let s look at what happens to the device saturation. n saturation, both junctions are forward biased. f we look at the concentration of electrons in the device, we have: Figure 1 BJT electron concentration in saturation EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 4

5 Carrier flows in Saturation Electron current decreased Base current increased holes injected into collector and emitter EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 5

6 Look at the electron current Can think of this as being made of a forward and a reverse flow of electrons (device in saturation in each case), due to the principle of linear superposition: t f r t = = = = n K n K L n K L f pe pe b pc b ' ' ' n L r b pc ' = K n pe ' n L b pc ' Where K is just a constant of proportionality and L b is the length of the base EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 6

7 Carrier flows with forward and reverse currents EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 7

8 Convert these carrier flows into a circuit diagram We are almost at the Ebers-Moll model EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 8

9 We had already proved that in saturation: α F = B F F Nbe And therefore we can also write: α R = B R R Nbc This gives us the final well known Ebers-Moll injection model EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 9

10 Ebers-Moll njection Model F V BE = ES exp 1 nvt R V BC = CS exp 1 nvt EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 10

11 Ebers-Moll Equations = = 1 exp 1 exp t BC CS t BE ES F R F F C nv V nv V α α = = 1 exp 1 exp t BE ES t BC CS R F R R E nv V nv V α α ) (1 ) 1 ( R R F F C E B α α + = = t appears we need 4 parameters to completely specify the model: ES, CS, α R, α F. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 11

12 Simplify the model t can be shown that: α = α F ES R CS (See the original paper by Ebers and Moll Large-Signal behaviour of junction transistors ). We know in active mode: c V be = s exp 1 Vt Thus we can write: α F = α = ES R CS S EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 12

13 Apart from the fact that SPCE can use the existing diode models and existing current source models to make a BJT with the Ebers-Moll model, what is so great about the Ebers-Moll model for computer simulation? EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 13

14 t works under all operating conditions active, saturation etc. SPCE does not need to implement different equations for different regions of operation. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 14

15 Ebers-Moll Transport Model used in SPCE SPCE does not use the injection model it uses the transport model. This is simply a change of notation CC EC V BE = S exp 1 nvt V BC = S exp 1 nvt EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 15

16 One final change to get to the final model that SPCE uses β β F R α F = 1 α α R = 1 α F R CT = CC EC Whilst the internal operation of the model is different, the terminal currents are the same for given terminal voltages. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 16

17 What are physical meanings of β F and β R? EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 17

18 β F is the current gain ( C / B ) of the device when it is operating with the emitter as the emitter and the collector as the collector in the active mode β R is the current gain of the device when it is operating with the emitter as a collector and the collector as an emitter in the reverse active mode Note that as the device is made to have higher forward current gain (the terminals for emitter and collector are not completely interchangeable due to different dopings of the collector and emitter) than reverse current gain. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 18

19 Final DC static model Add terminal resistances and the GMN convergence aid conductances: EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 19

20 The important DC model SPCE parameters S ( s ) RE (r e ) RB (r b ) RC (r c ) NF (n) NR (n) BF (β F ) BR (β R ) The transistor saturation current The Ohmic resistance of the contact and bond wire at the emitter The Ohmic resistance of the contact and bond wire at the base The Ohmic resistance of the contact and bond wire at the collector The emission (or ideality) coefficient for the base-emitter junction The emission (or ideality) coefficient for the base-collector junction The forward current gain The reverse current gain Note that the BJT diode equations do not model breakdown, hence there are no BV and BV parameters for the BJT model. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 20

21 Large Signal Transient Model Add in the capacitances of the two diodes: EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 21

22 Additional parameters to specify the transient model CJE CJC VJE VJC TF TR Zero bias base-emitter junction capacitance Zero bias base-collector junction capacitance Base-emitter junction built in voltage Base-collector junction built in voltage Forward transit time Reverse transit time There is also an area scaling parameter A for the BJT, which works in exactly the same way as for the diode. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 22

23 The SPCE MOSFET Models DC Model Essentially 1 diode model used in SPCE and 1 BJT model Many MOSFET models We will look at the original ones available in PSpice BSM (Berkeley Short Channel GFET model) model. (Over 100 parameters in the DC model alone!) EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 23

24 The basic SPCE level 1 static model (as proposed by Shichman and Hodges) is as follows: DS = μ C 0 ox W L eff 2 V DS ( VGS VTH ) VDS 2 DSsat 1 = μ0c 2 ox W L eff ( V V ) 2 GS TH EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 24

25 You are already familiar with an empirical correction to these equations to account for the channel length modulation: DS 2 W V = μ 0 Cox GS TH DS 1 + Leff 2 DS ( V V ) V [ λv ] DS And: DSsat 1 W 2 0Cox GS TH 2 Leff ( V V ) [ λv ] = μ 1+ DS These are the essentially the equations implemented by SPCE in the static model, but there are some points worthy of noting. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 25

26 The actual specific equations used by SPCE for the static level 1 model are: n the linear region: DS 2 = W V KP GS TH DS L 2X 1 jl 2 DS ( V V ) V [ + λv ] DS n the saturation region: DSsat = KP W GS TH 2 L 2X 1 jl 2 ( V V ) [ + λv ] DS X jl is the lateral diffusion parameter EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 26

27 Threshold voltage t is important to note that the threshold voltage changes with changes in body-source voltage, V BS. SPCE uses the following equation for the threshold voltage: V TH = V ( 2φ V φ ) T 0 + p BS γ 2 p Where V T0 is the threshold voltage when the body-source voltage is zero, γ is the body effect parameter and φ p is the surface inversion potential. Note that if the bulk is connected to the source (i.e. the MOSFET is acting as a 3 terminal device, the threshold voltage is always equal to the value V T0 ). f the bulk voltage is decreased relative to the source, why does the threshold voltage increase? When would the bulk not be connected to the source? EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 27

28 There is a depletion layer which grows into the accumulation region and thus for a given V GS, cuts off the channel. Need to add more V GS to re-establish the channel When we have stacked transistors in integrated circuits. f you connected bulk to source on each transistor in an integrated circuit you would end up shorting many points in the circuit to ground EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 28

29 Complete DC model There are the body-source and body-drain diodes EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 29

30 EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 30

31 Equations used for the diode models More simple than the SPCE diode model. For forward bias on the body-source/body-drain diodes: V = exp 1 BS BS SS + GMN V t V GMN BD BD = SD exp + V 1 t V V BS BD For negative reverse bias on those diodes: V BS BS = SS + GMN Vt V GMN BD BD = SD + Vt V V BS BD EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 31

32 MOSFET body diodes These reverse bias terms are simply the first terms in a power series expansion of the exponential term. Note that the GMN convergence resistance is also present. SS and SD are taken to be one constant in SPCE, known as SPCE parameter S. Can sometimes be better to set the body diode parameters to open circuit and add in your own diode model especially in power electronics EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 32

33 DC MOSFET parameters L W KP (KP) VT0 (V T0 ) GAMMA (γ) PH (φ p ) RS (R S ) RD (R D ) LAMBDA (λ) XJ (X jl ) S ( SS, SD ) Channel length Channel width The transconductance parameter Threshold voltage under zero bias conditions Body effect parameter Surface inversion potential Source contact resistance Drain contact resistance Channel length modulation parameter Lateral diffusion parameter Reverse saturation current of body-drain/source diodes EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 33

34 Large Signal Transient Model Again, we need to add some capacitances to the DC model to create the transient model to form the final transient model, as shown below: EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 34

35 Capacitances Static overlap capacitances between gate and drain (C GB0 ), gate and source (C GS0 ), and gate and bulk (C GB0 ). These are fixed values, and are specified per unit width in SPCE. C C n Saturation: = 2 C 3 + C GS ox GS 0 = C GD GD0 W W No surprise here! n saturation, i.e. after pinch-off, the it is assumed that altering the drain voltage does not have any effect on stored charge in the channel and thus the only capacitance between gate and drain is the overlap capacitance. EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 35

36 n the linear/triode region n this region, the following equations are used: C C = C 2 VGS VDS V TH 1 + C 2( VGS VTH ) VDS GS ox GS 0 = C 2 VGS V TH 1 + C 2( VGS VTH ) VDS GD ox GD0 W W We will not show where these equations come from, but we will make one notable point: As the device is moved further into the linear region, i.e. V GS becomes large compared to (V DS -V TH ) then the values of C GS and C GD become close to C ox /2 (plus the relevant overlap capacitance). EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 36

37 The body diode capacitances The capacitances of the body diodes are given by slightly modified expressions for junction capacitances of the diode model: You are aware of the expression for a pn diode junction capacitance: C j = C j 1 (0) V V 0 The MOSFET equation is based on the following slightly modified equation: EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 37

38 C j = C j 1 (0) V V 0 + C jsw 1 (0) V V 0 The junction capacitance is made up of two components. The main component, due to C j (0) is the normal junction capacitance The second parameter is the perimeter junction capacitance of the diffused source. The diffusion capacitance of the body diodes is not included in the model. Why is this? EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 38

39 The diffusion capacitance is zero in reverse bias and the MOSFET must be operated with the bulk-drain and bulk-source diodes in reverse bias to stop large bulk currents flowing The additional parameters required for specifying the transient model in addition to those required by the DC model are thus: CGD0 (C GD0 ) CGS0 (C GS0 ) CJ (C j ) CJSW (C jsw ) TOX (t ox ) Gate drain overlap capacitance per unit width of device Gate source overlap capacitance per unit width of device Zero bias depletion capacitance for body diodes Zero bias depletion perimeter capacitance for body diodes Oxide thickness (used for calculating C ox ) EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 39

40 Course Summary Looked briefly at the algorithms used in SPCE and the need for different models for different types of simulation. Need for convergence aids in the Newton-Raphson algorithm Diode model a piece-wise non-linear model that includes breakdown BJT model based on the coupled diode Ebers-Moll model. Very useful as it works in all operating modes for the BJT MOSFET model based on the device equations you already know, but adds in the body diodes EE2.3 Semiconductor Modelling in SPCE / PDM v1.0 40