Transistor amplifiers: Biasing and Small Signal Model

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1 Transistor amplifiers: iasing and Small Signal Model Transistor amplifiers utilizing JT or FT are similar in design and analysis. Accordingly we will discuss JT amplifiers thoroughly. Then, similar FT circuits are briefly reviewed. onsider the circuit below. The operating point of the JT is shown in the space. i v i V Let us add a sinusoidal source with an amplitude of V in series with V. In response to this additional source, the base current will become i leading to the collector current of and voltage of. ~ V i v i v V For example, without the sinusoidal source, the base current is 150 µa, = 22 ma, and = 7 V (the Q point). If the amplitude of is 40 µa, then with the addition of the sinusoidal source i = cos(ωt) and varies from 110 to 190 µa. The JT operating point should remain on the load line and collector current and voltage change with changing base current while remaining on the load line. For example when base current is 190 µa, the collector current is 28.6 ma and voltage is about 4.5 V. As can be seen from the figure above, the collector current will approximately be = cos(ωt) and voltage is = cos(ωt). The above example shows that the signal from the sinusoidal source V is greatly amplified and appears as changes either in collector current or voltage. It is clear from the figure that this happens as long as the JT stays in the active-linear region. As the amplitude of is increased, the swings of JT operating point along the load line become larger and 65 Lecture Notes (F. Najmabadi), Winter

2 larger and, at some value of, JT will enter either the cut-off or saturation region and the output signals will not be a sinusoidal function. Note: An important observation is that one should locate the Q point in the middle of the load line if we want to have the largest output signal. The above circuit, however, has two major problems: 1) The input signal, V, is in series with the V biasing voltage making design of previous two-port network difficult, and 2) The output signal is usually taken across as. This output voltage has a D component which is of no interest and can cause problems in the design of the next-stage, two-port network. The D voltage needed to bias the JT (establish the Q point) and the A signal of interest can be added together or separated using capacitor coupling as discussed below. apacitive oupling For D voltages (ω = 0), the capacitor is an open circuit (infinite impedance). For A voltages, the impedance of a capacitor, Z = j/(ω), can be made sufficiently small by choosing an appropriately large value for (the higher the frequency, the lower that one needs). This property of capacitors can be used to add and separate A and D signals. xample below highlights this effect. onsider the circuit below which includes a D source of 15 V and an A source of v i = V i cos(ωt). We are interested to calculate voltages v A and v. The best method to solve this circuit is superposition. The circuit is broken into two circuits. In circuit 1, we kill the A source and keep the D source. In circuit 2, we kill the D source and keep the A source. Superposition principle states that v A = v A1 v A2 and v = v 1 v 2. v i A V 1 v A 2 1 v 15 V 15 V 2 v A1 1 v 1 v A2 2 1 v 2 v i 1 1 v i 1 onsider the first circuit. It is driven by a D source and, therefore, the capacitor will act as open circuit. The voltage v A1 = 0 as it is connected to ground and v 1 can be found by voltage divider formula: v 1 = 15 1 /( 1 2 ). As can be seen both v A1 and v 1 are D voltages. 65 Lecture Notes (F. Najmabadi), Winter

3 In the second circuit, resistors 1 and 2 are in parallel. Let b = 1 2. The circuit is a high-pass filter: V A2 = V i and V 2 = V i ( b )/( b 1/jω). If we operate the circuit at frequency above the cut-off frequency of the filter, i.e., b 1/ω, we will have V 2 V A2 = V i and v 2 v A2 = V i cos(ωt). Therefore, v A = v A1 v A2 = V i cos(ωt) v = v 1 v 2 = V i cos(ωt) Obviously, the capacitor is preventing the D voltage to appear at point A, while the voltage at point is the sum of D signal from 15-V supply and the A signal. Using capacitive coupling, we can reconfigure our previous amplifier circuit as is shown in the figure below. apacitive coupling is used extensively in transistor amplifiers. V ~ i v i v V JT amplifier circuits are analyzed using superposition principle, similar to example above: 1) D iasing: Input signal is set to zero and capacitors act as open circuit. This analysis establishes the Q point in the active linear region. 2) A esponse: D bias voltages are set to zero. The response of the circuit to an A input signal is calculated and transfer function, input and output impedances, etc. are found. The break up of the problem into these two parts have an additional advantage as the requirement for accuracy are different in the two cases. For D biasing, we are interested in locating the Q point roughly in the middle of active linear region. The exact location of the Q point is not important. Thus, a simple model, such as large-signal model of page 78 is quite adequate. We are, however, interested to compute the transfer function for A signals quite accurately. Our large-signal model is not good for the desired accuracy and we will develop a model which is accurate for small A signals below. FT-based amplifier are similar. FT should be biased similar to JT. Analysis method is also similar and broken into D biasing and A response. 65 Lecture Notes (F. Najmabadi), Winter

4 JT iasing A simple bias circuit is shown. As we like to have only one power supply, the base circuit is also powered by. (To avoid confusion, we will use capital letters to denote D bias values e.g., I.) Assuming that JT is in active-linear state, we have: i -KVL: = I V I = V v I = βi = β V -KVL: = I V V = I V = β ( V ) For a given circuit (known,,, and JT β) the above equations can be solved to find the Q-point (I, I, and V ). Alternatively, one can use the above equation to design a JT circuit (known β) to operate at a certain Q point. (Note: Do not memorize the above equations or use them as formulas, they can be easily derived from simple KVLs). xample 1: Find values of, in the above circuit with β = 100 and = 15 V so that the Q-point is I = 25 ma and V = 7.5 V. Since the JT is in active-linear region (V = 7.5 > V γ ), I = I /β = 0.25 ma. Writing the KVLs that include V and V we get: KVL: I V = 0 = = 57.2 kω KVL: = I V 15 = = 300 Ω xample 2: onsider the circuit designed in example 1. What is the Q point if β = 200. We have = 57.2 kω, = 300 Ω, and = 15 V but I, I, and V are unknown. They can be found by writing KVLs that include V and V : -KVL: I V = 0 I = V I = β I = 50 ma = 0.25 ma -KVL: = I V V = = 0 65 Lecture Notes (F. Najmabadi), Winter

5 As V < v γ the JT is not in active-linear region and the above equations are not valid. Values of I and V should be calculated using the JT model for saturation region. The above examples show the problem with our simple biasing circuit as the β of a commercial JT can depart by a factor of 2 from its average value given in the manufacturers spec sheet. nvironmental conditions can also play an important role. In a given JT, I increases by 9% per for a fixed V. onsider a circuit which is tested to operate perfectly at 25. At a temperature of 35, I will be roughly doubled and the JT will be in saturation! The problem is that our biasing circuit fixes the value of I (independent of JT parameters) and, as a result, both I and V are directly proportional to JT β (see formulas in the previous page). A biasing scheme should be found that make the Q-point (I and V ) independent of transistor β and insensitive to the above problems Use negative feedback! Stable biasing schemes This biasing scheme can be best analyzed and understood if we replace 1 and 2 voltage divider with its Thevenin equivalent: 1 V = and = 1 2 i v The emitter resistor, is a sneaky feedback. Suppose I becomes larger than the designed value (larger β, increase in temperature, etc.). Then, V = I will increase. Since V and do not change, KVL in the loop shows that I should decrease which will reduce I back to its design value. If I becomes smaller than its design value opposite happens, I has to increase and will increase and stabilize I. Analysis below also shows that the Q point is independent of JT parameters: I I = βi V 2 Thevenin quivalent { i v -KVL: V = I V I I = V V β -KVL: = I V I V = I ( ) hoose such that β (this is the condition for the feedback to be effective): I V V β 65 Lecture Notes (F. Najmabadi), Winter

6 I V V V = I ( ) (V V ) Note that now both I and V are independent of β! One can appreciate the working of this biasing scheme by comparing it to the poor biasing circuit of page 109. In that circuit, I was set by the values of and. As a result, I = βi was directly proportional to β. In this circuit, KVL in loop gives V = I V I. If we choose I I or (I /I ) β (feedback condition above), the KVL reduces to V V I, forcing a constant I independent of JT parameters. As I I this will also fixes the Q point of JT. If JT parameters change (different β, change in temperature), the circuit forces I to remain fixed and changes I! Another important point follows from V V I. As V is not a constant and can change slightly (can drop to 0.6 or increase to 0.8 V), we need to ensure that I is much larger than possible changes in V. As changes in V is about 0.1 V, we need to ensure that V = I 0.1 or V > = 1 V. xample: Design a stable bias circuit with a Q point of I = 2.5 ma and V = 7.5 V. Transistor β ranges from 50 to 200. Step 1: Find : As we like to have the Q-point to be located in the middle of the load line, we set = 2V = = 15 V. Step 2: Find and : V = I ( ) = 7.5 = 3 kω We are free to choose and (choice is usually set by the A behavior which we will see later). We have to ensure, however, that V = I > 1 V or > 1/I = 400 Ω. Let s choose = 1 kω and = 2 kω for this example. Step 3: Find and V : We need to set β. As any commercial JT has a range of β values and we want to ensure that the above inequality is always satisfied, we should use the minimum β value: β min = 0.1β min = , 000 = 5 kω V V I = = 3.2 V 65 Lecture Notes (F. Najmabadi), Winter

7 Step 4: Find 1 and 2 = 1 2 = = 5 kω V = 2 = = 0.21 The above are two equations in two unknowns ( 1 and 2 ). The easiest way to solve these equations are to divide the two equations to find 1 and use that in the equation for V : 1 = 5 kω = 24 kω = = = 6.4 kω 1 2 easonable commercial values for 1 and 2 are and 24 kω and 6.2 kω, respectively. Other iasing Schemes As we will see later, value of b = 1 2 appears in the formauls for the input resistance (and lower cut-off frequency) of amplifier configuration, greatly reducing the input resistance and increasing the value of the coupling capacitor. A simple, but effective alternative is to use the c as the feedback resistor. We assume that the JT is in active-linear regime. Since I I, by KL I 1 = I I I. Then: -KVL: V cc = I I V I 1 V cc c V cc = ( /β) I V I = V cc V /β If, /β or β, we will have (setting V = V γ ): I = V cc V γ Since I is independent of β, the bias point is stable. We still need to prove that the JT is in the active linear region. We write a KVL through and terminals: V = I V = I V γ > V γ 65 Lecture Notes (F. Najmabadi), Winter

8 Since V > V γ, JT is indeed in active regime. To see the negative feedback effect, rewrite -KVL as: I = V cc V γ I Suppose the circuit is operating and JT β is increased (e.g., increase in temperature). In that case I will increase which raises the voltage across resistor ( I ). From the above equation, this will lead to a reduction in I which, in turn, will decrease I = βi and compensate for any increase in β. If JT β is decreased (e.g., decrease in temperature), I will decrease which reduces the voltage across resistor ( I ). From the above equation, this will lead to an increase in I which, in turn, will increase I = βi and compensate for any decrease in β. Note: The drawback of this bias scheme is that the allowable A signal on V is small. Since ± > V γ in order for the JT to remain in active regime, we find the amplitude of A signal, < I = ( /β)i. Since, /β for bias stability thus, I. This is in contrast with the standard biasing with emitter resistor in which is comparable to I. Other iasing Schemes We discussed using an emitter resistor to stabilize the bias point (Q point) of a JT amplifier as is shown ( c can be zero). There are two main issues associated with this bias configuration which may make it unsuitable for some applications. 2) ecause V > 0, a coupling capacitor is typically needed to attach the input signal to the amplifier circuit. 1 2 i v Thevenin quivalent { V The combination of the coupling capacitor and the input resistance of the amplifier leads to a lower cut-off frequency for the amplifier as we discussed before, i.e., this biasing scheme leads to an A amplifier. In some applications, we need D amplifiers. iasing with two voltage sources, discussed below, will solve this problem. 3) iasing with one voltage source requires 3 resistors ( 1, 2, and ), a coupling capacitor, and possibly a by-pass capacitor. In integrated circuit chips, resistors and large capacitors take too much space. It is preferable to reduce their number as much as possible and replace their function with additional transistors. For I applications, current-mirrors are usually used to bias the circuit as is discussed below. 65 Lecture Notes (F. Najmabadi), Winter i v

9 iasing with 2 Voltage Sources: onsider the biasing scheme as is shown. This biasing scheme is similar to bias with one voltage source. asically, we have assigned a voltage of V to the ground (reference voltage) and chosen V = V. As such, all of the currents and voltages in the circuit should be identical to the bias with one power supply. We should find that this is a stable bias point as long as β. This is shown below: i v -KVL: I V I V = 0 I I = βi V I β I = V V I = V V /β Similar to the bias with one power supply, if we choose such that, β, we get: -KVL: I I V V = const = I V I V V = V I ( ) = const Therefore, I, I, and V will be independent of JT parameters (i.e., JT β) and we have a stable bias point. Similar to stable bias with one power supply, we also need to ensure that I 1 V to account for small possible variation in V. ias with two power supplies has certain advantages over biasing with one power supply, it has two resistors, and (as opposed to three), and in fact, in most applications, we can remove altogether. In addition, in some configuration, we can directly couple the input signal to the amplifier without using a coupling capacitor (because V 0). As such, such a configuration can also amplify D signals. oth stable biasing schemes, with one or two power supplies, use as a negative feedback to fix I and make it independent of JT parameters. In effect, any biasing scheme which results in a constant I, independent of JT parameters, will be a stable biasing technique. Schematically, all these biasing schemes can be illustrated with an ideal current source in the emitter circuit as is shown. For the circuits which include a current source, resistor is NOT needed for stable biasing anymore. For example, can be removed from common emit tor amplifiers with bypass capacitors. i v I V 65 Lecture Notes (F. Najmabadi), Winter

10 ecause of elimination of and (or reducing ), biasing with a current source is the preferred way in most integrated circuits. Such a biasing can be achieved with a current mirror circuit. iasing in Is: urrent Mirrors A large family of JT circuit, including current mirrors, differential amplifiers, and emittercoupled logic circuits include identical JT pairs. In most cases, two identical JTs are manufactured together on one chip in order to ensure that their parameters are approximately equal (Note that if you take two commercial JTs, e.g., two 2N3904, there is no guaranty that β 1 = β 2, while if they are grown together on a chip, β 1 β 2. For our analysis, we assume that both JTs are identical.) onsider the circuit shown with identical transistors, Q 1 and Q 2. ecause both bases and emitters of the transistors are connected together, KVL leads to v 1 = v 2. As we discussed before, JT operation is controlled by v. As v 1 = v 2 and transistors are identical, they should have similar i, i and i c : I ref 2i I o β 1 Q Q 1 2 v 1 v 2 i = i β 1 KL: I ref = i c 2i β 1 = I o I ref = I o = i c = βi β 1 i β 1 β β 2 = 1 1 2/β 2i β 1 = β 2 β 1 i i V i (We have used = βi and i = (β 1)i to illustrate impact of β.) For β 1, I o I ref (with an accurancy of 2/β). This circuit is called a current mirror as the two transistors work in tandem to ensure that current I o remains the same as I ref no matter what circuit is attached to the collector of Q 2. As such, the circuit behaves as a current source and can be used to bias JT circuits. I ref I o Q Q 1 2 v 1 v 2 i i V 65 Lecture Notes (F. Najmabadi), Winter

11 Value of I ref can be set in many ways. The simplest is by using a resistor c as is shown. y KVL, we have: = I ref v 1 V I ref = V v 1 = const urrent mirror circuits are widely used for biasing JTs. In the simple current mirror circuit above, I o = I ref with a relative accuracy of 2/β and I ref is constant with an accuracy of small changes in v 1. Variation of current mirror circuit, such as Wilson current mirror and Widlar current mirror (See Sedra and Smith) are available that lead to I o = I ref with a higher accuracy and compensate for 2/β and changes in v effects. Wilson mirror is especially popular because it replace c with a transistor. The right hand part of the current mirror circuit can be duplicated such that one current mirror circuit can bias several JT circuits as is shown. In fact, by coupling output of two of the right hand parts, integer multiples of I ref can be made for biasing circuits which require a higher bias current. Iref I o I o 2I o V iasing FTs: ias circuits for FT amplifiers are similar to JT circuits. Some examples are shown in below. (xercise Find the bias point of the FT in each of the circuits below.) V DD V DD V DD 2 D i D G V DD D i D D I ref I o 1 S i D 1 S V SS Standard ias ias through D ias with 2 power supplies FT urrent Mirror 65 Lecture Notes (F. Najmabadi), Winter

12 JT Small Signal Model and A amplifiers We calculated the D behavior of the JT (D biasing) with a simple large-signal model as shown. In active-linear region, this model is simply: v = 0.7 V, = βi. This model is sufficient for calculating the Q point as we are only interested in ensuring sufficient design space for the amplifier, i.e., Q point should be in the middle of the load line in the active linear region. In fact, for our good biasing scheme with negative feedback, the Q point location is independent of JT parameters. (and, therefore, independent of model used!) i v γ v v sat A comparison of the simple model with the iv characteristics of the JT shows that our simple largesignal model is very crude and is not accurate for A analysis. For example, the input A signal results in small changes in v around 0.7 V (Q point) and corresponding changes in i. The simple model cannot be used to calculate these changes (It assumes v is constant!). Also for a fixed i, is not exactly constant as is assumed in the simple model (see vs graphs). As a whole, the simple large signal model is not sufficient to describe the A behavior of JT amplifiers where more accurate representations of the amplifier gain, input and output resistance, etc. are needed. A more accurate, but still linear, model can be developed by assuming that the changes in transistor voltages and currents due to the A signal are small compared to corresponding Q-point values and using a Taylor series expansion. onsider function f(x). Suppose we know the value of the function and all of its derivative at some known point, x 0. Then, value 65 Lecture Notes (F. Najmabadi), Winter

13 of the function in the neighborhood of x 0 can be found from the Taylor Series expansion as: f(x 0 x) = f(x 0 ) x df ( x)2 d 2 f dx x=x0 2 dx 2... x=x0 lose to our original point of x 0, x is small and the high order terms of this expansion (terms with ( x) n, n = 2, 3,...) usually become very small. Typically, we consider only the first order term, i.e., f(x 0 x) f(x 0 ) x df dx x=x0 The Taylor series expansion can be similarly applied to function of two or more variables such as f(x, y): f(x 0 x, y 0 y) f(x 0, y 0 ) x f y f x x0,y 0 y In a JT, there are four parameters of interest: i,, v, and. The JT iv characteristics plots, specify two of the above parameters, v and in terms of the other two, i and, i.e., v is a function of i and (written as v (i, ) similar to f(x, y)) and is a function of i and, (i, ). Let s assume that JT is biased and the Q point parameters are I, I, V and V. We now apply a small A signal to the JT. This small A signal changes and i by small values around the Q point: x0,y 0 i = I = V The A changes, and results in A changes in v and that can be found from Taylor series expansion in the neighborhood of the Q point, similar to expansion of f(x 0 x, y 0 y) above: v (I, V ) = V v i v Q Q (I, V ) = I i Q Q 65 Lecture Notes (F. Najmabadi), Winter

14 where all partial derivatives are calculated at the Q point and we have noted that at the Q point, v (I, V ) = V and (I, V ) = I. We can denote the A changes in v and as and, respectively: v (I, V ) = V (I, V ) = I So, by applying a small A signal, we have changed i and by small amounts, and, and JT has responded by changing, v and by small A amounts, and. From the above two sets of equations we can find the JT response to A signals: = v i v, = i where the partial derivatives are the slope of the iv curves near the Q point. We define h ie v i, h re v, h fe i, h oe Thus, response of JT to small signals can be written as: = h ie h re = h fe h oe which is our small-signal model for JT. We now need to relate the above analytical model to circuit elements so that we can solve JT circuits. onsider the expression for = h ie h re ach term on the right hand side should have units of Volts. Thus, h ie should have units of resistance and h re should have no units (these are consistent with the definitions of h ie and h re.) Furthermore, the above equation is like a KVL: the voltage drop between base and emitter is written as sum of voltage drops across two elements. The voltage drop across the first element is h ie. So, it is resistor with a value of h ie. The voltage drop across the second element is h re. Thus, it is dependent voltage source. ΒΕ Β V 1 = h ie V 2 = h v re Β ΒΕ h ie h re 65 Lecture Notes (F. Najmabadi), Winter

15 Now consider the expression for : = h fe h oe ach term on the right hand side should have units of Amperes. Thus, h fe should have no units and h oe should have units of conductance (these are consistent with the definitions of h oe and h fe.) Furthermore, the above equation is like a KL: the collector current is written as sum of two currents. The current in first element is h fe. So, it is dependent current source. The current in the second element is proportional to h oe /. So it is a resistor with the value of 1/h oe. i = h 1 fe h fe 1/h oe i = h 2 oe Now, if put the models for and terminals together we arrive at the small signal hybrid model for JT. It is similar to the hybrid model for a two-port network (arlson hap. 14). h ie h fe h 1/h oe v re The small-signal model is mathematically valid only for signals with small amplitude. ut the model is so useful that is often used for sinusoidal signals with amplitudes approaching those of Q-point parameters by using average values of h parameters. h parameters are given in manufacturer s spec sheets for each JT. It should not be surprising to note that even in a given JT, h parameter can vary substantially depending on manufacturing statistics, operating temperature, etc. Manufacturer s spec sheets list these h parameters and give the minimum and maximum values. Traditionally, the geometric mean of the minimum and maximum values are used as the average value in design (see table). Since h fe = / i, JT β = /i is sometimes called h F in manufacturers spec sheets and has a value quite close to h fe. In most electronic text books, β, h F and h fe are used interchangeably Lecture Notes (F. Najmabadi), Winter

16 Typical hybrid parameters of a general-purpose 2N3904 NPN JT Minimum Maximum Average* r π = h ie (kω) h re β h fe h oe (µs) r o = 1/h oe (kω) 25 1, r e = h ie /h fe (Ω) * Geometric mean. As h re is small, it is usually ignored in analytical calculations as it makes analysis much simpler. This model, called the hybrid-π model, is most often used in analyzing JT circuits. In order to distinguish this model from the hybrid model, most electronic text books use a different notation for various elements of the hybrid-π model: r π = h ie r o = 1 h oe β = h fe h ie h fe 1/h oe = r π β i r o The above hybrid-π model includes a current-controlled current source. This implies that JT behavior is controlled by i. In reality, v controls the JT behavior. A variant of the hybrid-π model can be developed which includes a voltage-controlled current source. This can be achieved by noting it the above model that = h ie and h fe = h fe h ie g m h fe h ie r e 1 g m = h ie h fe = g m Transfer conductance mitter resistance r π g m r o 65 Lecture Notes (F. Najmabadi), Winter

17 FT Small Signal Model and A amplifiers Similar to JT, the simple large-signal model of FT (page 94) is sufficient for finding the bias point; but we need to develop a more accurate model for analysis of A signals. The main issue is that the FT large signal model indicates that i D only depends on v GS and is independent of v DS in the active region. In reality, i D increases slightly with v DS in the active region. We can develop a small signal model for FT in a manner similar to the procedure described in detail for the JT. The FT characteristics equations specify two of the FT parameters, i G and i D, in terms of the other two, v GS and v DS. (Actually FT is simpler than JT as i G = 0 at all times.) As before, we write the FT parameters as a sum of D bias value and a small A signal, e.g., i D = I D D. Performing a Taylor series expansion, similar to pages 118 and 119, we get: i G (V GS GS, V DS DS ) = 0 v GS i D (V GS GS, V DS DS ) = i D (V GS, V DS ) i D v DS Q GS i D Q DS Since i G (V GS GS, V DS DS ) = I G G and i D (V GS GS, V DS DS ) = I D D, we find the A components to be: Defining v GS G = 0 and D = i D v DS Q GS i D Q DS We get: g m i D v GS and r o i D v DS G = 0 and D = g m GS r o DS This results in the hybrid-π model for the FT as is shown. Note that the FT hybrid-π model is similar to the JT hybrid-π model with r π. G = 0 G GS g m GS D r o D S 65 Lecture Notes (F. Najmabadi), Winter

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