Lecture 060 Push-Pull Output Stages (1/11/04) Page ECE Analog Integrated Circuits and Systems II P.E. Allen

Transcription

1 Lecture 060 PushPull Output Stages (1/11/04) Page 0601 LECTURE 060 PUSHPULL OUTPUT STAGES (READING: GHLM , AH ) Objective The objective of this presentation is: Show how to design stages that 1.) Provide sufficient output power in the form of voltage or current. 2.) Avoid signal distortion. 3.) Be efficient 4.) Provide protection from abnormal conditions (short circuit, over temperature, etc.) Outline PushPull MOS (Class B) PushPull BJT (Class B) Summary Lecture 060 PushPull Output Stages (1/11/04) Page 0602 PUSHPULL MOS OUTPUT STAGES (Class AB and B) PushPull Source Follower V Can both sink and source DD M6 current and provide a slightly V GG M5 lower output resistance. V Bias V Bias Efficiency: M3 Depends on how the transistors are biased. Class B one transistor has current flow for only 180 of the sinusoid (half period) (peak) 2 Efficiency = P RL 2 π P VDD = 1 2v ( ) OUT = (peak) (peak) 2 V DD 2 π Maximum efficiency occurs when (peak) = and is 78.5% Class AB each transistor has current flow for more than 180 of the sinusoid. Maximum efficiency is between 25% and 78.5% M4 Fig

2 Lecture 060 PushPull Output Stages (1/11/04) Page 0603 Illustration of Class B and Class AB PushPull, Source Follower Output current and voltage characteristics of the pushpull, source follower ( = 1kΩ): 2V 1V v G1 i D1 1mA 2V 1V v G1 id1 1mA 0V 0mA 0V 0mA 1V 2V v G V in (V) Class B, pushpull, source follower 1mA Comments: Note that cannot reach the extreme values of and 1V 2V v G2 1mA V in (V) Class AB, pushpull, source follower Fig I OUT (max) and I OUT (max) is always less than / or / For = 0V, there is quiescent current flowing in and for Class AB Note that there is significant distortion at =0V for the Class B pushpull follower Lecture 060 PushPull Output Stages (1/11/04) Page 0604 SmallSignal Performance of the PushPull Follower Model: v gs1 C 1 v in rds1 r ds2 g m1 v gs1 g mbs1 v bs1 g m2 v gs2 g mbs2 v bs2 C 2 vout v gs1 C 1 v in 1 g g m1 v in r g m1 v g mbs1 v m2 out out ds1 g m2 v in g m2 g mbs2 rds2 Fig g m1 g m2 v = in g ds1 g ds2 g m1 g mbs1 g m2 g mbs2 G L 1 R out = g ds1 g ds2 g m1 g mbs1 g m2 g mbs2 (does not include ) If = = 2.5V, V out = 0V, I D1 = I D2 = 500µA, and W/L = 20µm/2µm, A v = ( = ) and R out = 448Ω. A zero and pole are located at z = (g m1g m2 ) C 1 p = (g ds1g ds2 g m1 g mbs1 g m2 g mbs2 G L ) C 1 C 2. These roots will be highfrequency because the associated resistances are small. C 2 vout

3 Lecture 060 PushPull Output Stages (1/11/04) Page 0605 PushPull, Common Source Amplifiers Similar to the class A but can operate as class B providing higher efficiency. V TR2 V TR1 Fig Comments: The batteries V TR1 and V TR2 are necessary to control the bias current in and. The efficiency is the same as the pushpull, source follower. Lecture 060 PushPull Output Stages (1/11/04) Page 0606 Practical Implementation of the PushPull, Common Source Amplifier Method 1 M5 M6 M3 V GG3 M4 V GG4 M7 M8 Fig V GG3 and V GG4 can be used to bias this amplifier in class AB or class B operation. Note, that the bias current in M6 and M8 is not dependent upon or (assuming V GG3 and V GG4 are not dependent on and ).

4 Lecture 060 PushPull Output Stages (1/11/04) Page 0607 Practical Implementation of the PushPull, Common Source Amplifier Method 2 M7 M5 I=2I b I b v in v in M8 I b M3 M4 M6 I=2I b M9 0 Fig In steadystate, the current through M5 and M6 is 2I b. If W 4 /L 4 = W 9 /L 9 and W 3 /L 3 = W 8 /L 8, then the currents in and can be determined by the following relationship: W 1 /L 1 W 2 /L 2 I 1 = I 2 = I b W 7 /L 7 = I b W 10 /L 10 If v in goes low, M5 pulls the gates of and high. M4 shuts off causing all of the current flowing through M5 (2I b ) to flow through M3 shutting off. The gate of is high allowing the buffer to strongly sink current. If v in goes high, M6 pulls the gates of and low. As before, this shuts off and turns on allowing strong sourcing. Lecture 060 PushPull Output Stages (1/11/04) Page 0608 Illustration of Class B and Class AB PushPull, Inverting Amplifier Output current and voltage characteristics of the pushpull, inverting amplifier ( = 1kΩ): 2V 1V 0V i D1 v G2 i D1 v G1 2mA 1mA 0mA 2V 1V 0V i D1 v G2 i D1 v G1 2mA 1mA 0mA 1V 1mA 1V 1mA 2V 2mA 2V 2mA 2V 1V 0V 1V 2V Class B, pushpull, inverting amplifier. 2V 1V 0V 1V 2V Class AB, pushpull, inverting amplifier. Fig Comments: Note that there is significant distortion at =0V for the Class B inverter Note that cannot reach the extreme values of and I OUT (max) and I OUT (max) is always less than / or / For = 0V, there is quiescent current flowing in and for Class AB

5 Lecture 060 PushPull Output Stages (1/11/04) Page 0609 Use of Negative, Shunt Feedback to Reduce the Output Resistance Concept: Error Amplifier Error Amplifier Fig r ds1 r ds2 R out = 1Loop Gain Comments: Can achieve output resistances as low as 10Ω. If the error amplifiers are not balanced, it is difficult to control the quiescent current in and Great linearity because of the strong feedback Can be efficient if operated in class B or class AB Lecture 060 PushPull Output Stages (1/11/04) Page Simple Implementation of Neg., Shunt Feedback to Reduce the Output Resistance R 1 R 2 R 1 Loop gain R 1 R 2 g m1 g m2 g ds1 g ds2 G L Fig r ds1 r ds2 R out = 1 R 1 R 1 R g m1 g m2 2 g ds1 g ds2 G L Let R 1 = R 2, =, I Bias = 500µA, W 1 /L 1 = 100µm/1µm and W 2 /L 2 = 200µm/1µm. Thus, g m1 = 3.316mS, g m2 = 3.162mS, r ds1 = 50kΩ and r ds2 = 40kΩ. 50kΩ 40kΩ 22.22kΩ R out = = 10.5(143.9) = 304Ω (R out = 5.42kΩ if = 1kΩ) 2520

6 Lecture 060 PushPull Output Stages (1/11/04) Page What about the use of BJTs in CMOS Technology? M3 i B pwell CMOS M3 i B VSS nwell CMOS Fig Comments: Can use either substrate or lateral BJTs. Smallsignal output resistance is 1/g m which can easily be less than 100Ω. Unfortunately, only PNP or NPN BJTs are available but not both on a standard CMOS technology. In order for the BJT to sink (or source) large currents, the base current, i B, must be large. Providing large currents as the voltage gets to extreme values is difficult for MOSFET circuits to accomplish. If one considers the MOSFET driver, the emitter can only pull to within v BE V ON of the power supply rails. This value can be 1V or more. Lecture 060 PushPull Output Stages (1/11/04) Page PUSHPULL BJT OUTPUT STAGES (Class AB and B) Simple Class B Output Stage vout V BE1 V BE (on) V BE (on) V EE V BE2 V CE1 (sat) Slope 1 on off Saturates V BE1 V CE1 (sat) V EE Saturates Slope 1 off on V EE V BE2 Fig Class B operation: Two active devices are used to deliver the power instead of one. Each device conducts for alternate half cycles. Efficiency can approach 78.5% Can suffer from crossover distortion the transition from one device to the other.

7 Lecture 060 PushPull Output Stages (1/11/04) Page Class AB Output Stage V BE1 Saturates I Q Q3 Q4 Slope 1 V BE (on) V EE Saturates V EE V EB2 Fig I Q sets up the bias current in and when there is no input signal. Each transistor is biased so that there is a region in the middle where both are on (Class AB) Lecture 060 PushPull Output Stages (1/11/04) Page Power Considerations in the Class B Output Stage Voltage and current waveforms for a Class B amplifier: v in I Q Q3 Q4 v in i c1 R i L c2 V EE i c1 T T 2T V out (peak) 2T I c1 (peak) t t i c2 T T 2T 2T t t I c2 (peak) Fig

8 Lecture 060 PushPull Output Stages (1/11/04) Page Efficiency Considerations of the ClassB PushPull Output Stage Load line for one device in a classb stage: Efficiency: i C1 Load Line Peak device dissipation Constant Power Curve V CE1 (sat) Load Line Quiescent Point VCC 2 V CE1 (sat) v CE1 Fig P L = 1 [V out(peak)]2 2 1T and P supply = 2 I supply = 2 T i C (t)dt = 2V I c (peak) CC π = 2 π R 0 L V out (peak) P L η = P = π V out(peak) supply 4 V η CC max = π 4 = 78.6% Max. efficiency for the above classb pushpull output stage is η max = π V CE (sat) 4 Lecture 060 PushPull Output Stages (1/11/04) Page Output Stage 4 10 = 10kΩ 1 I Q 3 Q3 2 vout = 1kΩ Fig V EE Output Stage Voltage Transfer Function.MODEL BJTN NPN IS=1E14 BF=100 VAF=50.MODEL BJTP PNP IS=1E14 BF=50 VAF= BJTN BJTP Q BJTN VCC 4 0 DC 10V VEE 5 0 DC 10V VIN 1 5 RL 2 0 1KILOHM R KILOHM.DC VIN PRINT DC V(2).PROBE.END This stage assumes that feedback will be used around the amplifier which will linearize the nonlinearity of the output stage.

9 Lecture 060 PushPull Output Stages (1/11/04) Page Output Stage 3C 3B 6 7 3A mA 9 Fig R 10 = 40kΩ V EE Output Stage Voltage Transfer Function RL = 1Kilohm.MODEL BJTN NPN IS=1E14 BF=100 VAF=50.MODEL BJTP PNP IS=1E14 BF=50 VAF= BJTP BJTP BJTN BJTN BJTN BJTN 3A BJTP 3B BJTP vout C BJTP VCC 7 0 DC 15V VEE 8 0 DC 15V IBIAS UA VIN 9 8 DC R KILOHM RL 2 0 1KILOHM.DC VIN PRINT DC V(2).PROBE.END Lecture 060 PushPull Output Stages (1/11/04) Page QuasiComplementary Output Stages Quasicomplementary connections are used to improve the performance of the PNP or PMOS transistor. Composite connections: B V EB I C1 E C I E I C B E V EB PNP Equivalent: I C = (1β 2 ) I C1 = (1β 2 ) I s exp V EB V t The composite has the beta of an NPN C I E I C G V SG I D1 S D I D G S V SG D Fig PMOS Equivalent: I D = (1β 2 ) I D1 = (1β 2 ) K P W 1 2L (V 1 GS V T ) 2 The composite has an enhanced K I D

10 Lecture 060 PushPull Output Stages (1/11/04) Page Overload Protection For circuits that can provide large amounts of output current, it is necessary to provide shortcircuit current protection. Example: i i i C2 i B1 i C1 I Lim im = 0 im 0 im Fig ShortCircuit 0 0 i i = i C1 i C2 i C1 = β 1 i B1 = β 1 (i i i C2 ) v BE2 i C1 im But i C2 I s2 exp V t I s2 exp V t i C1 im = β 1 i i I s2 exp V t As increases, turns on and pulls base current away from limiting the output current. Lecture 060 PushPull Output Stages (1/11/04) Page SUMMARY Requirements of Output Stages The objectives are to provide output power in form of voltage and/or current. In addition, the output amplifier should be linear and be efficient. Low output resistance is required to provide power efficiently to a small load resistance. High source/sink currents are required to provide sufficient output voltage rate due to large load capacitances. Types of output stages considered: Class B or AB stage with pushpull (maximum efficiency was 78.6%) Quasicomplementary devices help improve the performance of the ptype devices Protection circuits prevent large currents from flowing in the output devices For large load capacitors all that is required from an output stage is large current, the output resistance does not have to be small