數 位 積 體 電 路 Digital Integrated Circuits

Transcription

1 IEE Spring 2012 數 位 積 體 電 路 Digital Integrated Circuits Course Overview Professor Wei Hwang 黃 威 教 授 Department of Electronics Engineering National Chiao Tung University [email protected] Wei Hwang, NCTU 1 March 2012

2 Course Orientation Course Background Course Focus and Goals Course Contents Course Reference Materials Course Requirements Administrative Issues Wei Hwang, NCTU 2 March 2012

3 Course Goals Aims to learn Energy-Efficient Digital VLSI Integrated Circuits design techniques in nano-scaled CMOS technology. Special attention will devoted to the challenges facing digital circuit designers today and in the near future, particularly, the impacts of technology view: device leakage, process variability, long term reliability, and circuit design view: high performance, power dissipation constraints, SRAM stability, device variability/model accuracy and timing. Emphasis is on the circuit design, and optimization of either low power or high performance circuits for using in applications such as microprocessors, digital signal and multimedia processors, mobile communications, and memory systems. Gain basic understanding of low power system design and technology/circuit/architecture co-design techniques Become familiar with advanced IC/SoC/SiP industry and research trends Wei Hwang, NCTU 3 March 2012

4 Undergraduate Course vs Graduate Course Undergraduate DIC Course Basic transistor and circuit models Basic circuit and logic styles First experiences with design creating a solution given a number of specs Graduate DIC Course Transistor models of varying accuracy Design under constraints: power, performance, area, reliability, variability, cost Learning the more advanced design techniques Study the challenges facing design in the near future (deep nano-scale CMOS, SoC, SiP and 3D IC) Creating new solutions to challenging design problems Wei Hwang, NCTU 4 March 2012

5 Course Materials Class Lecture Notes on web-site ( Required Text Books [1] J. Rabaey et al, Digital Integrated Circuits, Prentice Hall [2] N. Weste and D. Harris, CMOS VLSI Design, 4th Edition, Addison Wesley, 2011 Reference Text Books [3] J. Rabaey, Low Power Design Essential, Springer 2009, [4] Keating and Flynn, Low Power Methodology Manual, Springer, 2007 [5] C. Piquet, low-power CMOS circuits, CRC press, [6] Wang/Calhoun/Chandrakasan, Sub-threshold Design for Ultra Low-Power Systems, Spring, 2006 [7] Narendar, Leakage in Nanometer CMOS Technologies, Springer, 2006 Other Reference Materials [8]. Related IEEE Journal and Major Conference Papers Wei Hwang, NCTU 5 March 2012

6 What will you learn? Course goals To provide a fundamental understanding of energy-efficient digital circuits and to learn how to design and implement integrated circuits and systems in nano-scale CMOS technology Topic include : CMOS nanometer transistor and their models, Circuit Characterization and performance estimation, High performance and Low Power VLSI Design, Timing and Optimizing Power design and Memory Design Course prerequisites Electronics I and II Introduction to VLSI circuits Logic Design of Digital Systems Wei Hwang, NCTU 6 March 2012

7 Topics covered in a typical DIC Course Source from : Sung-Mo Kang Yusuf Leblebici Wei Hwang, NCTU 7 March 2012

8 CMOS digital circuit types Source from : Sung-Mo Kang Yusuf Leblebici Wei Hwang, NCTU 8 March 2012

9 Wei Hwang, NCTU 9 March 2012

10 Wei Hwang, NCTU 10 March 2012

11 Wei Hwang, NCTU 11 March 2012

12 Wei Hwang, NCTU 12 March 2012

13 Special Focus in this Semester High performance and low power VLSI digital IC technology/ circuit /architecture co-design techniques Device leakage currents and Process Variations Robust Design and long term reliability Performance and Optimizing Power Timing and Signaling Strategies Low Power microprocessor /DSP cores Ultra Low-Voltage circuit for Energy Efficiency Chip Design Sub-threshold and Near-threshold logic and memory ULV DSP and Baseband ULV Biomedical Signal Processing Wei Hwang, NCTU 13 March 2012

14 Detailed Topics Nano-Scale CMOS devices and manufacturing technology Transistor Modeling Scaling and Its Limits Propagation delay, noise margins, power Combinational and sequential circuits Data path Arithmetic (Adder and Multiplier) building blocks Control Path FSM Memory Array (SRAM) design Energy-efficient digital design Low Power circuit techniques Ultra-Low Voltage (ULV) logic family Timing and Variability aware VLSI Design Design Methodologies Wei Hwang, NCTU 14 March 2012

15 The flow of circuit design procedures Source from : Sung-Mo Kang Yusuf Leblebici Wei Hwang, NCTU 15 March 2012

16 VLSI design flow in three domains Source from : Sung-Mo Kang Yusuf Leblebici Wei Hwang, NCTU 16 March 2012

17 VLSI design flow - A more simplified view Source from : Sung-Mo Kang Yusuf Leblebici Wei Hwang, NCTU 17 March 2012

18 Design Simulation Tools Cadence Widely used in industry Online tutorials and documentation Circuit implementation tools Verilog, HSPICE Performance and Power Estimation tools PrimePower,PrimeTime NanoSim Synthesis tool DesiginVersion Technology UMC 90 nm CMOS Technology Wei Hwang, NCTU 18 March 2012

19 Grading Policy 1 term-long DIC Design Projects Phase 1: Proposal (by week 3) Phase 2: Study and survey (presentation by week 7) Phase 3: Design results (presentation and report by final week) Project Presentations & Reports (IEEE format) last week of classes 5 (+/-) Home Problem Sets 20% Midterm Exam. (Phase 2) 30% Final Examination (Phase 3) 50% % Wei Hwang, NCTU 19 March 2012