State Machines: Brief Introduction to Sequencers Prof. Andrew J. Mason, Michigan State University

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1 Inroducion ae Machines: Brief Inroducion o equencers Prof. Andrew J. Mason, Michigan ae Universiy A sae machine models behavior defined by a finie number of saes (unique configuraions), ransiions beween hose saes, and acions (oupus) wihin each sae. A finie sae machine refers o a machine wih only a relaively small number of saes, hough his erm is ofen runcaed o simply sae machine. The curren sae is a funcion of pas saes, and hus he sae machine mus have memory of is pas. A sae machine can be represened by a sae diagram and/or sae ransiion ables. A couner is a ype of sae machine. I consanly increases is oupu value as i sequences hrough saes unil i reaches is final value and reurns o is iniial value. We will now consider a ype of sae machine referred o as a sequencer, one ha cycles hrough a sequence of saes in a predefined order. Consider he sae diagram in Figure. I cycles hrough four saes in a specific sequence. The saes are number -4 in binary noaion such ha he sequence is. sar Fig. : ae diagram for a simple 2-bi sae sequencer. Number of flip flops To implemen sae machines in digial hardware, flip flops are ofen used because hey exhibi he necessary memory capabiliies. They would be combined wih so-called glue logic ha deermines he proper inpu values in order for he specified sae sequence o be realized. The number of flip flops needed o implemen a sae machine is a funcion of he number of saes in he sae machine. ince a single flip flop has one digial oupu, i can represen wo discree saes, namely and. Two flip flops working ogeher provide an oupu pair (2 signals) ha can implemen four saes,,,, and. In general, n flip flops can represen 2 n saes, much in he same way as an n-bi number can represen 2 n values. Thus, he number of binary bis needed o represen all of he saes will equal he number of flip flops needed o implemen he sae machine. Example : How many flip flops are needed o implemen a sae machine wih 2 saes Answer: 3 flip flops can implemen 2 3 =8 saes and 4 can implemen 2 4 =6. ince 8 saes are oo few, 4 flip flops would be needed o cover 2 saes. Noe his would provide 4 unused saes ha mus be aken care of as described laer. Implemening Glue Logic Knowing how many flip flops are needed is he saring poin, bu how can we force he flip flops o produce he correc oupu o implemen he desired sae sequence The answer lies in he glue logic, he circuiry ha will se he flip flop inpus o he proper values a each sae o

2 ensure ha hey will generae he desired nex-sae oupus afer a clock ransiion. Indenifying he glue logic funcionaliy requires developing sae ransiion ables. Nex-sae able A nex-sae able is simply a map of curren sae, a ime, o he desired nex sae, a ime +. Because he saes are deermined by flip flop oupus, a wo-bi sae can be defined by (, ), where and are he oupus of wo flip flops. The nex-sae able for he sae diagram in Fig. is shown in Fig. 2. This able is similar o a logic ruh able, bu here he nexsae oupus will only occur a a fuure ime (nex clock cycle). curren sae nex sae + + Fig. 2. Nex-sae able for he 2-bi sequencer in Fig.. Nex-sae exciaion able Now ha we have a able of he desired nex-sae oupus, we need o deermine wha he flip flops inpus mus be o excie he proper flip flop oupu ransiions. We ll call his mapping a nex-sae exciaion able. For a flip flop, an exciaion able idenifies he inpu values needed o generae all possible ransiions. ince a flip flop has wo possible oupu saes (, ), here are four possible ransiions (,, ec.) Clearly, a able of which inpu exciaions would generae each oupu ransiion will be a direc funcion of he ype of flip flop used; an FF would no have he same exciaion ables as a JKFF, ec. Le s firs look a flip flop exciaion ables and hen expand hem o nex-sae exciaion ables for a given sae machine sequence. Fig. 3 shows he ruh and exciaion ables for an FF. Fig. 4 shows he ruh able and exciaion able for a JKFF. ruh able exciaion able + acion + acion hold hold () X rese () rese se () se rese () - n/a hold () se () X Fig. 3. Truh able and exciaion able for an flip flop. X = don care. ruh able exciaion able J K + acion + acion J K hold hold () rese () X rese se () oggle () X se rese () oggle () X oggle hold () se () Fig. 4. Truh able and exciaion able for a JK flip flop. X ae Machines: Brief Inroducion o equencers A. Mason, Mich.. Univ., 29 p. 2

3 Exercise : Using only he ruh able, complee he JKFF exciaion able showing wha values J and K mus be in order o generae each of he oupu ransiions. We are now in a posiion o combine he sae machine s nex-sae able wih he flip flop s exciaion able o form he desired sae machine nex-sae exciaion able. This is fairly sraighforward so we ll illusrae he process wih an example. Fig. 5 shows he nex-sae exciaion able for he sae sequence defined by he sae diagram in Fig. and he nex-sae able in Fig. 2 when flip flops are used. Noice here are wo oupu bis, and, so wo inpu - pairs mus be defined in he able, one for each flip flop. curren sae nex sae bi inpus bi inpus + + X X X X Fig. 5. Nex-sae exciaion able for Fig. sae machine implemened wih flip flops. The firs four columns of Fig. 5 are simply a copy of he nex-sae able in Fig. 2 repeaed for convenience. The ask of filling in all of he and cells requires mapping specific ransiions from Table 3 ino each and cell. For example, he op row of cells sees a = + = ransiion for bi and a = + = ransiion for bi. Thus, and are filled in by looking a he ransiion. Fig 3 shows ha, for, should be a and should be X (don care). imilarly, and are filled in by looking a he ransiion, where Fig 3 shows ha should be a and should be. Compleion of he second and hird rows for Fig. 5 is described by Examples 2 and 3 below. The final row is compleed wihou descripion, and verificaion of his row is lef as an exercise. Compleion of he nex-sae exciaion able when a JKFF is used insead of an FF is lef as an exercise. Example 2: Wha values for and are needed o complee he second row of he nex-sae exciaion able in Fig. 5 Answer: The second row of cells sees = + =, hus ransiion for bi = + =, hus ransiion for bi. and are filled in by looking a he ransiion, where Fig 3 shows ha should be a and should be. and are filled in by looking a he ransiion, where Fig 3 shows ha should be X and should be. These resuls are included in Fig. 5. Example 3: Wha values for and are needed o complee he hird row of he nex-sae exciaion able in Fig. 5 Answer: The hird row of cells sees Bi : = + =. Thus = and =. Bi : = + =. Thus = and = X. These resuls are included in Fig. 5. Exercise 2: Following examples 2 and 3, verify ha row 4 of he able in Fig. 5 is correc. ae Machines: Brief Inroducion o equencers A. Mason, Mich.. Univ., 29 p. 3

4 Exercise 3: Consruc a nex-sae exciaion able like Fig. 5 when a JKFF is used raher han an FF. Inpu logic The nex-sae exciaion able provides all of he informaion necessary o implemen he logic for he inpus of each flip flop used o creae he sae machine. For example, Fig. 5 shows wha all and inpus would be needed o implemen he sae machine from Fig. using flip flops. These inpus are deermined enirely by he curren sae flip flop oupus, namely and for our example 2-bi sequencer sae machine. The inpus mus be deermined by he curren-sae oupu values so ha he inpus are se before he nex clock ransiion, when he flip flop oupus will change o heir nex-sae values. To more clearly illusrae he logic needed o se each of he and inpus, Fig. 6 shows he ruh able for each of he inpus based on he curren sae oupu values. This informaion is already available in Fig. 5 bu simply reformaed in Fig. 6 o highligh he necessary inpu logic. X X X X Fig. 6. Inpu ruh ables for he nex-sae exciaion able in Fig. 5. Wih he informaion in Fig. 6, we could direcly generae he following logic expressions for he inpus: =, =, =, = However, i is beer (less complex circuiry) o reduce he ruh able and deermine he minimized logic expression for each inpu. This is easily accomplished using Karnaugh maps. The k-maps for each inpu are shown in Fig. 7. From hese k-maps we can deermine he following minimized logic expression for each inpu as a funcion of only flip flop oupus: =, =, =, = X X X X Fig. 6. Inpu signal Karnaugh maps for he Fig. sae machine using flip flops. Ineresingly, he inpus o FF are boh deermined by oupus from FF, and visa versa. This is purely a consequence of he specific sae sequence chosen for his example. Oher sae sequences would generae differen minimized inpu funcions. Implemenaion of ae Machine using Flip Flops The final sep o implemening a sae machine involves realizing he inpu glue logic in digial gaes and connecing his circuiry o he flip flops ha from he core sae machine. For simple sae machines such as sequencers, he core circui mainains a regular srucure ha can be exended o any number of saes (oupu bis). Fig. 7 shows he core srucure of a 2-bi ae Machines: Brief Inroducion o equencers A. Mason, Mich.. Univ., 29 p. 4

5 sequencer sae machine implemened wih flip flops. The oupus are and. The exernal clock inpu goes o all flip flops simulaneously. There are no oher exernal inpus in his simple example, alhough in general exernal inpus could be used o se flip flop inpus (his would require incorporaing hose exernal inpus ino he nex-sae exciaion ables and complicae design beyond he scope of his inroducion). In our simple example, he flip flop and inpus are deermined by logical manipulaions of inernal signals, as represened by he boxes in he schemaic. When we subsiue he non-minimized and logic expressions (shown above) derived from he Fig. 6 ruh ables, our example sae machine of Fig. is realized by he schemaic shown in Fig. 8, where only he oupu is used (no ). If, insead, we use he minimized logic expressions and use boh and oupus, he circui reduces o ha shown in Fig. 9. Noice ha no glue logic is acually needed for his sae sequence. The circui could be readily expanded o include an asynchronous rese funcion using flip flops wih rese inpus. A similar schemaic for his 2-bi example sequencer can be realized using JK flip flops, alhough he glue logic (or connecions) would be differen because he JKFF exciaion able is differen han he FF. The JKFF implemenaion is lef as an exercise for he reader. FF FF Fig. 7. Core srucure of a 2-bi FF sae machine. FF FF Fig. 8. Overly complex FF circui implemenaion of he sae machine defined by Fig.. FF FF Fig. 9. Minimized FF circui implemenaion of he sae machine defined by Fig.. Exercise 4: edraw he Fig. 9 schemaic using flip flops wih rese inpus o implemen an asynchronous rese funcion. Exercise 5: Using resuls from Exercise 3, deermine he glue logic needed for a JKFF implemenaion of he Fig. 2-bi sequencer and consruc he schemaic o realize his circui. ae Machines: Brief Inroducion o equencers A. Mason, Mich.. Univ., 29 p. 5