PERFORMANCE SPECIFICATION SHEET
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- Basil McGee
- 10 years ago
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1 The documentation and process conversion measures necessary to comply with this document shall be completed by 13 February INCH-POUND MIL-PRF-19500/538G 13 December 2013 SUPERSEDING MIL-PRF-19500/538F 10 February 2011 PERFORMANCE SPECIFICATION SHEET SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, POWER, TYPES 2N6676, 2N6678, 2N6676T1, 2N6678T1, 2N6676T3, 2N6678T3, 2N6691, AND 2N6693, JAN, JANTX, JANTXV, JANS, JANSM, JANSD, JANSP, JANSL, JANSR, JANSF, JANSG, JANSH, JANHCA, JANKCA, JANKCAM, JANKCAD, JANKCAP, JANKCAL, JANKCAR, JANKCAF, JANKCAG, AND JANKCAH 1. SCOPE This specification is approved for use by all Departments and Agencies of the Department of Defense. The requirements for acquiring the product described herein shall consist of this specification sheet and MIL-PRF Scope. This specification covers the performance requirements for NPN silicon, power transistors. Four levels of product assurance are provided for each device type as specified in MIL-PRF Two levels of product assurance are provided for each unencapsulated device type. Provisions for radiation hardness assurance (RHA) to eight radiation levels is provided for JANS and JANKC product assurance levels. RHA level designators M, D, P, L, R, F, G, and H are appended to the device prefix to identify devices, which have passed RHA requirements. 1.2 Physical dimensions. See figure 1 (TO-3) - 2N6676, 2N6678; figure 2 (TO-61) - 2N6691, 2N6693, figure 3 (TO-254AA) - 2N6676T1, 2N6678T1, figure 4 (TO-257AA) - 2N6676T3, 2N6678T3, and figure 5 (JANHC and JANKC). 1.3 Maximum ratings. Types P T T A = +25 C P T (1) T C = +25 C R θjc (2) V CBO and V CEX V CEO T J and T STG V EBO I B I C W W C/W V dc V dc C V dc A dc A dc 2N6676, 2N6676T to N6678, 2N6678T to N6676T3 4 (3) to N6678T3 4 (3) to N to N to (1) See figures 6 and 7 for temperature-power derating curves. (2) See figures 8 through 11, thermal impedance curves. (3) For TO-257 devices with typical mounting and small footprint, conservatively rated at 125 W and 1.3 C/W only. * Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime, ATTN: VAC, P.O. Box 3990, Columbus, OH , or ed to [email protected]. Since contact information can change, you may want to verify the currency of this address information using the ASSIST Online database at AMSC N/A FSC 5961
2 1.4 Primary electrical characteristics at T C = +25 C. hfe1 hfe2 VBE(sat) VCE(sat) Limits VCE = 3 V dc IC = 1 A dc (1) VCE = 3 V dc IC = 15 A dc (1) IC = 15 A dc IB = 3 A dc IC = 15 A dc IB = 3 A dc Min Max V dc V dc hfe Cobo Switching (2) Limits VCE = 10 V dc IC = 1 A dc f = 5 MHz VCB = 10 V dc IE = KHz < f < 1 MHz tc td tr ts tf Min Max 3 10 pf µs µs µs µs µs (1) Pulsed (see 4.5.1). (2) See figure 12 (pulse response circuits). 2. APPLICABLE DOCUMENTS 2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This section does not include documents cited in other sections of this specification or recommended for additional information or as examples. While every effort has been made to ensure the completeness of this list, document users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this specification, whether or not they are listed. 2.2 Government documents Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIONS MIL-PRF Semiconductor Devices, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD Test Methods for Semiconductor Devices. * (Copies of these documents are available online at or or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA ) * 2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the text of this document and the references cited herein, the text of this document takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 2
3 Dimensions Ltr Notes Inches Millimeters Min Max Min Max CD TO-3 CH HR HR HT L , 9 LD , 9 LL MHD MHS PS PS , 5 S NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. Body contour is optional within zone defined by CD 4. These dimensions shall be measured at points.050 inch (1.27 mm) to.055 inch (1.40 mm) below seating plane. Measurement shall be made at seating plane. 5. Both terminals. 6. At both ends. 7. Two holes. 8. Terminal 1 is the emitter, terminal 2 is base. The collector shall be electrically connected to the case. 9. LD applies between L 1 and LL. Diameter is uncontrolled in L In accordance with ASME Y14.5M, diameters are equivalent to φx symbology. FIGURE 1. Physical dimensions (TO-3) for 2N6676 and 2N
4 Dimension Ltr Inches Millimeters Notes Min Max Min Max A CD CD CH HF HT TO-61 OAH PS , 6 PS , 6 SL SU T T UD NOTES: 1. Dimensions are in inches, millimeters are given for general information only. 2. See NSB Handbook H28, Screw-Thread Standards for Federal Services. 3. The orientation of the terminals in relation to the hex flats is not controlled. 4. All three terminals. 5. The case temperature may be measured anywhere on the seating plane within.125 inch (3.18 mm) of the stud. 6. Terminal spacing measured at the base seat only. 7. This dimension applies to the location of the center line of the terminals. 8. Terminal - 1, emitter; terminal - 2, base; terminal - 3, collector. All leads are isolated from the case. 9. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology. FIGURE 2. Physical dimensions (TO-61) for 2N6691 and 2N
5 Ltr Inches Dimensions Millimeters Min Max Min Max BL CH LD TO-254 LL LO.150 BSC 3.81 BSC LS.150 BSC 3.81 BSC MHD MHO TL TT TW Term 1 Term 2 Base Collector Term 3 Emitter NOTES: 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. Methods used for electrical isolation of the terminals feedthroughs shall employ materials that contain a minimum of 90 percent AL2O3 (ceramic). 4. All terminals are isolated from case. 5. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology. FIGURE 3. Dimensions and configuration for 2N6676T1 and 2N6678T1 (TO-254AA). 5
6 Ltr Inches Dimensions Millimeters Min Max Min Max BL CH TO-257 LD LL LO.120 BSC 3.05 BSC LS.100 BSC 2.54 BSC MHD MHO TL TT TW Term 1 Term 2 Base Collector NOTES: Term 3 Emitter 1. Dimensions are in inches. 2. Millimeters are given for general information only. 3. Methods used for electrical isolation of the terminals feedthroughs shall employ materials that contain a minimum of 90 percent AL2O3 (ceramic). 4. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology. FIGURE 4. Dimensions and configuration for 2N6676T3 and 2N6678T3 (TO-257AA). 6
7 Dimensions Ltr. Inch Millimeters Min Max Min Max A, C DESIGN DATA Metalization: Top: Aluminum 54,000 Å minimum, 60,000 Å nominal. Back: Al/Ti/Ni/Au 10,000 Å minimum, 12,500 Å nominal. Back side: Collector. Chip thickness:.012 inch (0.305 mm) ±.002 inch (0.051 mm). Bonding pad: B =.018 inch (0.46 mm) x.040 (1.02 mm). E =.018 inch (0.46 mm) x.040 (1.02 mm). * FIGURE 5. JANHCA and JANKCA (A version) die dimensions. 7
8 3. REQUIREMENTS 3.1 General. The individual item requirements shall be as specified in MIL-PRF and as modified herein. 3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML) before contract award (see 4.2 and 6.3). 3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as specified in MIL-PRF and as follows: V CEX - R ISO - Collector cutoff voltage (dc) with specified circuit between base and emitter. Resistance between device case and leads 3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in MIL-PRF and figure 1 (TO-3) - 2N6676, 2N6678; figure 2 (TO-61) - 2N6691, 2N6693; figure 3 (TO-254AA) - 2N6678T1, 2N6676T1, and figure 4 (TO-257AA) - 2N6676T3 and 2N6678T3 herein, and figure Lead finish. Lead finish shall be solderable in accordance with MIL-PRF Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2) Construction. These devices shall be constructed in a manner and using materials which enable the devices to meet the applicable requirements of MIL-PRF and this document. 3.5 Radiation hardness assurance (RHA). Radiation hardness assurance requirements, PIN designators, and test levels shall be as defined in MIL-PRF Marking. Marking shall be in accordance with MIL-PRF The radiation hardened designator M, D, P, L, R, F, G, or H shall immediately precede (or replace) the device 2N identifier (depending upon degree of abbreviation required). 3.7 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.8 Electrical test requirements. The electrical test requirements shall be as specified in table I. 3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and shall be free from other defects that will affect life, serviceability, or appearance. 4. VERIFICATION 4.1 Classification of inspections. The inspection requirements specified herein are classified as follows: a. Qualification inspection (see 4.2). b. Screening (see 4.3). c. Conformance inspection (see 4.4 and table I, II, and III). 8
9 4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500, and as specified herein JANHC and JANKC qualification. JANHC and JANKC qualification inspection shall be in accordance with MIL-PRF Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In case qualification was awarded to a prior revision of the specification sheet that did not request the performance of table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on the first inspection lot of this revision to maintain qualification. * 4.3 Screening. Screening shall be in accordance with table E-IV of MIL-PRF-19500, and as specified herein. The following measurements shall be made in accordance with table I herein. Devices that exceed the limits of table I herein shall not be acceptable. Screen (see table E-IV Measurements of MIL-PRF-19500) JANS JANTX and JANTXV levels (1) 3c Thermal impedance, method 3131 of MIL-STD-750 (see 4.3.1) Thermal impedance, method 3131 of MIL-STD-750 (see 4.3.1) 9 I CEX1 and h FE2 I CEX1 and h FE2 * 11 I CEX1 and h FE2 I CEX1 = 100 percent of initial value or 500 na dc, whichever is greater; h FE2 = ±15 percent of initial value. 12 See See Subgroup 2 and 3 of table I herein; I CEX1 = 100 percent of initial value or 500 na dc, whichever is greater; h FE2 = ±25 percent of initial value. For TO-254AA packages: Method 1081 of MIL-STD-750 (see 4.3.4), Endpoints: Subgroup 2 of table I herein. I CEX1 and h FE2 I CEX1 = 100 percent of initial value or 500 na dc, whichever is greater; h FE2 = ±25 percent of initial value. Subgroup 2 of table I herein; I CEX1 = 100 percent of initial value or 500 na dc, whichever is greater; h FE2 = ±25 percent of initial value. For TO-254AA packages: Method 1081 of MIL-STD-750 (see 4.3.4), Endpoints: Subgroup 2 of table I herein. * (1) Shall be performed anytime after temperature cycling, screen 3a; JANTX and JANTXV levels do not need to be repeated in screening requirements. * Thermal impedance. The thermal impedance measurements shall be performed in accordance with method 3131 of MIL-STD-750 using the guidelines in that method for determining I M, I H, t H, t SW, (and V H where appropriate). Measurement delay time (t MD ) = 70 µs max. The thermal impedance limit shall comply with the thermal impedance graph on figures 8, 9, 10, and 11 (less than or equal to the curve value at the same t H time) and shall be less than the process determined statistical maximum limit as outlined in method 3131 of MIL-STD-750. See table III, subgroup 4 herein Power burn-in conditions. Power burn-in conditions are: T J = C minimum, V CB 100 V dc; T A = +30 C maximum Screening (JANHC and JANKC). Screening of JANHC and JANKC die shall be in accordance with MIL-PRF-19500, Discrete Semiconductor Die/Chip Lot Acceptance. Burn-in duration for the JANKC level follows JANS requirements; the JANHC follows JANTX requirements. 9
10 * Dielectric withstanding voltage. a. Magnitude of test voltage..900 V dc. b. Duration of application of test voltage..15 seconds (min). c. Points of application of test voltage...all leads to case (bunch connection). d. Method of connection..mechanical. e. Kilovolt-ampere rating of high voltage source.1,200 V/1.0 ma (min). f. Maximum leakage current ma. g. Voltage ramp up time V/second. 4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500, and as specified herein Group A inspection. Group A inspection shall be conducted in accordance with MIL-PRF and table I herein. Electrical measurements (end-points) shall be in accordance with table I, subgroup 2 herein Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for subgroup testing in table E-VIA (JANS) and table E-VIB (JAN, JANTX, and JANTXV) of MIL-PRF and herein. Electrical measurements (end-points) shall be in accordance with table I, subgroup 2 herein. * Group B inspection, table E-VIA (JANS) of MIL-PRF Subgroup Method Condition B Test condition D, all internal leads for each device shall be pulled separately. * B V CB 100 V dc. B V CB = 100 V dc; adjust T A and P D to achieve T J = +275 C minimum. P D = 100 percent of rated P T minimum; T A = +100 C maximum Group B inspection, table E-VIB (JAN, JANTX, and JANTXV) of MIL-PRF Subgroup Method Condition B For eutectic die attach: V CB 100 V dc; adjust P T to achieve T J = +175 C minimum; T A = +30 C maximum B For solder die attach: 2,000 cycles, V CB 100 V dc. 10
11 * Group C inspection. Group C inspection shall be conducted in accordance with the conditions specified for subgroup testing in table E-VII of MIL-PRF and herein. Electrical measurements (end-points) shall be in accordance with table I, subgroup 2 herein. Subgroup Method Condition C Test condition A; weight = 10 pounds; time = 15 s. C Test condition D1; torque = 6 inch-ounce; time =15 s (2N6691, 2N6693 only). C Stud torque (2N6691, 2N6693 only), test condition D2; torque = 15 inchpound; time = 15 s. C See 4.3.1, R θjc = 1.0 C for 2N6676, 2N6676T1, 2N6678, 2N6678T1, 2N6691, 2N6693; R θjc = 1.3 C for 2N6676T3, 2N6678T3. C For eutectic die attach: V CB 100 V dc; adjust P T to achieve T J = +175 C minimum; T A = +30 C maximum. * C For solder die attach: V CB 100 V dc Group D inspection. Conformance inspection for hardness assured JANS, JANJ, and JANTXV types shall include the group D tests specified in table II herein. These tests shall be performed as required in accordance with MIL-PRF and method 1019 of MIL-STD-750, for total ionizing dose or method 1017 of MIL-STD-750 for neutron fluence as applicable (see 6.2 herein), except group D, subgroup 2 may be performed separate from other subgroups Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for subgroup testing in appendix E, table E-IX of MIL-PRF and as specified in table III herein. Electrical measurements (end-points) shall be in accordance with table I, subgroup 2 herein. 4.5 Method of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows Pulse measurements. Conditions for pulse measurement shall be as specified in section 4 of MIL-STD Insulation resistance test. Insulation resistance test conditions are as follows: Method 1016 of MIL-STD-750, short collector, emitter and base terminals together. Limit is 10 9 Ω minimum. 11
12 TABLE I. Group A inspection. Inspection 1/ MIL-STD-750 Symbol Limit Unit Method Conditions Min Max Subgroup 1 Visual and mechanical examination 2071 Subgroup 2 Thermal impedance 3131 See Z θjx C/W Collector to base breakdown voltage 2N6676, 2N6676T1 2N6678, 2N6678T Bias condition D, I C = 200 ma dc; pulsed (see 4.5.1) V (BR)CEO 300 V dc 400 V dc Collector to emitter cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T1 Collector to emitter cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T1 Collector to base cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T Bias condition A, V BE = -1.5 V dc I CEX1 1 µa dc V CEX = 450 V dc V CEX = 650 V dc 3041 Bias condition A, V BE = -1.5 V dc I CEX2 V CEX = 300 V dc 500 na V CEX = 400 V dc 500 na 3036 Bias condition D; I CBO 1.0 ma dc V CBO = 450 V dc V CBO = 650 V dc Emitter-base cutoff current 3061 Bias condition D, V EB = 8 V dc I EBO 2.0 ma dc Base emitter voltage 3066 Test condition A; I C = 15 A dc; pulsed (see 4.5.1); I B = 3 A dc V BE(sat) 1.5 V dc Collector to emitter saturated voltage Forward-current transfer ratio Forward-current transfer ratio 3071 I C = 15 A dc; pulsed (see 4.5.1) I B = 3 A dc 3076 V CE = 3 V dc; I C = 1 A dc; pulsed (see 4.5.1) 3076 V CE = 3 V dc; I C = 15 A dc; pulsed (see 4.5.1) V CE(sat)1 1.0 V dc h FE h FE See footnote at end of table. 12
13 TABLE I. Group A inspection - Continued. Inspection 1/ MIL-STD-750 Symbol Limit Unit Method Conditions Min Max Subgroup 3 High-temperature operation: T A = +125 C Collector to emitter cutoff current 3041 Bias condition A; V BE = -1.5 V dc I CEX3 50 µa dc 2N6676, 2N6676T1 2N6678, 2N6678T1 Collector to emitter saturated voltage V CEX = 450 V dc V CEX = 650 V dc 3071 I C = 15 A dc; I B = 3 A dc; pulsed (see 4.5.1) V CE(sat)2 2.0 V dc Collector to emitter cutoff current 3041 Bias condition A, V BE = -1.5 V dc I CEX4 2N6676, 2N6676T1 2N6678, 2N6678T1 Low-temperature operation : V CEX = 300 V dc 90 µa V CEX = 400 V dc 90 µa T A = -55 C Forward-current transfer ratio 3076 V CE = 3 V dc I C = 15 A dc; pulsed (see 4.5.1) Subgroup 4 h FE3 4 Magnitude of common emitter small-signal short-circuit forward- current transfer ratio 3306 V CE = 10 V dc; I C = 1 A dc; f = 5 MHz h fe 3 10 Open capacitance (open circuit) 3236 V CB = 10 V dc; I E = 0; C obo pf 100 khz f 1.0 MHz Pulse response: 3251 T A = +25 C; Test condition A, except test circuit and pulse requirement in accordance with figure 12 Pulse delay time t d 0.1 µs Pulse rise time t r 0.6 µs Pulse storage time t s 2.5 µs Pulse fall time t f 0.5 µs Cross over time t c 0.5 µs Subgroup 5 Safe operating area (dc operation) Test 1 (All device types) See footnote at end of table T C = +25 C t = 1 s; 1 cycle; (see figure 13) V CE = 11.7 V dc; I C = 15 A dc 13
14 TABLE I. Group A inspection - Continued. Inspection 1/ MIL-STD-750 Symbol Limit Unit Method Conditions Min Max Subgroup 5 - Continued Test 2 (2N6676, 2N6678, 2N6676T1, 2N6676T3, 2N6678T1, 2N6678T3) Test 3 (All device types) Test 4 (2N6691, 2N6693) Test 5 (2N6676, 2N6678, 2N6676T1, 2N6676T3, 2N6678T1, 2N6678T3 ) (2N6691, 2N6693) Safe operating area (clamped switching) 2N6676, 2N6676T1, 2N6678, 2N6678T1, Electrical measurements V CE = 30 V dc; I C = 5.9 A dc V CE = 100 V dc; I C = 0.25 A dc V CE = 25 V dc; I C = 7 A dc V CE = 300 V dc; I C = 20 ma dc V CE = 400 V dc; I C = 10 ma dc 3053 T A = +25 C, V CC = 15 V dc (see figure 14 ); Load condition B, V BB2 = 5.0 V, R BB1 = 5 Ω; R BB2 = 1.5 Ω; L = 50 µh; R of inductor = 0.05 Ω, R load =R of inductor Clamp voltage = 350 V dc; I C = 15 A dc Clamp voltage = 450 V dc; I C = 15 A dc Table I, subgroup 2 herein. Not applicable Subgroup 6 Subgroup 7 Insulation resistance ( 2N6676T1, 2N6676T3, 2N6678T1, 2N6678T3, 2N6691 and 2N6693 only) 1016 See R ISO 1x10 9 Ω 1/ For sampling plan see MIL-PRF
15 TABLE II. Group D inspection. Inspection 1/ 2/ 3/ MIL-STD-750 Symbol Limit Unit Method Conditions Min Max Subgroup 1 4/ Neutron irradiation 1017 Neutron exposure Vces = 0V Collector to base breakdown voltage 2N6676, 2N6676T1 2N6678, 2N6678T Bias condition D, I C = 200 ma dc; pulsed (see 4.5.1) V (BR)CEO 300 V dc 400 V dc Collector to emitter cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T1 Collector to emitter cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T1 Collector to base cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T Bias condition A, V BE = -1.5 V dc I CEX1 2 µa dc V CEX = 450 V dc V CEX = 650 V dc 3041 Bias condition A, V BE = -1.5 V dc I CEX2 V CEX = 300 V dc 1.0 ua V CEX = 400 V dc 1.0 ua 3036 Bias condition D; I CBO 2.0 ma dc V CBO = 450 V dc V CBO = 650 V dc Emitter-base cutoff current 3061 Bias condition D, V EB = 8 V dc I EBO 4.0 ma dc Base emitter voltage 3066 Test condition A; I C = 15 A dc; pulsed (see 4.5.1); I B = 3 A dc V BE(sat) 1.73 V dc Collector to emitter saturated voltage 3071 I C = 15 A dc; pulsed (see 4.5.1) I B = 3 A dc V CE(sat) V dc Forward-current transfer ratio 3076 V CE = 3 V dc; I C = 1 A dc; pulsed (see 4.5.1) [h FE1] 5/ [7.5] 40 Forward-current transfer Ratio 3076 V CE = 3 V dc; I C = 15 A dc; pulsed (see 4.5.1) [h FE2] 5/ [4] 20 See footnotes at end of table. 15
16 TABLE II. Group D inspection - Continued. Inspection 1/ 2/ 3/ MIL-STD-750 Symbol Limit Unit Method Conditions Min Max Subgroup 2 Total dose irradiation 1019 Gamma exposure 2N6676, 2N6676T1 Vces = 240V 2N6678, 2N6678T1 Vces = 320V Collector to base breakdown voltage 2N6676, 2N6676T1 2N6678, 2N6678T Bias condition D, I C = 200 ma dc; pulsed (see 4.5.1) V (BR)CEO 300 V dc 400 V dc Collector to emitter cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T1 Collector to emitter cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T1 Collector to base cutoff current 2N6676, 2N6676T1 2N6678, 2N6678T Bias condition A, V BE = -1.5 V dc I CEX1 2 µa dc V CEX = 450 V dc V CEX = 650 V dc 3041 Bias condition A, V BE = -1.5 V dc I CEX2 V CEX = 300 V dc 1.0 ua V CEX = 400 V dc 1.0 ua 3036 Bias condition D; I CBO 2.0 ma dc V CBO = 450 V dc V CBO = 650 V dc Emitter-base cutoff current 3061 Bias condition D, V EB = 8 V dc I EBO 4.0 ma dc Base emitter voltage 3066 Test condition A; I C = 15 A dc; pulsed (see 4.5.1); I B = 3 A dc V BE(sat) 1.73 V dc Collector to emitter saturated voltage 3071 I C = 15 A dc; pulsed (see 4.5.1) I B = 3 A dc V CE(sat) V dc Forward-current transfer ratio 3076 V CE = 3 V dc; I C = 1 A dc; pulsed (see 4.5.1) [h FE1] 5/ [7.5] 40 Forward-current transfer ratio 3076 V CE = 3 V dc; I C = 15 A dc; pulsed (see 4.5.1) [h FE2] 5/ [4] 20 See footnotes at end of table. 16
17 TABLE II. Group D inspection - Continued. 1/ Tests to be performed on all devices receiving radiation exposure. 2/ For sampling plan, see MIL-PRF / Electrical characteristics apply to all device types unless otherwise noted. 4/ See 6.2.e herein. 5/ See method 1019, of MIL-STD-750, for how to determine [h FE] by first calculating the delta(1/h FE) from the pre and post radiation h FE. Notice that [h FE] is not the same as h FE and cannot be measured directly. The [h FE] value can never exceed the pre-radiation minimum h FE that it is based upon. 17
18 * TABLE III. Group E inspection (all quality levels) - for qualification and re-qualification only. Inspection MIL-STD-750 Sample plan Method Conditions Thermal shock glass strain Hermetic seal Fine leak Gross leak Subgroup 1 Electrical measurements Blocking life Subgroup 2 Electrical measurements Subgroup 4 Thermal impedance curves C to +100 C, 100 cycles See table I, subgroup 2 herein ,000 hours minimum, T A = 150 C, V CB = 80 percent of rated, without going over the maximum rated V CEO. See table I, subgroup 2 herein. See table E-IX of MIL-PRF devices c = 0 45 devices c = 0 Subgroup 5 Barometric pressure Subgroup Test condition C, see 1.3. Unless otherwise specified, the device shall be subjected to the maximum voltage it would be subjected to under rated operating conditions. 3 devices c = 0 * ESD 1020 Subgroup 8 Reverse stability 1033 Condition A. 45 devices c = 0 18
19 NOTES: 1. All devices are capable of operating at T J specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired maximum T J allowed. 2. Derate design curve constrained by the maximum junction temperature (T J +200 C) and power rating specified. (See 1.3 herein.) 3. Derate design curve chosen at T J +150 C, where the maximum temperature of electrical test is performed. 4. Derate design curves chosen at T J +125 C, and +110 C to show power rating where most users want to limit T J in their application. FIGURE 6. Temperature derating graph (all except T3 (TO-257AA) packages). 19
20 NOTES: 1. All devices are capable of operating at T J specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired maximum T J allowed. 2. Derate design curve constrained by the maximum junction temperature (T J +200 C) and power rating specified. (See 1.3 herein.) 3. Derate design curve chosen at T J +150 C, where the maximum temperature of electrical test is performed. 4. Derate design curves chosen at T J +125 C, and +110 C to show power rating where most users want to limit T J in their application. FIGURE 7. Temperature derating graph for T3 (TO-257AA) packages. 20
21 Maximum Thermal Impedance TO-3 Package, Tc=25C 10 1 Theta (C/W) R θjc = 1.0 C/W max. Time (s) FIGURE 8. Thermal impedance graphs (2N6676 and 2N6678). 21
22 Maximum Thermal Impedance TO-61 package, TC = 25 C 10 1 Theta (C/W) Time (s) R θjc = 1.0 C/W max. FIGURE 9. Thermal impedance graphs (2N6691 and 2N6693). 22
23 Maximum Thermal Impedance TO-254 Package, Tc=25C 10 1 Theta (C/W) R θjc = 1.0 C/W max. Time (s) FIGURE 10. Thermal impedance graphs (2N6676T1 and 2N6678T1). 23
24 Maximum Thermal Impedance TO-257 Package, Tc=25C 10 Theta (C/W) R θjc = 1.3 C/W max. Time (s) FIGURE 11. Thermal impedance graphs (2N6676T3 and 2N6678T3). 24
25 FIGURE 12. Pulse response test circuit. 25
26 NOTES: 1. The rise time (t r ) of the applied pulse shall be 20 ns; duty cycle 2 percent; generator source impedance shall be 50 ohms. 2. Output sampling oscilloscope: Z in 100 k ohms; C in 12 pf; rise time 5 ns. FIGURE 12. Pulse response test circuits - Continued. 26
27 Safe Operating Area, Mil-Prf-19500/ Ic (A) 1 1ms ms 2N6676, T1, T3, 2N V dc Max 2N6678, T1, T3, 2N V dc Max 100ms DC Vce (V) FIGURE 13. Maximum safe operating graph (dc). 27
28 FIGURE 14. Safe operating area for switching between saturation and cutoff (clamped inductive load) (all devices). 28
29 5. PACKAGING 5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or order (see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these personnel need to contact the responsible packaging activity to ascertain packaging requirements. Packaging requirements are maintained by the Inventory Control Point's packaging activities within the Military Service or Defense Agency, or within the Military Service s system commands. Packaging data retrieval is available from the managing Military Department's or Defense Agency's automated packaging files, CD-ROM products, or by contacting the responsible packaging activity. 6. NOTES (This section contains information of a general or explanatory nature that may be helpful, but is not mandatory. The notes specified in MIL-PRF are applicable to this specification.) 6.1 Intended use. Semiconductors conforming to this specification are intended for original equipment design applications and logistic support of existing equipment. 6.2 Acquisition requirements. Acquisition documents should specify the following: a. Title, number, and date of this specification. b. Packaging requirements (see 5.1). c. Lead finish (see 3.4.1). d. Product assurance level and type designator. e. For acquisition of RHA designed devices, table II, subgroup 1 testing of group D is optional. If subgroup 1 testing is desired, it should be specified in the contract. * 6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are, at the time of award of contract, qualified for inclusion in Qualified Manufacturers List (QML 19500) whether or not such products have actually been so listed by that date. The attention of the contractors is called to these requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the products covered by this specification. Information pertaining to qualification of products may be obtained from DLA Land and Maritime, ATTN: VQE, P.O. Box 3990, Columbus, OH or [email protected]. An online listing of products qualified to this specification may be found in the Qualified Products Database (QPD) at Changes from previous issue. The margins of this specification are marked with asterisks to indicate where changes from the previous issue were made. This was done as a convenience only and the Government assumes no liability whatsoever for any inaccuracies in these notations. Bidders and contractors are cautioned to evaluate the requirements of this document based on the entire content irrespective of the marginal notations and relationship to the last previous issue. 29
30 6.5 Suppliers of JANHC and JANKC die. The qualified JANHC and JANKC suppliers with the applicable letter version (example JANHC2N2434A) will be identified on the QML. JANC ordering information PIN 2N6676 2N6678 Manufacturer JANHCA2N6676 JANKCA2N6676 JANHCA2N6678 JANKCA2N6678 Custodians: Preparing activity: Army - CR DLA - CC Air Force - 85 DLA - CC (Project ) Review activities: Army - MI Air Force - 19, 99 * NOTE: The activities listed above were interested in this document as of the date of this document. Since organizations and responsibilities can change, you should verify the currency of the information above using the ASSIST Online database at 30
NPN Darlington Power Silicon Transistor Qualified per MIL-PRF-19500/472
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DEVICES PNP SMALL SIGNAL SILICON TRANSISTOR Qualified per MIL-PRF-19500/291 LEVELS 2N2906A 2N2907A JAN 2N2906AL 2N2907AL JANTX 2N2906AUA 2N2907AUA JANTXV 2N2906AUB 2N2907AUB JANS 2N2906AUBC * 2N2907AUBC
2N2222A. Small Signal Switching Transistor. NPN Silicon. MIL PRF 19500/255 Qualified Available as JAN, JANTX, and JANTXV. http://onsemi.com.
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STANDARD MICROCIRCUIT DRAWING MICROCIRCUIT, LINEAR, ADJUSTABLE ANALOG CONTROLLER, MONOLITHIC SILICON 5962-09233
REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV REV REV STATUS REV OF S 1 2 3 4 5 6 7 8 9 10 PMIC N/A MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE
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Vdc. Vdc. Adc. W W/ C T J, T stg 65 to + 200 C
2N6284 (NPN); 2N6286, Preferred Device Darlington Complementary Silicon Power Transistors These packages are designed for general purpose amplifier and low frequency switching applications. Features High
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2N3906. General Purpose Transistors. PNP Silicon. Pb Free Packages are Available* http://onsemi.com. Features MAXIMUM RATINGS
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BC327, BC327-16, BC327-25, BC327-40. Amplifier Transistors. PNP Silicon. These are Pb Free Devices* http://onsemi.com. Features MAXIMUM RATINGS
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MPSA92, MPSA93. High Voltage Transistors. PNP Silicon. Pb Free Packages are Available* Features. http://onsemi.com MAXIMUM RATINGS MARKING DIAGRAM
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BC546B, BC547A, B, C, BC548B, C. Amplifier Transistors. NPN Silicon. Pb Free Packages are Available* Features. http://onsemi.com MAXIMUM RATINGS
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BC546B, BC547A, B, C, BC548B, C. Amplifier Transistors. NPN Silicon. Pb Free Package is Available* Features. http://onsemi.com MAXIMUM RATINGS
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Y.LIN ELECTRONICS CO.,LTD.
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MADP-000504-10720T. Non Magnetic MELF PIN Diode
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2N5460, 2N5461, 2N5462. JFET Amplifier. P Channel Depletion. Pb Free Packages are Available* Features. http://onsemi.com MAXIMUM RATINGS
2N546, 2N5461, JFET Amplifier PChannel Depletion Features PbFree Packages are Available* MAXIMUM RATINGS Rating Symbol Value Unit Drain Gate Voltage V DG 4 Vdc Reverse Gate Source Voltage V GSR 4 Vdc Forward
4N25 Phototransistor Optocoupler General Purpose Type
4N Phototransistor Optocoupler General Purpose Type Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxe denotes a lead-free product Description The 4N is an
Type Marking Pin Configuration Package BCX41 EKs 1 = B 2 = E 3 = C SOT23. Maximum Ratings Parameter Symbol Value Unit Collector-emitter voltage V CEO
BX4 NPN Silicon AF and Switching Transistor For general AF applications High breakdown voltage Low collectoremitter saturation voltage omplementary type: BX4 (PNP) Pbfree (RoHS compliant) package Qualified
2003 THRU 2024 HIGH-VOLTAGE, HIGH-CURRENT DARLINGTON ARRAYS ABSOLUTE MAXIMUM RATINGS FEATURES
THRU Data Sheet 9F 6 6 7 8 9 Dwg. No. A-99 Note that the ULNxxA series (dual in-line package) and ULNxxL series (small-outline IC package) are electrically identical and share a common terminal number
EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at www.hest ore.hu.
EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at www.hest ore.hu. 2N3055, MJ2955 Complementary power transistors Features Datasheet - production
TLP521 1,TLP521 2,TLP521 4
TLP2,TLP2 2,TLP2 4 TOSHIBA Photocoupler GaAs Ired & Photo Transistor TLP2,TLP2 2,TLP2 4 Programmable Controllers AC/DC Input Module Solid State Relay Unit in mm The TOSHIBA TLP2, 2 and 4 consist of a photo
IRLR8729PbF IRLU8729PbF
Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use Benefits
5SNA 3600E170300 HiPak IGBT Module
Data Sheet, Doc. No. 5SYA 44-6 2-24 5SNA 36E73 HiPak IGBT Module VCE = 7 V IC = 36 A Ultra low-loss, rugged SPT+ chip-set Smooth switching SPT+ chip-set for good EMC AlSiC base-plate for high power cycling
BDX33/A/B/C. Symbol Parameter Value Units V CBO Collector-Base Voltage : BDX33 : BDX33A : BDX33B : BDX33C
Power Linear and Switching Applications High Gain General Purpose Power Darlington TR Complement to BDX34/34A/34B/34C respectively 1 TO-220 1.Base 2.Collector 3.Emitter NPN Epitaxial Silicon Transistor
TSM2N7002K 60V N-Channel MOSFET
SOT-23 SOT-323 Pin Definition: 1. Gate 2. Source 3. Drain PRODUCT SUMMARY V DS (V) R DS(on) (Ω) I D (ma) 5 @ V GS = 10V 100 60 5.5 @ V GS = 5V 100 Features Low On-Resistance ESD Protection High Speed Switching
BD135 - BD136 BD139 - BD140
BD135 - BD136 BD139 - BD140 Complementary low voltage transistor Features Products are pre-selected in DC current gain Application General purpose Description These epitaxial planar transistors are mounted
