SDC15. TVS Diode Array for ESD Protection of 12V Data and Power Lines. PROTECTION PRODUCTS Description. Features. Mechanical Characteristics
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1 Description The SDC15 transient voltage suppressor (TVS) is designed to protect components which are connected to data and transmission lines from voltage surges caused by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning. TVS diodes are characterized by their high surge capability, low operating and clamping voltages, and fast response time. This makes them ideal for use as board level protection of sensitive semiconductor components. The dual-junction common-cathode design allows the user to protect one data or power line operating at ±12 volts. The low profile SOT23 package allows flexibility in the design of crowded circuit boards. The SDC15 TVS will meet the surge requirements of IEC (Formerly IEC 81-2), Level 4, Human Body Model for air and contact discharge. SDC15 TVS Diode Array for ESD Protection of 12V Data and Power Lines Features 3 watts peak pulse power (t p = 8/2µs) 4 watts peak pulse power (t p = /µs) Transient protection for data and power lines to IEC (ESD) ±15kV (air), ±8kV (contact) IEC (EFT) 4A (5/5ns) IEC (Lightning) 12A (1.2/5µs) Protects one bidirectional line Low clamping voltage Low leakage current High surge capability Solid-state silicon avalanche technology Mechanical Characteristics JEDEC SOT23 package Molding compound flammability rating: UL 94V- Marking : DC15 Packaging : Tape and Reel per EIA 481 Applications RS-232 Data Lines Portable Electronics Industrial Controls Set-Top Box Servers, Notebook, and Desktop PC 12V DC Supply Protection Circuit Diagram Schematic & PIN Configuration SOT23 (Top View) Revision 12/15/4 1
2 Absolute Maximum Rating Rating Symbol Value Units Peak Pulse Power (tp = 8/2µs) P pk 3 Watts P eak Pulse Current ( tp = 8/2µs) I PP A Non-Repetitive Peak Forward Current (tp=µs) I 4 A FSMAX Thermal Resistance, Junction to Ambient θ JA 56 5 C/ W Lead Soldering Temperature T L 26 ( sec. ) C Operating Temperature T J -55 to +125 C Storage Temperature T STG 55 to C Electrical Characteristics SDC15 Parameter Symbol Conditions Minimum Typical Maximum Units Reverse Stand-Off Voltage V WM Reverse Breakdown Voltage R 2. 8 B I t = 1mA, Between Pin 1 and 2 (each direction) V R 1 V V Reverse Leakage Current I R V RWM = 12.8V, T=25 C Between Pin 1 and 2 (each direction) Forward Voltage V F I F = ma, Pin 1 to 3 and Pin 2 to 3 na 1.3 V Temperature Coefficient of VBR αvbr 12 mv/ C Clamping Voltage V C I P P = 1.9A, tp = /µs Between Pin 1 and 2 (each direction) Junction Capacitance C j V R = V, f = 1MHz Pin 1 to V 12 pf 24 Semtech Corp. 2
3 Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time 1 Power Derating Curve Peak Pulse Power - Ppk (kw) Pulse Duration - t p (µs) % of Rated Power or I PP Ambient Temperature - T A ( o C) Pulse Waveform Clamping Voltage vs. Peak Pulse Current Percent of IPP e -t td = I PP /2 Waveform Parameters: tr = 8µs td = 2µs Time (µs) Clamping Voltage - VC (V) Waveform Parameters: tr = 8µs td = 2µs Peak Pulse Current - I PP (A) Forward Voltage vs. Forward Current 3 Forward Voltage - VF (V) Waveform Parameters: tr = 8µs td = 2µs Forward Current - I F (A) 24 Semtech Corp. 3
4 Applications Information Device Connection for Protection of One Data Line The SDC15 is designed to protect one data or I/O line operating at ±12 volts. Connection options are as follows: Device Schematic and Pin Configuration Common mode protection: Pin 1 is connected to the data line and pin 2 is connected to ground. For best results, this pin should be connected directly to a ground plane on the board. The path length should be kept as short as possible to minimize parasitic inductance. Pin 3 is not connected. Differential protection: Pin 1 is connected to one line and pin 2 is connected to the second line. Pin 3 is not connected. Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of fast rise-time transients such as ESD. The following guidelines are recommended: RS-232 Transceiver Protection Example Place the SDC15 near the input terminals or connectors to restrict transient coupling. Minimize the path length between the SDC15 and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible. Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of % tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. 24 Semtech Corp. 4
5 Outline Drawing - SOT23 D e e A B E1 bxn bbb E C A B SEATING PLANE C GAUGE PLANE.25 H DETAIL A L L1 c DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A A A b c D E E e BSC e BSC L L1.22 (.55) N aaa.4. bbb.8.2 A A2 3X aaa C SEATING PLANE SIDE VIEW SEE DETAIL A A1 C NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H- 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. Land Pattern - SOT23 X Z Y Y G C DIMENSIONS DIM INCHES MILLIMETERS C (.87) (2.2) E E G.31.8 X Y Z E1 NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A. E Note 1 : Grid placement courtyard is 8 x 8 elements (4mm x 4mm) in accordance with the international grid detailed in IEC Publication Semtech Corp. 5
6 Ordering Information Part Number Lead Finish Qty per Reel Reel Size SDC15.TC SDC15.TCT SnPb 3, 7 Inch Pb Free 3, 7 Inch Contact Information Semtech Corporation Protection Products Division 2 Flynn Road, Camarillo, CA 9312 Phone: (85) FAX (85) Semtech Corp. 6
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MCT2 MCT2E MCT20 MCT27 WHITE PACKAGE (-M SUFFIX) BLACK PACKAGE (NO -M SUFFIX) DESCRIPTION The MCT2XXX series optoisolators consist of a gallium arsenide infrared emitting diode driving a silicon phototransistor
IP4234CZ6. 1. Product profile. Single USB 2.0 ESD protection to IEC 61000-4-2 level 4. 1.1 General description. 1.2 Features. 1.
Rev. 01 16 April 2009 Product data sheet 1. Product profile 1.1 General description The is designed to protect Input/Output (I/O) USB 2.0 ports, that are sensitive to capacitive loads, from being damaged
P-Channel 20-V (D-S) MOSFET
Si33DS P-Channel -V (D-S) MOSFET PRODUCT SUMMARY V DS (V) R DS(on) (Ω) I D (A).39 at V GS = -.5 V -.7 -.5 at V GS = -.5 V -..68 at V GS = -.8 V - 3.5 FEATURES Halogen-free According to IEC 69-- Available
AN96-07. Surging Ideas TVS Diode Application Note PROTECTION PRODUCTS. TRANSIENT IMMUNITY STANDARDS: IEC 61000-4-x
TRANSIENT IMMUNITY STANDARDS: IEC 61000-4-x On January 1, 1996, exports into Europe began facing some tough transient immunity standards. The International Electrotechnical Commission (IEC), a worldwide
1 Form A Solid State Relay
Form A Solid State Relay VOAT, VOAABTR FEATURES 9 S S DC S' 3 S' High speed SSR - t on /t off < 8 μs Maximum R ON. Isolation test voltage 3 V RMS Load voltage V Load current A DC configuration DIP- package
Data Sheet. ACPL-077L Low Power 3.3 V / 5 V High Speed CMOS Optocoupler Design for System Level Reliability. Description. Features. Functional Diagram
ACPL-077L Low Power 3.3 V / 5 V High Speed CMOS Optocoupler Design for System Level Reliability Data Sheet Lead (Pb) Free RoHS 6 fully compliant RoHS 6 fully compliant options available; -xxxe denotes
AAT4280 Slew Rate Controlled Load Switch
General Description Features SmartSwitch The AAT4280 SmartSwitch is a P-channel MOSFET power switch designed for high-side load switching applications. The P-channel MOSFET device has a typical R DS(ON)
IRLR8729PbF IRLU8729PbF
Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use Benefits
N-Channel 100 V (D-S) MOSFET
Si4DS N-Channel V (D-S) MOSFET MOSFET PRODUCT SUMMARY V DS (V) R DS(on) ( ) I D (A) a Q g (Typ.).4 at V GS = V..67 at V GS = 6 V..9 nc.78 at V GS = 4.5 V.7 FEATURES TrenchFET Power MOSFET % R g Tested
Vdc. Vdc. Adc. W W/ C T J, T stg 65 to + 200 C
2N6284 (NPN); 2N6286, Preferred Device Darlington Complementary Silicon Power Transistors These packages are designed for general purpose amplifier and low frequency switching applications. Features High
3-Channel Supervisor IC for Power Supply
3-Channel Supervisor IC for Power Supply Features Over-voltage protection and lockout Under-voltage protection and lockout Open drain power good output signal Built-in 300mS delay for power good 38mS de-bounce
PS323. Precision, Single-Supply SPST Analog Switch. Features. Description. Block Diagram, Pin Configuration, and Truth Table. Applications PS323 PS323
Features ÎÎLow On-Resistance (33-ohm typ.) Minimizes Distortion and Error Voltages ÎÎLow Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, 2pC typ. ÎÎSingle-Supply Operation (+2.5V to
High-speed switching diodes. Type number Package Configuration Package NXP JEITA JEDEC
Rev. 8 18 November 2010 Product data sheet 1. Product profile 1.1 General description, encapsulated in small Surface-Mounted Device (SMD) plastic packages. Table 1. Product overview Type number Package
Power MOSFET. IRF510PbF SiHF510-E3 IRF510 SiHF510. PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage V DS 100 V Gate-Source Voltage V GS ± 20
Power MOSFET PRODUCT SUMMARY (V) 100 R DS(on) () = 0.54 Q g max. (nc) 8.3 Q gs (nc) 2.3 Q gd (nc) 3.8 Configuration Single D TO220AB G FEATURES Dynamic dv/dt rating Available Repetitive avalanche rated
N-channel enhancement mode TrenchMOS transistor
FEATURES SYMBOL QUICK REFERENCE DATA Trench technology d V DSS = V Low on-state resistance Fast switching I D = A High thermal cycling performance Low thermal resistance R DS(ON) mω (V GS = V) g s R DS(ON)
DVIULC6-4SC6. Ultra low capacitance ESD protection. Main applications. Complies with these standards: Description. Benefits. Features.
Ultra low capacitance ESD protection Main applications DVI ports up to 1.65 Gb/s HDMI ports up to 1.65 Gb/s IEEE 1394a and IEEE 1394b ports up to 1.6 Gb/s USB2.0 ports up to 480 Mb/s (high speed), backwards
Following are definitions for major parameters to consider when selecting a power line polarity protection diode for an automotive application.
Diode rectifiers are ideal solutions for automotive electronic power line protection and have several important parameters for these applications, including: Forward current, repetitive reverse voltage,
