CONTENTS 1. FUNDAMENTAL CONCEPTS 1 2. NUMBER SYSTEMS AND CODES 21. Acknowledgements

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1 CONTENTS Acknowledgements xi 1. FUNDAMENTAL CONCEPTS Introduction Digital Signals Basic Digital Circuits The AND Operation The OR Operation The NOT Operation NAND and NOR Operations The NAND Operation The NOR Operation Exclusive-OR Operation Boolean Algebra Examples of IC Gates Summary 13 Glossary 14 Review Questions 16 Problems NUMBER SYSTEMS AND CODES Introduction Number Systems 22

2 xiv Contents 2.3 Binary Number System Binary-to-Decimal Conversion Decimal-to-Binary Conversion Signed Binary Numbers Sign-Magnitude Representation One s Complement Representation Two s Complement Representation Binary Arithmetic Binary Addition Binary Subtraction Binary Multiplication Binary Division s Complement Arithmetic Subtraction Using 2 s Complement Addition/Subtraction in 2 s Complement Representation Octal Number System Octal-to-Decimal Conversion Decimal-to-Octal Conversion Octal-to-Binary Conversion Binary-to-Octal Conversion Octal Arithmetic Applications of Octal Number System Hexadecimal Number System Hexadecimal-to-Decimal Conversion Decimal-to-Hexadecimal Conversion Hexadecimal-to-Binary Conversion Binary-to-Hexadecimal Conversion Conversion from Hex-to-Octal and Vice-Versa Hexadecimal Arithmetic Codes Straight Binary Code Natural BCD Code Excess-3 Code Gray Code Octal Code Hexadecimal Code Alphanumeric Codes Error Detecting and Correcting Codes Error-detecting Codes Error-correcting Codes Summary 54 Glossary 54 Review Questions 56 Problems 57

3 Contents xv 3. SEMICONDUCTOR DEVICES SWITCHING MODE OPERATION Introduction Semiconductors p-n Junction Diode Forward Bias Reverse Bias The Volt-Ampere Characteristic Zener Diode Transition Capacitance of a p-n Junction Diode Switching Characteristics of a Semiconductor Diode Schottky Diode Bipolar Junction Transistor Transistor Configurations Transistor as a Switch CE Transistor Switch Switching Speed of BJT Schottky Transistor Field-Effect Transistor Junction Field-Effect Transistor Metal-Oxide Semiconductor Field-Effect Transistor FET Switches Complementary MOSFET (CMOS) Summary 83 Glossary 83 Review Questions 83 Problems DIGITAL LOGIC FAMILIES Introduction Bipolar Logic Families Unipolar Logic Families Characteristics of Digital ICs Speed of Operation Power Dissipation Figure of Merit Fan-Out Current and Voltage Parameters Noise Immunity Operating Temperature Power Supply Requirements Flexibilities Available 93

4 xvi Contents 4.3 Resistor Transistor Logic (RTL) Logic Operation Loading Considerations Noise Margins Propagation Delay Time Current Source Logic Wired-Logic Direct-Coupled Transistor Logic (DCTL) Integrated-Injection Logic (I 2 L) I 2 L Inverter I 2 L Configuration Fabrication of I 2 L Diode Transistor Logic (DTL) Operation of DTL NAND Gate Propagation Delays Current Sink Logic Wired-Logic Modified Integrated DTL NAND Gate High-Threshold Logic (HTL) Transistor transistor Logic (TTL) Operation of TTL NAND Gate Active Pull-up Wired-AND Open-Collector Output Unconnected Inputs Clamping Diodes Schottky TTL /7400 TTL Series Emitter-Coupled Logic (ECL) Fan-Out Wired-OR Logic Open-Emitter Outputs Unconnected Inputs ECL Families Interfacing ECL and TTL TTL-to-ECL Translator ECL-to-TTL Translator MOS Logic MOSFET NAND and NOR Gates Fan-Out Propagation Delay Time Power Dissipation Unconnected Inputs 119

5 Contents xvii 4.14 CMOS Logic CMOS Inverter CMOS NAND and NOR Gates CMOS Transmission Gate Noise Margin Unconnected Inputs Wired-Logic Open-Drain Outputs C00/74C00 CMOS Series Interfacing CMOS and TTL CMOS Driving TTL TTL Driving CMOS Interfacing CMOS and ECL Tri-State Logic TSL Inverter Summary 128 Glossary 129 Review Questions 133 Problems COMBINATIONAL LOGIC DESIGN Introduction Standard Representations for Logical Functions Karnaugh Map Representation of Logical Functions Representation of Truth Table on K-Map Representation of Standard SOP Form on K-Map Representation of Standard POS Form on K-Map Simplification of Logical Functions Using K-Map Grouping Two Adjacent Ones Grouping Four Adjacent Ones Grouping Eight Adjacent Ones Grouping 2, 4, and 8 Adjacent Zeros Minimization of Logical Functions Specified in Minterms/Maxterms or Truth Table Minimization of SOP Form Minimization of POS Form Minimization of Logical Functions not Specified in Minterms/Maxterms Don t-care Conditions Design Examples Arithmetic Circuits BCD-to-7-Segment Decoder 166

6 xviii Contents 5.9 EX-OR AND EX-NOR Simplification of K-Maps Diagonal and Offset Adjacencies of Groups of Ones Five- and Six-Variable K-maps Quine-McCluskey Minimization Technique Summary 185 Glossary 186 Review Questions 187 Problems COMBINATIONAL LOGIC DESIGN USING MSI CIRCUITS Introduction Multiplexers and Their Use in Combinational Logic Design Multiplexer Combinational Logic Design Using Multiplexers Multiplexer Tree Demultiplexers/Decoders and Their Use in Combinational Logic Design Demultiplexer Demultiplexer Tree Adders and Their Use as Subtractors Adder with Look-Ahead Carry Cascading of Adders Subtraction Using Adder BCD Arithmetic BCD Adder BCD Subtractor Arithmetic Logic Unit (ALU) Digital Comparators Parity Generators/Checkers Code Converters BCD-to-Binary Converter Binary-to-BCD Converter Priority Encoders Decimal-to-BCD Encoder Octal-to-Binary Encoder Decoder/Drivers for Display Devices BCD-to Decimal Decoder/Driver BCD-to-7-Segment Decoder/Driver Summary 233 Glossary 233 Review Questions 234 Problems 234

7 Contents xix 7. FLIP-FLOPs Introduction A 1-Bit Memory Cell Clocked S R FLIP-FLOP Preset and Clear J K FLIP-FLOP The Race-Around Condition The Master Slave J K FLIP-FLOP D-Type FLIP-FLOP T-Type FLIP-FLOP Excitation Table of FLIP-FLOP Clocked FLIP-FLOP Design Conversion From One Type of FLIP-FLOP to Another Type Edge-Triggered FLIP-FLOPs Applications of FLIP-FLOPs Bounce-Elimination Switch Registers Counters Random-Access Memory Summary 259 Glossary 260 Review Questions 262 Problems SEQUENTIAL LOGIC DESIGN Introduction Registers Shift Register Applications of Shift Registers Delay Line Serial-to-Parallel Converter Parallel-to-Serial Converter Ring Counter Twisted-Ring Counter Sequence Generator Ripple or Asynchronous Counters UP/DOWN Counters Modulus of the Counter /74 Series Asynchronous Counter ICs Synchronous Counters Synchronous Counter Design 288

8 xx Contents Lock Out /74 Series Synchronous Counter ICs Clocked Sequential Circuit Design Asynchronous Sequential Circuits Asynchronus versus Synchronous Sequential Circuits Applications of Asynchronous Sequential Circuits Asynchronous Sequential Machine Modes Analysis of Asynchronous Sequential Machines Asynchronous Sequential Circuit Design Summary 327 Glossary 328 Review Questions 330 Problems TIMING CIRCUITS Introduction Applications of Logic Gates in Timing Circuits Free-Running Multivibrator Monostable Multivibrator OP AMP and its Applications in Timing Circuits OP AMP Comparator Regenerative Comparator (Schmitt Trigger) Astable (or Free-Running) Multivibrator Monostable Multivibrator Schmitt Trigger ICs Schmitt Trigger Square-Wave Generator Monostable Multivibrator ICs Monostable Multivibrator Retriggerable Monostable Multivibrators (74122 and 74123) Non-retriggerable Monostable Multivibrator with Clear (74221) Astable Multivibrator Using One-Shots Timer Monostable Multivibrator Astable Multivibrator Summary 362 Glossary 362 Review Questions 363 Problems A/D AND D/A CONVERTERS Introduction Digital-to-Analog Converters 367

9 Contents xxi Weighted-Resistor D/A Converter R 2R Ladder D/A Converter Specifications for D/A Converters An Example of D/A Converter IC Digital Input Codes Analog Output Calibration Sample-And-Hold Sample-and-Hold Circuit Analog-to-Digital Converters Quantization and Encoding Parallel-Comparator A/D Converter Successive-Approximation A/D Converter Counting A/D Converter Dual-Slope A/D Converter A/D Converter Using Voltage-to-Frequency Conversion A/D Converter Using Voltage-to-Time Conversion Specifications of A/D Converters An Example of A/D Converter IC Operation Digital Output Analog Input Calibration Summary 397 Glossary 398 Review Questions 399 Problems SEMICONDUCTOR MEMORIES Introduction Memory Organization and Operation Write Operation Read Operation Expanding Memory Size Expanding Word Size Expanding Word Capacity Classification and Characteristics of Memories Principle of Operation Physical Characteristics Mode of Access Fabrication Technology 413

10 xxii Contents 11.5 Sequential Memory Static Shift Register Dynamic Shift Register Read-Only Memory ROM Organization Programming Mechanisms ROM ICs Read and Write Memory Bipolar RAM Cell MOS RAMs RAM ICs Content Addressable Memory Operation of CAM Charge Coupled Device Memory Basic Concept of CCD Operation of CCD A Practical CCD Memory Device Summary 443 Glossary 444 Review Questions 445 Problems PROGRAMMABLE LOGIC DEVICES Introduction ROM as a PLD Programmable Logic Array Input Buffer AND Matrix OR Matrix Invert/Non-Invert Matrix Output Buffer Output through FLIP-FLOPs and Buffers Programming the PLA Expanding PLA Capacity Applications of PLAs Available PLAs Programmable Array Logic Registered PALs Configurable PALs Generic Array Logic Devices EX-OR PALs Available PALs Simple PLDs (SPLDs) 478

11 Contents xxiii 12.5 Complex Programmable Logic Devices (CPLDs) Block Diagram Programming Packaging Available CPLDs Field-Programmable Gate Array (FPGA) Logic Cell Array Actel ACT Antifuse Plessey ERA Summary 491 Glossary 491 Review Questions 492 Problems FUNDAMENTALS OF MICROPROCESSORS Introduction An Ideal Microprocessor The Data Bus The Address Bus The Control Bus Microprocessor Based System Basic Operation Microprocessor Operation Microprocessor Architecture System Bus Arithmetic Logic Unit (ALU) Registers Program Counter (PC) Flags Timing and Control Unit Instruction set The 8085A Microprocessor Organization and Operation Programming The 8086 Microprocessor The 8086 Architecture Programming Languages Summary 539 Glossary 540 Review Questions 542 Problems 543

12 xxiv Contents 14. COMPUTER-AIDED DESIGN OF DIGITAL SYSTEMS Introduction Computer Aided Design (CAD) Concepts CAD Tools Design Entry Initial Synthesis Functional Simulation Logic Synthesis and Optimization Physical Design Timing Simulation Summary Introduction to VHDL Entity Architecture Configuration Declaration Generic Data objects Examples of VHDL Codes Summary 565 Glossary 565 Review Questions 567 Problems 568 Appendix A1 Reserved Words in VHDL 569 A2 Symbols Defined in VHDL 570 Appendix B Bibliography 571 Appendix C Answers to Review Questions 574 Appendix D Answers to Selected Problems 579 Index 603