Fraunhofer IZM Berlin

Transcription

1 Fraunhofer IZM Berlin Advanced Packaging for High Power VCSEL Arrays Rafael Jordan, Lena Goullon, Constanze Weber, Hermann Oppermann Dr. Rafael Jordan, SIIT

2 Fraunhofer IZM Berlin Advanced Packaging for High Power VCSEL Arrays Rafael Jordan, Lena Goullon, Constanze Weber, Hermann Oppermann VORTEIL [Vertikale Oberflächenemitter für Robuste Temperaturstabile Effiziente Integrierte Lasersysteme] ein Projekt der Integrierte Mikrophotonik im Rahmen des Programms Photonik Forschung Deutschland Dr. Rafael Jordan, SIIT

3 Agenda Partner Soldering Sintering Transient Liquid Phase Bonding/Soldering Nano Sponge Dr. Rafael Jordan, SIIT

4 Philips Photonics New Solutions by Superior Infrared Technologies Superior infrared solutions based on advanced VCSEL technology Extremely fast and low energy switching: Datacom: up to 25 Gb/s, green IT Coherent light: Sensing: very compact speed and position sensors High power IR systems, versatile and intense tailored heating : Industrial heating Camera illumination 4

5 Modular Building Blocks and Tailored Illumination Few basic building blocks enabling flexible designs, tailored to the application Chip 4-10 W ~2x2 mm² Tailored illumination areas large area illumination line or point illumination by microlens optics on the chip and simple lenses IR radiator 450 W 8.5 x 40 mm² Typical power densities on the target area: 100 W/mm² Large systems 2-40 kw 1W/mm² 10W/mm² 6

6 Application Field: Pumping of Solid State Lasers pumping high power solid state laser systems surface cleaning laser ignition VCSEL pump modules Principle of longitudinal pumping VCSEL pump module Nd:YAG rod Principle of transversal pumping VCSEL pump modules Nd:YAG rod Clean Laser Advantages of VCSEL systems: small spectral shift 0.06nm/K uniform pump distribution very compact, integrated systems robust and affordable laser technology VORTEIL FKZ: 13N N

7 Cicor AMS Division Productions Sites Switzerland Cicorel SA Route de l Europe Boudry Sales Office USA Cicor Americas Ltd South Highway 100 Suite 500 St. Louis Park, MN Reinhardt Microtech AG Aeulistrasse Wangs Cicorel SA Avenue de Préville Moudon Germany RHe Microsystems GmbH Heidestrasse Radeberg Reinhardt Microtech GmbH Sedanstrasse Ulm Sales Office Asia Cicor Asia Pte Ltd. 45 Changi South Avenue 2 #04-01 Singapore VDI Projekt VORTEIL I I 8

8 Contribution of Cicor Development of coating technologies for applying a structured, metallic conductive layers on AlN substrates with high positional and dimensional accuracy Structured solder deposits on the conductive layers by suitable coating technologies (electroplating, sputtering, vapor deposition or screen printing). Selecting the sequence of layers in order to avoid unreliable alloys in the compounds Evaluation of a reliable connection technology for AlN substrates on copper coolers and MCPCB by vacuum brazing; testing the Ag sintering technology with new materials from Heraeus Connecting technologies for power supply with minimum space requirements VDI Projekt VORTEIL I I 9

9 curamik electronics GmbH Enabling efficiency, performance and thermal management for power semiconductors, modules and devices Products CERAMIC SUBSTRATES (DCB) MICRO-CHANNEL COOLERS Applications Automotive Energy Industrial Major Appliances Mass Transit Specialties 11

10 curamik electronics GmbH DCB process flow and bonding technology direct copper bonding masking etching laser plating / final cleaning final inspection bonding Copper Copper Ceramic Copper Preoxidation of copper foils Eutectic melt at 1083 C to 1065 C O 2 Copper Ceramic Copper Oxide Copper Copper The melt reacts with the ceramic or copper layer Heating Copper Ceramic Eutectic Melt Copper Copper O 2 Diffusion and Cooling Copper Copper Ceramic Copper 12

11 curamik electronics GmbH ceramic & copper coolers Micro-channel structures made of thin copper foils that are bonded to a hermetically tight block Advantages: Four times more efficient cooling than traditional module structures with liquid cooling Lower weight Smaller sizes Types: Integrated DBC coolers with bilateral AlN or Al2O3-DBC Non-integrated copper coolers 13

12 curamik electronics GmbH curamik part project VORTEIL Vertikale Oberflächenemitter für Robuste Temperaturstabile Effiziente Integrierte Lasersysteme Project Goal: Development and improvement of highly efficient cooling technology for use in highly reliable and compact pump modules Significantly improvement of the heat transfer coefficient Lower pressure drop (higher system efficiency) More homogeneous cooling performance DCB integration for chip on cooler -designs Our technology is used for high performance cooling devices. A channel structure made of thin copper foils, which is assembled into a hermetically tight block by curamik's bonding process, enabling efficient liquid cooling 14

13 Fraunhofer IZM Figures Mio. turnover 77 % contract research 389 employees (238 full time, 155 PhD, trainee) Locations Berlin Oberpfaffenhofen Dresden Director Prof. Klaus-Dieter Lang Material characterization Process evaluation Reliability testing Failure analysis Sample production Training courses

14 Mission Fraunhofer IZM Bringing Microelectronics into Application

15 Agenda Partner Soldering Sintering Transient Liquid Phase Bonding/Soldering Nano Sponge Dr. Rafael Jordan, SIIT

16 AuSn Phase Diagram Au-rich Sn-rich 278 C e C p: h e+l 1 L 1 +Au e 217 C e 1 ~ 60 W m K Dr. Rafael Jordan, SIIT

17 GaAs AuSn reflow soldered on AlN Ceramic Cross section of GaAs chip on AlN x-ray of GaAs chip on AlN Lena Goullon

18 SEM pictures of GaAs chip on AlN GaAs AuSn reflow soldered on AlN Ceramic Lena Goullon

19 GaAs AuSn reflow soldered on DCB x-ray of VCSEL array on DCB Cross section of VCSEL array on DCB Lena Goullon

20 GaAs AuSn reflow soldered on DCB X-Ray SAM Lena Goullon

21 GaAs AuSn reflow soldered on DCB SAM SAM 125/25/ Zyklen 125/25/ Zyklen Lena Goullon

22 GaAs AuSn reflow soldered on DCB x-ray of VCSEL array on DCB Cross section of VCSEL array on DCB Lena Goullon

23 SnAgCu Phase Diagram ~ 30 W m K Dr. Rafael Jordan, SIIT

24 GaAs SnAg reflow soldered on DCB x-ray of VCSEL array on DCB Cross section of VCSEL array on DCB Lena Goullon

25 Agenda Partner Soldering Sintering Transient Liquid Phase Bonding/Soldering Nano Sponge Dr. Rafael Jordan, SIIT

26 Assembly with Ag Sintering Chip to Chip Chip to copper

27 Ag Sintering SEM Pictures Ag-Powder after drying Ag-Powder heat without force Ag-powder heat and force

28 Ag Sintered Interconnects comparing of two suppliers Cross Section with SEM preparation effect AlN Ag Plated Layer Ag Plated Layer Ag Bond Ag Bond Cu

29 Ag Sintered Interconnection, FIB Analysis Ag plated well defined interface Ag sintered

30 Ag Sintered Interconnection, FIB Analysis small pores almost disoluted ~ 370 W m K

31 GaAs pressure less Ag sintered on DCB Ag-sintering paste with mirco-scale particles Standard Pick and Place Sintering under atmosperic conditions Chip size 3,8x2,0mm² or 1,9x2,0mm² Metallization of the DCB: NiPdAu or NiAu or Ag DCB VCSEL-chip sintered Ag-layer Constanze Weber

32 GaAs pressure less Ag sintered on DCB Chip before die placement Constanze Weber

33 GaAs pressure less Ag sintered on DCB Chip after die placement & sintering Constanze Weber

34 GaAs pressure less Ag sintered on DCB x-ray analysis Constanze Weber

35 GaAs pressure less Ag sintered on DCB x-ray of VCSEL array on DCB Cross section of VCSEL array on DCB Constanze Weber

36 GaAs pressure less Ag sintered on DCB [Ni/Pd/Au] The Ag interconnect is sintered homogeneously independent of the chip size The sintered layer is open porous Constanze Weber

37 GaAs pressure less Ag sintered on DCB [Ni/Pd/Au] Open porous structure with a porosity of ~40% The real interconnection area between sintered layer and chip metallization is higher than the area of the interface of sintered layer and DCB metallization Constanze Weber

38 Pressure Less Sintering pro/contra Standard Equipment (Screen printer + P&P + Reflow) No mechanical fixing of parts during sintering No special atmosphere during sintering Lower Shear forces than pressure sintered/soldered dice Metallization of die bond pad must be suitable Smaller process windows (especially regarding drying)

39 Agenda Partner Soldering Sintering Transient Liquid Phase Bonding/Soldering Nano Sponge

40 TLPB using electroplated Cu/Sn soldering annealing Si Cu 3 Sn Cu 6 Sn 5 Cu 3 Sn Cu Christian Ehrhard

41 TLPS SAC-paste plus Cu spheres Cu h Cu 6 Sn 5 Sn e Cu 3 Sn 40 wt.-% Cu ( Cu 6 Sn 5 ) 20 wt.-% Cu Pore 40 wt.-% Cu (Cu 6 Sn 5 ) After soldering 40 wt.-% Cu Christian Ehrhard

42 TLPS SAC-paste plus 40 wt.-% Cu spheres Proprietary Process and Paste Si-Chip DAB Christian Ehrhard

43 Agenda Partner Soldering Sintering Transient Liquid Phase Bonding/Soldering Nano Sponge

44 Nano - Sponge Potential Application: - low pressure, low temperature bonding (MEMS, laser) - compressible bonding (acommodate topography) - containment for medical applications - large surface area (sensors, catalytics) - bio compatible (e.g. neuronal interface) 13 nm pore size - optical devices (plasmonics, SERS) Flip Chip Sintering bonding zone densified zone 80% pore volume H. Oppermann, M. Hutter, R. Jordan, et al. (Fraunhofer IZM)

45 Thank you for your attention! Fraunhofer Institute for Reliability and Microintegration IZM Director Prof. Klaus-Dieter Lang Gustav-Meyer-Allee Berlin Germany Phone URL For more information please contact: Dr. Rafael Jordan Phone