Fraunhofer ISIT, Itzehoe 14. Juni Fraunhofer Institut Siliziumtechnologie (ISIT)

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1 Research and Development centre for Microelectronics and Microsystems Applied Research, Development and Production for Industry ISIT applies an ISO 9001:2000 certified quality management system. Certificate for development, qualification and production of microtechnical components TS certification in preparation for 2006 Hamburger Lötzirkel im ISIT 1

2 Fields of activities Microsystem Technology IC-Technology Biotechnical Microsystems Advanced Packaging Technology Chemical-Mechanical Polishing (CMP) Lithium Ion Accumulators MEMS Service Offer Concept Evaluation MEMS Simulation: Ansys, Coventor MEMS Design: Cadence turn key solution MEMS Interface ASIC Design MEMS System Integration/ Packag. MEMS Test/ Reliability MEMS Technology/Foundry 50 K 6"-Wafer capacity/a Frontend processes from 200K /a inhouse PowerMOS Fab Automated Cleanroom equipment PROMIS lot tracking 25 years history of MEMS technol. Portfolio of advanced MEMS proc. ISO 9001 certification Hamburger Lötzirkel im ISIT 2

3 Angular Rate and Acceleration Sensors: Poly-Silicon-Surface Micromachining 10 µm thick epitaxial poly-si layer high working capacity through interdigital electrodes wafer level vacuum package required Wafer-Level Encapsulation of MEMS wafer bonding techniques for wafer-level encapsulation of MEMS: Glass Frit Printing / Firing and Bonding Au/Sn, Au/Si Eutectic Bonding Soft Solder Bonding Adhesive Bonding Applications areas: Inertial sensors (e.g. gyroscopes) RF-MEMS IR sensors bolometer optical sensors Hamburger Lötzirkel im ISIT 3

4 Low Stress Sensor Packaging Techniques for low stress assembly and packaging of silicon sensors and actuators are developed. Analytical strain calculations as well as finite element modelling are a major expertise. chip attach with optimised adhesive bonding Silicon wafer with airflow sensor manufactured at ISIT Stress sensitive silicon MEMS components: pressure sensors, accelerometers, angular rate sensors (gyro), thermopile sensors, thermal flow sensors Actuators: micro-valves, micro mirror arrays Flip-Chip Technology, Bumping Available Process Steps: Chemical Ni/Au-UBM and Solder Bumping Precision Placement Lead-Free Solder Reflow and Adhesive Joining Underfill Process and Dam & Fill Encapsulation Infrastructure Electroless Deposition (Ni/Au) Au Stud Bumping on 6 Wafer High-Precision Stencil Printing for Wafer Bumping Wafer Dicing Equipment Automated Flip Chip Mounting Production Reflow Soldering Equipment Dispensing Equipment Solder paste printing on a wafer Overview of die bond area with precision flip chip feeding from wafer Hamburger Lötzirkel im ISIT 4

5 Assembly of Ultra-Thin ICs ISIT has developed a technology for processing thin silicon chips with standard production equipment: Wafer-Bumping, Thinning, Dicing, Chip Stacking, Flip Chip complete flow available at ISIT Demonstrator assemblies transponder-chip cards smart-label hearing aids memory cards power modules Automated high Precision Assembly for MEMS Multi-chip die bonder with integrated dispenser and dip stations for flip chip and die attach Infrastructure is available for: precision dicing with temporary protection manual/automatic die pre-selection manual prototype assembly with precision adhesive application automatic volume assembly line with chip stacking capability, passive alignment feature and defined bondline thickness spacer techniques automatic flip-chip underfill quality and reliability characterisation of assemblies Multi-chip die bonder apm 2200 Typical parameters chip stack up to 5 layer wafer dimension up to 200 mm chip geometry 0.5 to 900 mm² min. chip thickness > 30 µm alignment fiducial, relative, passive vision system top and bottom view flipped assembly 90 and 180 Pre-fixation programmed UV Hamburger Lötzirkel im ISIT 5

6 Wafer Level Chip Size Packaging (WL-CSP) 6" Wafer-Level-Packaging-(WLP)-Line release for production: Q4/03 Offered Services: Wafer Redistribution Lead-Free Bumping Wafer Test Backside marking Wafer Dicing Tape & Reel Customer specific chip size packages with solder balls and BCB passivation before dicing, with a standard pitch of 500 µm. Chip-Size Package ready for placement Al/NiV/Cu BCB solder ball after reflow solder pad with tacky flux Hamburger Lötzirkel im ISIT 6

7 Al/NiV/Cu BCB solder ball interlaced overlap Al/NiV/Cu BCB solder print Alternative approach Demand: large volume for 350 µm /400 µm pitch applications Hamburger Lötzirkel im ISIT 7

8 Ti/TiN/Cu + galv. CuNiAu BCB solder print example of passive HF devices Wafer Bumping for MEMS Automatic Au stud bumping of a 6 wafer Available Bumping Infrastructure: Full Wafer, Discrete Ball Attach Automatic Stencil Printer, Reflow Automatic Stud Bumper Automatic Plating Line Quality and Reliability Characterisation Application areas robotics; automotive electronics; medical technology; communication technology Electroplated straight wall Au bumps for high density interconnection Hamburger Lötzirkel im ISIT 8

9 Wafer bumping: alternative technologies Plated bumps Printed bumps Dropped solder balls I/O count / chip 4 ~ ~ ~ 200 min. bump pitch 60 µm > 180 µm 400 µm Bump diameter µm µm µm Bump height 18 µm µm µm Package height 0,3 0,6 µm 0,3 0,8 mm 0,6 1,1 mm underfill ACA/underfill underfill application dep. Redistribution die redistribution repositions pads to alternative locations on the chip technology status Al/NiV/Cu + BCB in development galv. Cu + BCB in development Hamburger Lötzirkel im ISIT 9

10 Testchips (Bare Dice) and Test-Wafers ISIT Offers Cost Efficient Test Chip Platforms: Range of Test-Chips and Test-Substrates Customer Specific Wafer Finish: - Bumping - Thinning - Company s Logotype Daisy-Chain Structures Bumped Test Chips for Flip-Chip-Mounting, CSP Delivery Standards Diced Wafers on Disco-Frames 4" Waffle Pack Test-Substrates and Test-Chips for Direct Mounting Technique different test-boards with matched test-chips Hamburger Lötzirkel im ISIT 10

11 SMT Test Board The test board is designed as double-sided and multilayer board and covers a wide range of typical modern surface mount components. The board is completed with integrated SIR test, cleanliness and other standardised test structures. Qualification of the Solder Paste Deposition Procedure Qualification of the Placement Procedure Setting up the Reflow Soldering Profile Qualification of Rework Stations Personnel Training Trade Fairs and Seminar Presentations Quality Evaluation of Electronic Assemblies and Damage Analysis Non-Destructive Tests: Visual Inspection Micro-Focus X-Ray Analysis IR Spectroscopy Contamination Measurement Surface Resistance Measurement Ultrasonic Investigation Electrical Tests Destructive Tests: Metallographic Analysis Electrical Tests to Failure Mechanic Tests Solderability Tests X-ray inspection of BGA Wetting defect on flip-chip component with massive Pb-bump Dendrite growth under SMD capacitor Hamburger Lötzirkel im ISIT 11

12 References First running productions at Fraunhofer ISIT: Company Device Market Bausch & Lomb Aperture Cards Eye Surgery Vishay Semiconductors Capacitors Mobile Electronics SMI Integr. Discretes Mobile Electronics CSP with solder balls Capacitors Aperture Card Your advantages: What you get is: A high tech turn key solution by a highly qualified staff at a competitive fixed price with a dedicated project manager. Production capability is available for prototyping as well as high volume manufacturing supported by state of the art shop floor control system. Hamburger Lötzirkel im ISIT 12

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