CURRICULUM VITAE (D.Sc. (Tech.) Tero Säntti, 29.04.2015)



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CURRICULUM VITAE (D.Sc. (Tech.) Tero Säntti, 29.04.2015) Name: Tero Antti Mikael Säntti Date of Birth: 18 April 1974 Place of Birth: Kurikka, Finland Gender: Male Nationality: Finnish Languages: Finnish, English, Swedish, (German, Japanese) Marital Status: Common-law marriage Academic Degrees: Current Positions: Previous Positions: D.Sc. (Tech.) in Microelectronics (Computer Systems), University of Turku, Finland, 2008 M.Sc. in Electronics and Information Technology, University of Turku, Finland, 2002. Senior Research Fellow / Erikoistutkija, Technology Research Center, Brahea Centre, University of Turku, Finland (1/2014 -> ) and Senior Engineer, Aboa Space Research Oy (ASRO), Finland, (5/2011 -> ), co-owner (3/2013 -> ) Senior Researcher / Erikoistutkija, Business and Innovation Development (BID Technology), University of Turku, Finland (7/2012 12/2013) Senior Researcher / Erikoistutkija (Embedded Computer Systems), Department of Information Technology, University of Turku, Finland (1/2009 -> 6/2012) Researcher / Tutkija (Computer Systems), Department of Information Technology, University of Turku, Finland (1/2006 12/2008) Assistant / Assistentti (Digital and Computer Technology), Department of Information Technology, University of Turku, Finland (9/2005 12/2005) Lecturer / Lehtori (Digital and Computer Technology), Department of Information Technology, University of Turku, Finland (1/2005 8/2005) Researcher / Tutkija (Digital and Computer Technology), Department of Information Technology, University of Turku, Finland (9/2004 12/2004) Researcher / Tutkija (SoC-Mobinet EU project), Department of Information Technology, University of Turku, Finland (2/2002 8/2004) Assistant / Assistentti, Department of Applied Physics, University of Turku, Finland (9/1999 1/2002) Research associate / Tutkimusavustaja, Department of Applied Physics, University of Turku, Finland (5/1999 8/1999). Other Employments: On commission, Aboa Space Research Oy (ASRO), Finland, design and implementation of a FPGA prototype and related control software for a satellite instrument (6/2009 12/2009), On commission, Aboa Space Research Oy (ASRO), Finland, electronics and PCB design and testing (9/2005 12/2005), Miscellaneous short term employments since 1989, including postal services, security guard, land-measurement, catalogue publication and others. Research Activities: Since 1998 Säntti has been interested in electronic circuit design, embedded systems and system level integration. In the beginning his focus was on

implementation of high speed asynchronous wave-pipelined arithmetic units, on which he wrote his M.Sc. thesis. During the last 8 years he has been focusing on Java Virtual Machine architecture development based on a novel Java accelerator core. The emphasis has been on improved real time performance and predictability with low power usage. The accelerator core is highly modular to facilitate easy integration in a SoC or a NoC system. This was the topic of his D.Sc. (Tech.) thesis. He is also interested in FPGA prototyping and microprocessor based multicore systems, and most recently in dynamic (runtime) reconfiguration of such systems. Especially aerospace applications and fault tolerance in FPGAs are high on his list of interests. Besides his core interests he is also involved in embedded software design and implementing embedded operating systems, mainly Linux running on various FPGA platforms and embedded processors. Most recently he has branched out to the field of visual tracking and matching 3D models to the tracked visual content. This work is part of the Marin2 project, which focuses on bringing augmented reality tools to the industrial users. The aim is to demonstrate the capabilities of AR technology during construction, inspection and maintenance of buildings and ships. Additionally small scale objects, such as ventilation machines, pumps etc. can be connected to the system for easy identification. The system would then show the user all the relevant data, including operating instructions and service histories. Project Involvement: Academic: Marin2: Using augmented reality tools in industrial context, positioning, visual tracking, map matching, 3D model matching (8/2014 -> ) PaMoWe: Combination of experimental testing, active monitoring and mathematical modeling in optimization of high power laser welding process, FPGA development (7/2012-8/2015) RadMon: Electronics and Logic for a Satellite Instrument, Supervisor for FPGA activities at the University of Turku (4/2010 -> ) VirtuES: Embedded Multicore Systems Using Virtual Machine Approach, Senior Researcher, Scientific Leader, (1/2009-12/2011) RealJava: Low-Power Java Co-Processor with Improved Real Time Performance and Predictability, Researcher, Scientific Leader, (1/2006-12/2008) SoC-MOBINET: System On Chip for Mobile Internet, Researcher, (2/2002-8/2004) The scientific content of the RealJava, VirtuES, and RATUS projects has been planned and specified by Säntti. He has acted as the scientific leader and as the executive financial leader in RealJava and VirtuES. Industrial: STREAKDET: Streak Detection and Astrometric Reduction, prototype implementation, ESA/ESOC, (5/2013 -> 9/2014) ISOOS: Improvements of Space Object Observation Strategies and Processing Techniques through using Silicon-Based Hybrid CMOS Detectors, Project manager and team member, (7/2012 9/2013 ) EuCPAD: European Crew Personal Active Dosemeter, software development for the rack unit, communication and ground support system. (7/2012 ->)

LET: ESA/Solar Orbiter/EPD/LET, Chief FPGA Architect, specification, development and prototyping the processing, control and communication for the instrument, (5/2011 -> 12/2012) SIXS: BepiColombo Solar Intensity X-ray and particle Spectrometer, design and implementation of a FPGA prototype and related control software for the instrument (6/2009 -> 12/2009) Publications: Supervision: The D.Sc. (Tech.) thesis of Säntti was A Co-Processor Approach for Efficient Java Execution in Embedded Systems, University of Turku, 2008. Säntti has published 1 chapter in an edited book, 2 journal articles, 35 international conference publications and 4 national publications. Additionally he has authored 13 documents on the FPGA development for the ESA/Solar Orbiter/EPD/LET project, 18 on the ESA/ISOOS project and 2 on the ESA/StreakDet project. Five selected publications: [1] T. Säntti, J. Tyystjärvi and J. Plosila, Java Co-Processor for Embedded Systems, in Processor Design - System-On-Chip Computing for ASICs and FPGAs. Nurmi, Jari, editor, chapter 13, pages 287-308. Springer, 2007 [2] B. Yang, L. Guang, T. Säntti and J. Plosila, Mapping Multiple Applications with Unbounded and Bounded Number of Cores on Many-Core Networks-on-Chip, In Microprocessors and Microsystems, Elsevier, 2012 [3] J. Tyystjärvi, T. Säntti and J. Plosila, Efficient Execution of Switch Instructions on a Multicore Java Co-Processor System, in Proc. TechPos 2009, Kuala Lumpur, Malaysia, 2009, Won the Best Paper Award [4] T. Säntti, J. Tyystjärvi and J. Plosila, A Novel Hardware Acceleration Scheme for Java Method Calls, in Proc. ISCAS 2008, Seattle, U.S.A., May 2008 [5] T. Säntti, J. Tyystjärvi and J. Plosila, FPGA Prototype of the REALJava Co-Processor, in Proc. SoC 2007, Tampere, Finland, November 2007 Säntti has successfully supervised 1 Ph.D. thesis, 13 M.Sc. theses and 7 B.Sc. theses: - Bo Yang: Towards Optimal Application Mapping for Energy-Efficient Many-Core Platforms, D.Sc.(Tech.), 2013 - Olli Lahdenoja: Distributed System-On-Chip Clocking, M.Sc., 2003 - Amit Ghosh: Design of the Instruction Folding and Decoding Unit of a Java Co-processor / Accelerator in Asynchronous Logic, in co-operation with the Royal Institute of Technology (KTH), Sweden, M.Sc., 2005 - Jouni Pohjola: 8-bit Asynchronous ALU of a Microcontroller, M.Sc., 2007 - Joonas Tyystjärvi: Software Support for Java Co-Processor, M.Sc., 2007 - Babu Chacko: Real-Time Video Filtering and Overlay Character Generation on FPGA, in co-operation with Amrita school of Engineering, India, M.Sc., 2009 - Jussi Hannukainen: FPGA Based Serial Communication Interface Tracer, M.Sc., 2010 - Kimmo Kankare: FPGA Fault Mitigation Techniques for High Radiation Environments, M.Sc., 2011 - Timo Soukka: System Level Design for the Compact Radiation Monitor RADMON, M.Sc., 2012 - Antti Sorsa: Peak Distinguishing FPGA Module for Space-Bound Radiation Detector, M.Sc., 2012 - Mikael Lindroos, The Scientific Datapath of the RADMON Instrument on the Aalto-1 Satellite, M.Sc., 2014

- Matti Määttänen, Communication Methods for the RADMON Instrument on Board the Aalto-1 Satellite, M.Sc., 2014 - Anssi Ilmanen, Soft Error Correcting Configuration Scrubber for the Compact Radiation Monitor Onboard the Aalto-1 satellite, M.Sc., 2014 - Kimmo Kankare: Survey of Java Processors, B.Sc., 2008 - Petri Teräspuro: Runtime Reconfiguration in FGPAs, B.Sc., 2010 - Matti Määttänen: FPGA ja ekologinen tietojenkäsittely, (FPGAs and green computing), B.Sc.,2011 - Robert Eksten: AMD:n ja Intelin moniydinarkkitehtuurien kehityksen vertailua, (Comparing the evolution of multicore processor architectures for AMD and Intel), B.Sc., 2011 - Matti Vähä-Heikkilä: Miehittämättömien Mars-luotaimien prosessorijärjestelmien haasteet ja kehitys, (The Challenges and Evolution of Processor Systems for Unmanned Mars Probes), B.Sc., 2012 - Mika-Petteri Kutila: Triple Modular Redundancy -virheenkorjaustekniikan käyttö FPGA-piirien ajonaikaiseen suojaamiseen avaruuskäytössä, (Using TMR technique to correct errors in FPGAs in space), B.Sc., 2012 - Mika Grönroos: Avaruussäteilyn vaikutukset elektroniikkaan ja suojausmenetelmien käyttö avaruussovelluksissa, (The Effects of Space Radiation on Electronics and Mitigation Methods for Space Applications), B.Sc., 2012 - Jari Vienonen: Matlab Modeling of RADMON Measurement Data And Pulse Recognition Algorithms, M.Sc.,2012 Teaching Experience: Säntti has developed and lectured several courses at the Department of Information Technology in University of Turku, Finland. All of these have been new courses for which he designed the contents and produced all of the related material. - FPGA Prototyping (5 ECTS), 2010, 2011 and 2012 - Embedded Processor Systems (5 ECTS), 2009, 2010 and 2011 - Microprocessor Based Systems (5 ECTS) 2005, 2006, 2007 and 2008 - Embedded Virtual Machines on FPGAs (6 / 3 ECTS), 2007, post-graduate level course. He has also organized two special courses. - Special Course on Floating Point Arithmetics (3 ECTS), 2006 - Special Course on External Funding (2 ECTS), 2006 Besides these, he has been participating in teaching of courses in electronics and related fields since 1998, first at Department of Applied Physics and later at Department of Information Technology, both in University of Turku. Most of these have been demonstrations and exercises. Courses include: Microprocessors, Digital Teaching Media, Analog Electronics II, Design of Electronic Equipment, Analog Electronics I, Multimedia Algorithms, LSI Circuit Design, Circuit Theory I and Basic Electronics. Paper Evaluation: Reviewer for VLSI 2003, ReCoSoC 2006, ASYNC 2006, SAMOS 2007, ICECS 2007, ASYNC 2007, ASYNC 2008 and several other conferences and for the International Journal of Reconfigurable Computing. Positions of Trust: Member of the Department Council at the Department of Information Technology, University of Turku, Finland (1/2009 -> 3/2010). Member of the Editorial Board for the International Journal of Embedded and Real-Time Communication Systems (3/2009 -> ).

Awards: Best Paper Award in IEEE TECHPOS 2009 for Efficient Execution of Switch Instructions on a Multicore Java Co-Processor System