Silicon photonics: a new technology platform to enable low cost and high performance photonics
Outline Silicon Photonics State of the art Silicon Photonics for lab-on-a-chip NanoSilicon photonics Conclusion
Outline Silicon Photonics State of the art Silicon Photonics for lab-on-a-chip NanoSilicon photonics Conclusion
Objective: reduce the cost per single transistor
29 January 1969
vs. Silicon Photonics Silicon Photonics LD,PD, microrings,. Silicon CMOS
Silicon photonics Photonic devices produced within standard silicon factory and with standard silicon processing
Silicon pro s and cons Transparent on 1.3-1.5 μm CMOS compatibility Low cost High index contrast, small footprint No electro-optic effect No detection in 1.3-1.5 μm region High index contrast coupling Lacks efficient light emission
The Opportunity of Silicon Photonics Enormous ($ billions) CMOS infrastructure, process learning, and capacity Draft continued investment in Moore s law Potential to integrate multiple optical devices Micromachining could provide smart packaging Potential to converge computing & communications To obenefit e from this soptca optical wafers ae must run alongside existing product. CMOS PHOTONICS
Cost = paradigm change 200 mm Si wafer has 125,000-0.5 mm sized dies Cost processed CMOS wafers $2,000,000 Cost per die: $16 Laser size: 10x100 microns. Cost per laser: $ 0.064 This is just like estimating the cost of transistors. They are free. Only the PIC cost matters. Emphasis is moved from components to the system
Silicon photonics Basic building blocks
Modulator Because of its crystal structure, silicon is not a useful conventional electro-optic material Because of its indirect bandgap, silicon has no near bandgap nonlinearities Thermo-optical effect is strong but slow The only effect that is left is the free carrier or Drude effect Δn = [ 22 18 0.8 8.8 x10 ΔN + 8.5 x10 ( ΔP) ] [ 8.5 18 18 x 10 Δ N + 6.0 x 10 ( Δ P ) ] Δα = x x R.A. Soref and B.R. Bennett, IEEE JQE 23, 123 (1987)
Photodetection Silicon does not absorb IR well Ge Use hybrid approach Use SiGe or strained Ge Use damaged silicon Si
Ge photodector IEF-LETI
III-V heterogeneous integration for the laser source
III-V heterointegration for the laser source
Where should we integrate the photonics layer?
Options 1
Options 1
This requires Spotsize conversion structures Lateral coupling Vertical coupling fiber φ air g r d e h x y z typically based on inverted tapers typically based on gratings spotsize: ti ~3 µm spotsize: ti ~ 10 µm
Outline Silicon Photonics State of the art Silicon Photonics for lab-on-a-chip NanoSilicon photonics Conclusion
Explosion of silicon photonics
From Building Block Research
To Large scale integration Optical Fiber Multiplexor 25 modulators at 40Gb/s 25 hybrid lasers A future integrated 1 Tb/s optical link on a single silicon chip 46
Silicon Photonic Link 50Gbps Multichip approach Driver 45 nm CMOS Photonic 90 nm CMOS
Outline Silicon Photonics State of the art Silicon Photonics for lab-on-a-chip NanoSilicon photonics Conclusion
Nanosilicon photonics: a platform where silicon nanoclusters enable new functionalities in silicon photonics
Silicon Nanophotonics Confine carriers on nanoscale dimensions Confine photons on nanoscale dimensions 10 μm
Silicon quantum dots 50 nm
Silicon quantum dots E c-si g Bulk Silicon: Indirect band-gap inefficient light emitter Nanocrystalline-Si: Direct-gap due to QCE Strong visible light emission
Purcel effect
Integration of microdisk with a waveguide
photonics ELectronics functional CEIVER RANSC all SILICON TR THE Integration on CMOS CMOS capacitor based on Si-NC gate 25/02/2010 59 Marconi, Anopchenko
photonics ELectronics functional CON TR RANSC CEIVER THE all SILI Light Integration Emitting on Proprieties CMOS Luminescent Region Forward Bias Reverse Bias -5 V Poly p-type Si substrate n-type Al
photonics ELectronics functional Integration on CMOS 2 ) (μw / cm 2 1 (2 nm SiO 2 / 3 nm SRO) Graded energy gap (2 nm SiO 2 / 4 nm SRO) p-type silicon wafer + - Active Si-NC n-type poly- silicon 100 nm O ptical pow wer density 0.1 0.01 ficiency (%) Power eff 0.2 0.1 0.0 10-3 10-2 10-1 1 Current density (ma / cm 2 ) 10-3 10-2 10-1 1 10 1 Current density (ma / cm 2 )
photonics ELectronics functional CON TR RANSC CEIVER all SILI THE Integration on CMOS Forward Bias Reverse Bias Poly p-type Si substrate n-type Al Detection Region 25/02/2010
photonics ELectronics functional Integration on CMOS TTL in TTL out 25/02/2010 63 Marconi
All optical switching with silicon nanocrystals n=n 0 +n 2 I α=α 0 +β I ( )( ) T = 1 2ξ 1 ξ 1 cosδϕ
Comparison to other nonlinear materials Silica n 2 = (1.54x10-16 ) cm 2 /W [3,4] Bulk Silicon n 2 = (4.5x10-14 ) cm 2 /W [3,4] GaAs n 2 = (1.59x10-13 ) cm 2 /W [5] Si-ncs n 2 = (2 8x10-13 ) cm 2 /W [present work] [3] Handbook of Nonlinear Optics [4] Adair R. et al., Physical Review B, 39, 3337, (February 1989). [5] [] M. Dinu et al., Applied Physics Letters, 82, 2954 (2003).
All optical switching Si nanocrystals activated slot waveguides A. Martinez et al. Nanoletters (2010)
A. Martinez et al. Nanoletters (2010)
Improved photovoltaic efficiency by applying novel effects at the limits of light-matter interaction
Improved photovoltaic efficiency by applying novel effects at the limits of light-matter interaction Photon electron energy conversion 32.9% Unabsorbed energy loss 18.7% Heat loss 46.8% Other losses 1.6%
Improved photovoltaic efficiency by applying novel effects at the limits of light-matter interaction
Improved photovoltaic efficiency by applying novel effects at the limits of light-matter interaction Secondary carrier generation Ryan, Anopchenko, Marconi APP FBK
Improved photovoltaic efficiency by applying novel effects at the limits of light-matter interaction Silicon nanocrystals Ryan, Anopchenko, Marconi APP FBK
Improved photovoltaic efficiency by applying novel effects at the limits of light-matter interaction Ryan, Anopchenko, Marconi APP FBK
Optica al function 1.0 0.8 0.6 0.4 0.2 T SRO R SRO A SRO (b) PDS-2 PR PR PR ARC Δη INT 0.0 400 500 600 700 Wavelength (nm) 0.3 0.2 0.1 0.0 nsivity (A/W) ciency enha ncement Photorespon uantum effic P Internal qu A maximum enhancement of the internal quantum efficiency of 14%
Improve photovoltaic efficiency by applying novel effects at the limits of light-matter interaction Secondary carrier generation Ryan, Anopchenko, Marconi APP FBK - Minhaz
Cross section of the device Al (1%Si) 500 nm Al (1%Si) 500 nm LOCOS 500 nm SiO 2 (TEOS) 120 nm LPCVD Si 3 N 4 50 nm n-type Poly-Si 30 nm Si-rich Oxide 50 nm P-type Si substrate LOCOS 500 nm Al (1%Si) 500 nm Device area = 320 μm X 320 μm Ryan, Anopchenko, Marconi APP FBK - Minhaz
Cross section of the device Al (1%Si) 500 nm Al (1%Si) 500 nm LOCOS 500 nm SiO 2 (TEOS) 120 nm LPCVD Si 3 N 4 50 nm n-type Poly-Si 30 nm Si-rich Oxide 50 nm LOCOS 500 nm absorption P-type Si substrate Al (1%Si) 500 nm Device area = 320 μm X 320 μm Ryan, Anopchenko, Marconi APP FBK - Minhaz
Cross section of the device Al (1%Si) 500 nm Al (1%Si) 500 nm SiO 2 (TEOS) 120 nm LOCOS 500 nm multiplication LPCVD Si 3 N 4 50 nm n-type Poly-Si 30 nm Si-rich Oxide 50 nm LOCOS 500 nm absorption P-type Si substrate Al (1%Si) 500 nm Device area = 320 μm X 320 μm Ryan, Anopchenko, Marconi APP FBK - Minhaz
IR response in Γ3N Photo-cu urrent (I - I ) (m ma) L D 10 1.0 0.5 00 0.0-0.5-1.0 10-1.5-2.0 20 > 1200 nm -5-4 -3-2 -1 0 Applied Bias(V)
IR response in Γ3N Photo-cu urrent (I - I ) (m ma) L D 10 1.0 0.5 00 0.0-0.5-1.0 10-1.5-2.0 20 > 1200 nm 633 nm 488 nm V oc = 500 mv -5-4 -3-2 -1 0 Applied Bias(V)
IR response in Γ3N rrent (I - I ) (m ma) L D Ph hoto-cu 10 1.0 0.5 00 0.0-0.5-1.0 10-1.5-2.0 20 > 1200 nm V oc = 500 mv 633 nm + 1200 nm 488 nm + 1200 nm -5-4 -3-2 -1 0 Applied Bias(V)
IR response in Γ3N rrent (I - I ) (m ma) L D Ph hoto-cu 10 1.0 0.5 00 0.0-0.5-1.0 10-1.5-2.0 20 > 1200 nm V oc = 500 mv 633 nm + 1200 nm 10 % 488 nm + 1200 nm -5-4 -3-2 -1 0 Applied Bias(V)
Solar cell with an internal gain mechanism Secondary carrier generation e Ryan, Anopchenko, Marconi APP FBK - Minhaz
Outline Silicon Photonics State of the art Silicon Photonics for lab-on-a-chip NanoSilicon photonics Conclusion
Conclusions: Silicon photonics is a mature technology Silicon photonics allows fabricating thousands of photonic components in a single chip Silicon photonics merges electronics and photonics to enable novel functionalities Silicon photonics is not only bulk Silicon (nanosilicon, strained silicon, silicon/germanium, germanium,.) Silicon photonics is not only optical communication is much more
Bottom line: Each time the market catches size Silicon is the solution If you may want to compete with silicon, do not! Silicon will always make it
Acknowledgments EC: Helios, LIMA, Wadimos, Positive PAT: Gopsi, Naomi MAE: Italy-turkey, mexico, romania HCSC project and OptoI ITPAR
Acknowledgments