Greetings from Georgia Tech PRC

Greetings from Georgia Tech PRC System Scaling A New Fundamental Electronics Frontier Technology MEPTEC - November 10, 2015 Prof. Rao R. Tummala Joseph M. Pettit Endowed Chair Professor in ECE & MSE Director, 3D Microsystems Packaging Research Center Georgia Institute of Technology Atlanta, GA USA rao.tummala@prc.gatech.edu

Executive Summary System Scaling is a New Strategic Frontier Fundamentals of System Scaling Benefits all Systems Ultra-thin & Large Panel Glass Seems Best as System Scaling Platform Panel Glass Superior over Si and Organic Interposers Over Si for cost & performance Over Organic for I/Os, bandwidth and warpage Georgia Tech and its Industry Partners Demonstrated Panel Glass, Almost Ready for Mfg. Panel Glass can be Chip-first or Chip-last Platform System Scaling Leads to 3D System Package Architecture with TSV-like Vias at System Level 1 MEPTEC 2015 Prof. Rao R. Tummala

Outline 1. What is System Scaling and Why? 2. Fundamentals of System Scaling 3. Applications of System Scaling: Smartphones Automotive Electronics 4. Georgia Tech s Vision, Strategy and Industry Consortium in Automotive Electronics 5. Summary 2 MEPTEC 2015 Prof. Rao R. Tummala

Outline 1. What is System Scaling and Why? 2. Fundamentals of System Scaling 3. Application to Automotive Electronics 4. Georgia Tech s Vision, Strategy and Industry Consortium in Automotive Electronics 5. Summary 3 MEPTEC 2015 Prof. Rao R. Tummala

What is System Scaling and Why? 1. What is System Scaling? Transistor- Based System- Based Logic Memory RF ICs Analog Power Etc. 2. Why System Scaling? Substrates Boards Passive Components Thermal Interconnections Batteries To achieve highest performance & functional density in smallest size at lowest cost and highest reliability at system level 4 MEPTEC 2015 Prof. Rao R. Tummala

System Scaling Addresses Changing Electronics Landscape Bulky, costly, and low I/Os and high thickness No systematic roadmap approach Systems Pkg. Systems Emerging trend to small to ultra-small systems with heterogeneous functionality New era of automotive electronics, ultimate heterogeneous systems Bulky, costly, and low I/Os and high thickness Trend to fanout pkg. Device Pkg. ICs IC integration beyond 14nm: No cost reduction SOC split necessary in future 5 MEPTEC 2015 Prof. Rao R. Tummala

IC and System Packaging Evolution Panel Packaging Plastic Ceramic Organic??? Wafer Packaging WLP WLFO Panel Fan Out??? Package on Board Systems Packaging Interposer on Package on Board??? 6 MEPTEC 2015 Prof. Rao R. Tummala

An example of System Scaling Need: Smartphones Wireless Electronics Sensor Electronics Camera Electronics 4G-5G RF / mm-wave Digital Electronics MEMS and Sensors Analog Electronics Power Electronics All are Applicable to Automotive Electronics 7 MEPTEC 2015 Prof. Rao R. Tummala

An Example of Large System Need: New Era Automotive Electronics Ultimate Heterogeneous System Scaling Opportunity Smartphone Electronics Digital, RF, Power, MEMS and sensors, camera, audio and video And High energy-density batteries High-power electronics High-frequency electronics High-temperature electronics Sensor electronics Radar electronics Laser electronics 8 MEPTEC 2015 Prof. Rao R. Tummala

Node dimension (nm) bump pitch(um) Gap in System Scaling vs. Transistor Scaling 10,000 System Scaling (I/O Pitch) 1,000 1,000 100 100 Transistor Scaling (Node) Gap 0 1960 1970 1980 1990 2000 2010 2020 Year 10 Courtesy: S.S. Iyer, IBM 9 MEPTEC 2015 Prof. Rao R. Tummala

Fundamentals of System Scaling 7. High Throughput Panel Mfg. 1. Ultra-thin High-temp. Low CTE Substrates 6. High-temp & High-power Cu-Cu Interconnects System Scaling 2. Ultra-short TSV-like Interconnects 5. Balanced Fine-pitch RDL 4. Ultra-low Loss System Materials 3. High Heat Transfer 11 MEPTEC 2015 Prof. Rao R. Tummala

What is System Scaling Platform? Ultra-thin Panel Glass with Ultra-fine Pitch TPV & RDL Characteristic Electrical Physical Thermal Ideal Properties High resistivity Low loss and low k Smooth surface finish Large area availability Ultra thin High Conductivity Materials Glass SC Si Poly Si Organic Metal Ceramic Mechanical Chemical TPV and RDL Cost Reliability Cost/mm 2 High strength & modulus Low warpage Resistance to process chemicals Low cost Via formation and metallization CTE matched to Si and PWB At 25µm I/O pitch Good Fair Poor 12 MEPTEC 2015 Prof. Rao R. Tummala

Two Platform Approaches Chip-Last Chip-First 13 MEPTEC 2015 Prof. Rao R. Tummala

Why Panel Fan Out at GT? 1 st Gen Wafer Fan Out 2 nd Gen Organic Panel Fan Out 3 rd Gen R&D Inorganic Panel Fan Out Challenges in Fan Out Cost Board-level reliability Molding compound-driven issues Ground rules and pitch Package thickness Warpage Dimensional stability Thermal & repairability 14 MEPTEC 2015 Prof. Rao R. Tummala

Objectives of GPF GT Program Improved Ground Rules and Pitch Ultra-thin Without Grinding Embedding for Low Cost Components Chip Last (Chip Exposed) for Expensive Components High-temp, Thermally Stable Package Panel-scalable for Low Cost Improved Board-level Reliability 15 MEPTEC 2015 Prof. Rao R. Tummala

Two Approaches to Glass Panel Fan Out Chip First for Lower Profile & Bump-less Structure without molding compound Glass Via Landing 16 MEPTEC 2015 Prof. Rao R. Tummala

Chip-Last For Higher Value Chips to Prevent Die Loss ubump or bumpless Bonding Glass Glass * Patent Pending 17 MEPTEC 2015 Prof. Rao R. Tummala

Through Vias like TSVs High Density on Ultra-thin Large Panels Leading to Low Cost Sputtered Seed Direct Metallization of TPV in Glass by Asahi Discharge and Corning Methods Demonstrated >1000 TCT Reliability of Cu-Filled TPVs 120 30µm Dia TPV in 100µm Thin Glass by Corning 110 100 90 80 2µm Cu Wiring 70 60 2005 Cyc 1044 Cyc 501 Cyc 332 Cyc after reflow initial 18 MEPTEC 2015 Prof. Rao R. Tummala

Glass Panel is Almost Ready for Mfg. Lower cost and higher performance than Si Higher performance and Higher Bandwidth than Organic interposers 19 MEPTEC 2015 Prof. Rao R. Tummala

35.0mm Shinko & Unimicron, GT Partners Demonstrate Glass Interposer, Ready for Mfg. Memory Logic Si Chips Glass Interposer Glass Interposer Design Small Die Small Die Large Die 配線層がZ 方向へ変動し熱膨張を吸収 Laminated Substrate 2µm Wirings Small Die Small Die Fully Assembled Glass Interposer TGV 2µm Line 35.0mm Wiring: 2/2µm # of 2µm Lines : 6,600/unit # of TGVs : 18,945 Die Size Large : 24 x 20mm Small : 5.5 x 7.3mm L/S : 2µm / 2µm # of 2µm Line : 6,600/unit Source: Shinko 20 MEPTEC 2015 Prof. Rao R. Tummala

Glass Interposer from Glass Panel by Shinko Shinko Panel 250mm x 250mm 21 MEPTEC 2015 Prof. Rao R. Tummala

Component Scaling to Nanoscale @ GT PRC Antennas Batteries Filters and Diplexers System Scaling to Nanoscale @GT PRC Wireless Power EMI Shields Power Inductors & Capacitors 22 MEPTEC 2015 Prof. Rao R. Tummala

GT PRC Industry Consortia 23 MEPTEC 2015 Prof. Rao R. Tummala

New Era of Automotive Electronics Market: 80M Cars x $10K Ultimate System Scaling Opportunity Smartphone Electronics Digital, RF, Power, MEMS and sensors, camera, audio and video Automotive Electronics High-density batteries High power electronics High-temperature electronics Sensor electronics Radar electronics Laser Electronics Photonics 25 MEPTEC 2015 Prof. Rao R. Tummala

Higher Levels of Driving Automation call for an Increasing Number of Sensors 26 MEPTEC 2015 Prof. Rao R. Tummala Source: Infineon

Semiconductor Enables Innovation to Achieve the Necessary Function as well as the Required Cost 27 MEPTEC 2015 Prof. Rao R. Tummala Source: Infineon

System Cost for Radar Have Been Significantly Reduced with Innovative Packaging and SiGe/CMOS 28 MEPTEC 2015 Prof. Rao R. Tummala Source: Infineon

Integrated functions o Infotaiment (Apple CarPlay, Android) Phone, music, maps, messages, email Major manufacturers committed to CarPlay GTAE Strategy Autonomous Driving Electric Vehicles Connectivity and Safety Dedicated short-range communications (DSRC) V2V and V2I communications 30 MEPTEC 2015 Prof. Rao R. Tummala

Core Technologies of GTAE @GT Design I&A Materials Components Processes Devices 31 MEPTEC 2015 Prof. Rao R. Tummala

GTAE System Integration Strategy C&C Modules System Reliability and Test Sensor Modules Mixed Function Integration GaN and Sic Power Modules High-temp Modules 32 MEPTEC 2015 Prof. Rao R. Tummala

Large-scale Industry Collaboration Industry Partners On-campus Engineers Supply Chain Manufacturers Supply tools Users Academic Faculty Research Faculty State-of-the- Art Laboratories Admin, Financial & Facilities Maintenance Graduate Students 33 MEPTEC 2015 Prof. Rao R. Tummala

GT Faculty Expertise in GTAE Industry Partners On-campus Engineers Supply Chain Developers Users Manufacturers Academic Faculty Research Faculty Prof. Antoniou Materials Prof. Brand MEMS & Sensors Dr. Casinovi MEMS & Sensors State-of-the- Art Laboratories Graduate Students Prof. Chang Optical Prof. Cressler Devices Prof. Divan Power Prof. Dupuis Devices Admin, Financial & Facilities Maintenance Prof. Graham Thermal Prof. Hesketh Sensors Prof. Joshi Thermal Prof. Leamy Reliability Prof. Ougazzaden MEMS & Sensors Prof. Saeedifard Reliability Prof. Shen Devices Prof. Sitaraman Prof. Swaminathan Mechanical Design RF Prof. Tummala System Integration Prof. Wolter MEMS & Sensors Prof. Wong Materials 34 MEPTEC 2015 Prof. Rao R. Tummala

Computing & Communication Electronics C1:Digital Lowest power per unit of bandwidth C2:Photonic Low power, low loss optical C3: mm-wave 5G & RADAR Glass Module Ring Resonators for mm-wave 2.5D Glass Interposer Pkg 30 um Low loss optical via in glass 3D Glass Interposer Package C4: RF Multi-band 3D Packages Mini optical transceiver module C5: IPDs EMI filters, built-in ESD Low loss up to 50GHz & Beyond C6: Shielding Integrated internal/external LTE module with High Q passives 30um Thin Glass Panel Interposer Board-level reliability Ultra-Thin Low Loss Diplexers Nano-Magnetic Ultra-Thin Shields 35 MEPTEC 2015 Prof. Rao R. Tummala

Sensing Electronics S1: Miniaturized wireless sensor interface S2: 3D Sensor Array Packaging S3: Vibration Sensing, Monitoring S4: 3D Glass Package for Image Sensors 36 MEPTEC 2015 Prof. Rao R. Tummala

High-temperature Electronics T1. High-temp/High-power Inductors & Capacitors Capacitors and inductors and their integration in 3D IPDs to handle 1 W/mm 3 power at 200-250 C T3. High-temp & High-power Interconnections T2. High-temp Encapsulants & Mold Compounds Meet thermal, mechanical, electrical, and humidity requirements; compatible with standard molding manufacturing infrastructure T4. High-Temperature Substrates High-temp Cu interconnections; porous copper layers for lowtemp all-cu interconnections High-temperature substrates with glass core, build-up layers and Cu interconnections 37 MEPTEC 2015 Prof. Rao R. Tummala

High-power Electronics P1: 3D Integrated Gate Driver Glass Package P2: Integrated Power Module (1-100kW) Drivers and condition monitoring actives and passives integrated on ultra-thin, high-density, high-temperature glass substrates P3:Self-Contained Liquid-cooled Module Integrated power and microelectronics, low pkg inductance, CTE-matched pkg, modular design, integrated cooling P4: Reliability Monitoring of Smart Power Modules HAADF image (white=cu, Black = Carbon) Local heat spreading from individual sources, heat dissipation at module level with module co-design for thermal management Reliability of high-temp., WBG fully-integrated power modules: failure modes, reliability testing, and monitoring 38 MEPTEC 2015 Prof. Rao R. Tummala

Summary System components and integration are fundamental barriers to all heterogeneous systems including small and automotive electronic systems Georgia Tech sees a need for Systematic system scaling approach like ITRS With a System Scaling 3D architecture Georgia Tech proposes system scaling to develop and integrate heterogeneous system functions: digital, RF, mm-wave, sensors, radar, laser and power components It proposes 3D system package architecture with finepitch small TPVs for signal and large vias for power 40 MEPTEC 2015 Prof. Rao R. Tummala

Thank you rao.tummala@ece.gatech.edu +1 404 894-9097 Prof. Rao R. Tummala Joseph M. Pettit Endowed Chair Professor in ECE & MSE Director, 3D Microsystems Packaging Research Center Georgia Institute of Technology Atlanta, GA USA rao.tummala@prc.gatech.edu