POWER FORUM, BOLOGNA

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1 POWER FORUM, BOLOGNA Convertitori DC/DC ad alta densità di potenza e bassa impedenza termica. Massimo GAVIOLI. Senior Field Application Engineer. Intersil SIMPLY SMARTER

2 Challenges when Designing a Point of Load Supply DC BusVoltage Designing a POL supply with PWM Controllers Pick a controller with the right driver current Schematic Design Main Stage components selection for required efficiency MOSFETs, Inductors Control design Calculations and component selection for loop compensation, SS, POR Layout Design Placement of main stage components to optimize trace for noise, efficiency and reliability Control circuit layout complications regarding noise Thermal flow considerations Cost Input Filter Engineering design and redesign cost Component procurement & Time PWM Control Driver F E T s Output F Filter up /CPU FPGA/ASIC Memory Load 2

3 Intersil s Proposal to SIMPLIFY Power Design Offer its customers a highly integrated power solution PWM Controller, Power FETs, Inductor, Compensation Components Differentiation by using Intersil s leading power technology Efficiency >90% Latest power management features (Freq. Sync, Current Sharing, etc) Family of modules for changing designs (Pin-for-Pin compatibility) Single or dual output. Analog or Digital control looptechnology QFN package technology - designed specifically to enhance the power modules solution Provide designers with a Quick Time To Market Power Solution 3

4 What is Power Module? Power Module A Complete DC-DC Converter System C IN C OUT Easy Design and quick time to market are more important than ever; High power density and small form factor; Good thermal performance and easy for the thermal cooling management. 4

5 Package Challenges -- Thermal Performance Large power dissipations in a small package -- Integration Integrate more components and realize more functions -- Cost Low cost with more competitors Heat sink Module 5.6W power loss In a 15x15x3mm package Integrate all components to be a complete DC-DC converter system More competitors 5

6 Package development -- Current power module package technologies; -- Intersil s Hi-Density Array (HDA) technology; -- HDA power module evaluations; -- Package conclusions. 6

7 Current Power Module Package Technologies SIMPLY SMARTER

8 Land Grid Array (LGA) Package Technology LGA Package Inductor MOSFET Molding Controller R/C Copper Printed Circuit Board Heat Thermal conductivity: Substrate core material ~3W/m.K << Copper thermal conductivity ~400W/m.K Package and Footprint Cons: -- Substrate core material (i.e. FR4/FR5, BT) has the low thermal conductivity material; -- The substrate acts a heat-blocking layer and leads to the poor thermal performance; -- Substrate cost is high. Pros: -- The wire routing capability is good; -- Accurate control on the trace width and trace clearance. Poor thermal performance and High cost, Good integration 8

9 Quad-Flat No-lead (QFN) Package Technology QFN Package Inductor Molding Monolithic IC Metal Lead Frame R/C Cons: Full copper layer Package and Footprint -- Poor routing capability and limited component placement; -- Poor trace accuracy and clearance and only good for large component placement; -- Poor footprints and hard for the customer use; -- Typical single monolithic IC solution limits the current capability. Pros: -- Good thermal performance; -- Low cost. Poor Integration, low cost and good thermal performance. 9

10 Quad-Flat No-lead (QFN) Package Technology QFN with Internal PCB Inductor Molding Controller MOSFET PCB Metal Lead Frame R/C Internal PCB Package and Footprint Cons: -- Poor routing capability between the power components and the internal PCB; -- Added Internal PCB leads to a large package; -- High cost. Pros: -- Good thermal performance; -- Clean footprints for customers. High cost, good thermal performance and acceptable integration. 10

11 Hi-Density Array (HDA) Technology SIMPLY SMARTER

12 History of HDA Technology Early stage of HDA technology: -- Single chip package only; -- Epoxy Die attachment; -- No large passive components; -- Total package height is limited <1mm. 9X9mm QFN 64L 5x5mm HDA 1 st company: Intersil Intersil s HDA technology: 9x9 QFN -- Integrate more than 20 components in one package; -- Solder Die attachment; -- Integrate 7x7mm large passive components; -- Integrate packaged discrete ICs; -- Total package height up to 7mm. 5x5 HDA 12

13 HDA Assembly Process 1. Metal Frame 5. Wirebond 2. Partial Etch 6. Encapsulation 3. Selective Plate 4. Die Attach 7. Etchback -- Two-side etching allows for the more trace routing capability; -- Backside solder mask allows for covering the unneeded traces and pads, leading to the clean footprints. 13

14 Intersil HDA Power Module Design Intersil HDA Power Module Molding Inductor MOSFET Controller R/C HLA Lead Frame Controller Solder Mask Copper layer Solder mask Inductor L1 MOSFET Q1 Diode D1 Exposed pads Top View Bottom View Integrate 3 bare dies, 1 inductor(7x7mm) and 18 passives. 14

15 Intersil HDA Power Module Assembly Process Layout design Top-side etching Component assembly Top marking Back-side solder mask Molding and back-side etching 15

16 HDA Power Module Evaluations SIMPLY SMARTER

17 Efficiency Intersil HDA Power Module HDA Technology Test Vehicle 15mm 4mm 15mm Top View Bottom View ISL HDA Technology Test Vehicle: Input: 10V-75V; Output: 1.2V-30V at 5A; Standard Buck converter; Package size: 15mm x 15mm x 4mm. Load Current (A) 17

18 Thermal Comparison Intersil HDA module LGA power module Package size: 15x15x4mm Package size: 15x15x4.25mm 24Vin to 12Vout at 4.5A Power loss: 4.1W 24Vin to 12Vout at 4A Power loss: 4.1W Test Conditions: -- Same board size: 3x3 inches; -- Same board copper weight: 2-ounce copper; -- Similar circuit topology: DC-DC Buck converter 18

19 Thermal Images Conditions: -- Room temperature; -- No air flow; -- Same power loss: 4.1W. MAX Temperature: 64.1 o C Q1 8.7 o C lower MAX Temperature: 72.8 o C L1 Q2 L1 D1 Q1 Intersil HDA module LGA power module -- The power component area of HDA is smaller than LGA module; -- HDA MAX temperature is 8.7 o C lower than LGA module; -- The HDA package thermal resistance is 2.12 o C/W less than LGA package. 19

20 Cost Comparisons Cost (US$) $1.1 $1.0 $0.75 $0.80 Package Type The cost estimations are based on 15X15mm package size; -- It includes the material and assembly cost associated with the module package only. HDA package has the low cost, similar to QFN package.

21 Comparisons to Other Packaging Technologies Inductor Molding MOSFET Controller HLA Lead Frame Solder Mask R/C Footprint -- Good thermal performance; -- Acceptable routing and component placement capability; -- Good trace accuracy and clearance; -- Clean footprints for customers; -- Low cost. 21

22 Package conclusions -- Intersil is the 1 st company to develop the HDA technology for power module applications; -- The developed HDA power module shows good integrations, including 3 bare dies, 1 inductor and 18 passives; -- Cost comparisons show that HDA module package has the low cost similar to QFN package; -- The thermal experiment shows that the HDA module has the 2.2 o C/W thermal resistance reduction compared to LGA package; -- The HDA power module has better thermal performance, low cost package and acceptable integration capability. 22

23 Power module current product portfolio Vin Range (V) Output Voltage (V) Output Current (A) Current Sharing SYNC Temp Range (C) Output N Loop Tecnology Peack Efficency Package Availability Y Y -40 / Analog 93% QFN 15x15x2,2 NOW Y Y -55 / Analog 94 % QFN 15x15x2,2 NOW , 6, 10 N N -40 / Analog 95 % QFN 15x15x3,5 NOW , 17 Y Y -40 / Digital 95% QFN 15x15x3,5 NOW X 15 Y Y -40 / Analog 95% QFN 15x15x7.5 NOW N Y -40 / Analog 93 % HDA 15x15x4 Q1/

24 isim Intersil s Virtual Evaluation Platform Evaluation board. SIMPLY SMARTER

25 Benefits of the isim Simulator for Power Modules Transient analysis SIMPLIS is a component level simulator like SPICE but simulates power switching circuits typically 10 to 50 times faster. Small signal AC analysis This analysis mode emulates a frequency sweep measurement producing accurate gain and phase plots without having to derive averaged models. 25

26 Eval Board for device evaluation 26

27

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