MCR8B, MCR8M Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors PNPN devices designed for line powered consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in surface mount package for use in automated manufacturing. Features Sensitive Gate Trigger Current Blocking Voltage to 6 V Glass Passivated Surface for Reliability and Uniformity Surface Mount Package These Devices are PbFree and are RoHS Compliant MAXIMUM RATINGS (T J = 25 C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive OffState Voltage (Note 1) (Sine Wave, R GK = 1 k T J = 25 to 1 C) MCR8B MCR8M On-State Current RMS (All Conduction Angles; T C = 8 C) Peak Non-repetitive Surge Current (1/2 Cycle Sine Wave, 6 Hz, T C = 25 C) V DRM, V RRM 2 6 V I T(RMS).8 A I TSM 8. A Circuit Fusing Considerations (t = 8.3 ms) I 2 t.4 A 2 s Forward Peak Gate Power (T C = 8 C, t = s) Average Gate Power (T C = 8 C, t = 8.3 ms) P GM W P G(AV).1 W Operating Junction Temperature Range T J 4 to +1 C Storage Temperature Range T stg 4 to +1 C THERMAL CHARACTERISTICS Rating Symbol Value Unit Thermal Resistance, JunctiontoAmbient PCB Mounted per Figure 1 Thermal Resistance, JunctiontoTab Measured on Anode Tab Adjacent to Epoxy Maximum Device Temperature for Soldering Purposes (for Seconds Maximum) R JA 156 C/W R JT 25 C/W T L 26 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. V DRM and V RRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant source such that the voltage ratings of the devices are exceeded. 1 1 2 3 SCRs.8 AMPERES RMS 2 thru 6 VOLTS A SOT223 CASE 318E STYLE ORDERING INFORMATION Device Package Shipping G PIN ASSIGNMENT Cathode Anode Gate 4 Anode MCR8BT1G MCR8MT1G SOT223 (PbFree) SOT223 (PbFree) K /Tape &Reel /Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. 1 MARKING DIAGRAM AYW CR8x CR8x = Device Code x = B or M A = Assembly Location Y = Year W = Work Week =PbFree Package (Note: Microdot may be in either location) Semiconductor Components Industries, LLC, 213 October, 213 Rev. 7 1 Publication Order Number: MCR8BT1/D
MCR8B, MCR8M ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (Note 3) (V AK = Rated V DRM or V RRM, R GK = 1 k T J = 25 C T J = 1 C I DRM, I RRM ON CHARACTERISTICS Peak Forward On-State Voltage (Note 2) (I T = A Peak) V TM 1.7 V Gate Trigger Current (Continuous ) (Note 4) (, R L = ) I GT 2 A Holding Current (Note 3) (, Initiating Current = 2 ma) I H 5. ma Gate Trigger Voltage (Continuous ) (Note 4) (, R L = ) V GT.8 V TurnOn Time (, I TM = 5 A, I GT = 5 ma) t gt 1.25 s DYNAMIC CHARACTERISTICS Critical Rate-of-Rise of Off State Voltage (V pk = Rated V DRM, T C = 1 C, R GK = 1 k, Exponential Method) 2. Pulse Test: Pulse Width 3 s, Duty Cycle 2%. 3. R GK = is included in measurement. 4. R GK is not included in measurement. dv/dt 2 A A V/ s Symbol V DRM I DRM V RRM I RRM V TM I H Parameter Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak On State Voltage Holding Current Voltage Current Characteristic of SCR + Current Anode + V TM on state I I H RRM at V RRM + Voltage.79 2. 5 3.8 Reverse Blocking Region (off state) Reverse Avalanche Region Anode I DRM at V DRM Forward Blocking Region (off state).984 25..79 2..59.91.59.91.59.244 6.2 inches mm.96 2.44.96 2.44.96 2.44.59.59 BOARD MOUNTED VERTICALLY IN CINCH 884 EDGE CONNECTOR. BOARD THICKNESS = 65 MIL., FOIL THICKNESS = 2.5 MIL. MATERIAL: G FIBERGLASS BASE EPOXY.472 12. Figure 1. PCB for Thermal Impedance and Power Testing of SOT-223 2
MCR8B, MCR8M I T, INSTANTANEOUS ON STATE CURRENT (AMPS).1 2. 3. TYPICAL AT T J = 1 C MAX AT T J = 1 C MAX AT T J = 25 C v T, INSTANTANEOUS ON STATE VOLTAGE (VOLTS) 4. R θja, JUNCTION TO AMBIENT THERMAL RESISTANCE, ( C/W) 16 1 14 13 12 1 9 8 7 6 4 3 TYPICAL MAXIMUM DEVICE MOUNTED ON FIGURE 1 AREA = L 2 PCB WITH TAB AREA AS SHOWN MINIMUM FOOTPRINT =.76 cm 2 2. 3. 4. 5. 6. 7. 8. 9. FOIL AREA (cm 2 ) L 4 1 2 3 L Figure 2. On-State Characteristics Figure 3. Junction to Ambient Thermal Resistance versus Copper Tab Area TA, MAXIMUM ALLOWABLE AMBIENT TEMPERATURE ( C) 1 9 8 7 6 4 3 2 = 3 6 9 OR 6 Hz HALFWAVE.2.3 18 12 = CONDUCTION.4 TA, MAXIMUM ALLOWABLE AMBIENT TEMPERATURE ( C) 1 9 8 7 6 4 3 2 = 3 6 = CONDUCTION 9 18.2.3.4 cm 2 FOIL, OR 6 Hz HALFWAVE 12 TA, MAXIMUM ALLOWABLE AMBIENT TEMPERATURE ( C) 1 9 8 7 6 Figure 4. Current Derating, Minimum Pad Size Reference: Ambient Temperature = 3 6 = CONDUCTION 9.2 PAD AREA = 4. cm 2, OR 6 Hz HALFWAVE Figure 6. Current Derating, 2. cm Square Pad Reference: Ambient Temperature.3 18 12.4 T(tab), MAXIMUM ALLOWABLE TAB TEMPERATURE ( C) 1 Figure 5. Current Derating, cm Square Pad Reference: Ambient Temperature = 3 6 = CONDUCTION 85.2 9.3 OR 6 Hz HALFWAVE 18.4 Figure 7. Current Derating Reference: Anode Tab 12 3
I MCR8B, MCR8M MAXIMUM AVERAGE POWER P (AV),DISSIPATION (WATTS).9.8.7.6.4.3.2 = CONDUCTION = 3 6 9 12 18.2.3.4 r T, TRANSIENT THERMAL RESISTANCE NORMALIZED.1.1.1.1 t, TIME (SECONDS) Figure 8. Power Dissipation Figure 9. Thermal Response Device Mounted on Figure 1 Printed Circuit Board V GT, GATE TRIGGER VOLTAGE (VOLTS).7.6.4 R L = I H, HOLDING CURRENT (NORMALIZED) 2. R L = 3. k.3-4 -2 2 4 6 8 1 T J, JUNCTION TEMPERATURE, ( C) Figure. Typical Gate Trigger Voltage versus Junction Temperature -4-2 2 4 6 8 1 T J, JUNCTION TEMPERATURE, ( C) Figure 11. Typical Normalized Holding Current versus Junction Temperature.7 V GT, GATE TRIGGER VOLTAGE (VOLTS).65.6 5.45.4.35 R L = T J = 25 C A) GT, GATE TRIGGER CURRENT ( μ R GK =, RESISTOR CURRENT INCLUDED WITHOUT GATE RESISTOR R L =.3 I GT, GATE TRIGGER CURRENT ( A) -4-2 2 4 6 8 1 T J, JUNCTION TEMPERATURE ( C) Figure 12. Typical Range of V GT versus Measured I GT Figure 13. Typical Gate Trigger Current versus Junction Temperature 4
MCR8B, MCR8M HOLDING CURRENT (ma) I H, I GT = 7 A T J = 25 C I GT = 48 A,, R GK, GATE CATHODE RESISTANCE (OHMS) 5. 125 1 V pk = 4 V,, R GK, GATE CATHODE RESISTANCE (OHMS) 75 T J = 25 Figure 14. Holding Current Range versus Gate-Cathode Resistance Figure 15. Exponential Static dv/dt versus Junction Temperature and Gate-Cathode Termination Resistance 4 V 3 V 2 V V V V T J = 1 C T J = 1 C 4 V (PEAK) R GK = R GK = k 5. 5. R GK, GATE CATHODE RESISTANCE (OHMS),.1 C GK, GATE CATHODE CAPACITANCE (nf) R GK = k Figure 16. Exponential Static dv/dt versus Peak Voltage and Gate-Cathode Termination Resistance Figure 17. Exponential Static dv/dt versus Gate-Cathode Capacitance and Resistance 5. I GT = 7 A I GT = 5 A I GT = 35 A I GT = 15 A,, GATE CATHODE RESISTANCE (OHMS) Figure 18. Exponential Static dv/dt versus Gate-Cathode Termination Resistance and Product Trigger Current Sensitivity 5
MCR8B, MCR8M PACKAGE DIMENSIONS SOT223 (TO261) CASE 318E4 ISSUE L D b1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH..8 (3) H E e1 A1 e 4 1 2 3 b E A L1 C MILLIMETERS DIM MIN NOM MAX MIN A 1. 1.63 1.75.6 A1.2.6..1 b.6.75.89.24 b1 2.9 3.6 3.2 15 c.24.29.35.9 D 6.3 6. 6.7.249 E 3.3 3. 3.7 3 e 2.2 2.4.87 INCHES NOM MAX.64.68.2.4.3.35 21 26.12.14.256.263 38 45.91.94 e1.85.94 5.33.37.41 L1 1. 1.75 2..6.69.78 H E 6.7 7. 7.3.264.276.287 STYLE : PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE SOLDERING FOOTPRINT* 3.8 5 2..79.91.91 6.3.248 2..79.59 SCALE 6:1 mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 USA Phone: 336752175 or 8344386 Toll Free USA/Canada Fax: 336752176 or 83443867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 82829855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 79 29 Japan Customer Focus Center Phone: 8135817 6 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MCR8BT1/D