Digital Integrated Circuit (IC) Layout and Design! EE 134 Winter 05 " Lecture Tu & Thurs. 9:40 11am ENGR2 142 " 2 Lab sections M 2:10pm 5pm ENGR2 128 F 11:10am 2pm ENGR2 128 " NO LAB THIS WEEK " FIRST LAB Friday Jan. 20 EE134 1 People! Lecturer - Roger Lake " Office ENGR2 Rm. 437 " Office hours - MW 4-5pm " rlake@ee.ucr.edu! TA FarukYilmaz " Office ENGR2 Rm. 222 " Office Hours TBD " faruk@ee.ucr.edu EE134 2
EE134 Web-site! http://www.ee.ucr.edu/~rlake/ee134.html " Class lecture notes " Assignments and solutions " Lab and project information " Exams and solutions " Other useful links EE134 3 Class Organization! Homework assignments (10%)! Labs (20%) " Tutorials to learn the Cadence design software! Final Project (50%) " Design a digital circuit (eg. 4 bit adder) " Work in teams of 3! Midterm (20%) EE134 4
Text Book Digital Integrated Circuits: A Design Perspective, 2 nd Ed. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic EE134 Software! Cadence software " Online documentation and tutorials " Sun4 UNIX Workstations EE134 6
What is this book all about?! Introduction to digital integrated circuits. " CMOS devices and manufacturing technology. " CMOS inverters and gates. " Propagation delay, " noise margins, and " power dissipation. " Sequential circuits. Arithmetic, interconnect, and memories.! What will you learn? " Understanding, designing, and optimizing digital circuits with respect to different quality metrics: cost, speed, power dissipation, and reliability EE134 7 Digital Integrated Circuits! Introduction: Issues in digital design! CMOS devices and manufacturing! The CMOS inverter! Combinational logic structures! Propagation delay, noise margins, power! Sequential logic gates; timing! Interconnect: R, L and C! Arithmetic building blocks! Memories and array structures! Design methods EE134 8
EE134 Winter 2006 - Lecture 1! Introduction EE134 9 Introduction! Why is designing digital ICs different today than it was before?! Will it change in future? EE134 10
The First Computer (1832) The Babbage Difference Engine (1832) 25,000 parts cost: 17,470 EE134 11 ENIAC - The first electronic computer (1946) EE134 12
The Transistor Revolution First transistor Bell Labs, 1948 EE134 13 The First Integrated Circuits Bipolar logic 1960 s ECL 3-input Gate Motorola 1966 EE134 14
Intel 4004 Micro-Processor (1971) 1971 2,300 transistors 108 KHz operation EE134 15 Intel Pentium 4 microprocessor (2000) 42 M transistors (217 mm 2 ) 1.5 GHz 0.18 µm 180 nm technology node EE134 16
What Happened over 30 Years? 1971 2000 2,300 transistors 108 KHz operation ~ 15,000 x 42 M transistors 1.5 GHz operation Automotive comparison: SF to NY in 13 seconds. EE134 17 Moore s s Law # In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months. # He made a prediction that semiconductor technology will double its effectiveness every 18 months EE134 18
Moore s s Law LOG 2 OF THE NUMBER OF COMPONENTS PER INTEGRATED FUNCTION 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 Electronics, April 19, 1965. EE134 19 Evolution in Complexity EE134 20
Transistor Counts 1,000,000 K 1 Billion Transistors 100,000 10,000 1,000 100 10 Pentium III Pentium II Pentium Pro i486 Pentium i386 80286 8086 Source: Intel 1 1975 1980 1985 1990 1995 2000 2005 2010 Courtesy, Intel Projected EE134 21 Moore s s law in Microprocessors Transistors (MT) 1000 100 10 1 0.1 0.01 0.001 2X growth in 1.96 years! 386 286 8085 8086 4004 8008 8080 P6 Pentium proc 486 1970 1980 1990 2000 2010 Year Transistors on Lead Microprocessors double every 2 years Courtesy, Intel EE134 22
Die Size Growth 100 Die size (mm) 10 8080 8085 8008 4004 8086 286386 P6 486 Pentium proc ~7% growth per year ~2X growth in 10 years 1 1970 1980 1990 2000 2010 Year Die size grows by 14% to satisfy Moore s Law Courtesy, Intel EE134 23 Frequency Frequency (Mhz) 10000 1000 100 10 1 0.1 8085 8086 8080 8008 4004 Doubles every 2 years P6 Pentium proc 486 386 286 1970 1980 1990 2000 2010 Year Lead Microprocessors frequency doubles every 2 years Courtesy, Intel EE134 24
Power Dissipation 100 Power (Watts) 10 1 8085 8080 8008 4004 8086 286 386 486 P6 Pentium proc 0.1 1971 1974 1978 1985 1992 2000 Year Lead Microprocessors power continues to increase Courtesy, Intel EE134 25 Power will be a major problem Power (Watts) 100000 10000 1000 100 10 1 0.1 8085 8086286 386 486 4004 80088080 Pentium proc 18KW 5KW 1.5KW 500W 1971 1974 1978 1985 1992 2000 2004 2008 Year Power delivery and dissipation will be prohibitive Courtesy, Intel EE134 26
Power density Power Density (W/cm2) 10000 1000 100 10 1 4004 8008 8080 Rocket Nozzle Nuclear Reactor 8086 Hot Plate 8085 286 386 486 P6 Pentium proc 1970 1980 1990 2000 2010 Year Power density too high to keep junctions at low temp Courtesy, Intel EE134 27 Not Only Microprocessors Cell Phone Small Signal RF Power RF Power Management Digital Cellular Market (Phones Shipped) Analog Baseband Digital Baseband (DSP + MCU) Year 1996 1998 2000 2003 2004 2005 2006 2007 2008 Units (M) 48 162 435 513 648 (703) (776) (836) (889) EE134 28
Challenges in Digital Design (# Transistors) 1/(Transistor size) Microscopic Problems Ultra-high speed design Interconnect Noise, Crosstalk Reliability, Manufacturability Power Dissipation Clock distribution. Everything Looks a Little Different? Macroscopic Issues Time-to-Market Millions of Gates High-Level Abstractions Reuse & IP: Portability Predictability etc. and There s a Lot of Them! EE134 29 Productivity Trends 10,000,000 10,000 1,000,000 1,000 100,000 100 10,000 10 1,0001 100 0.1 0.01 10 Logic Tr./Chip Tr./Staff Month. x x x x x x x x 58%/Yr. compounded Complexity growth rate 21%/Yr. compound Productivity growth rate 100,000,000 10,000,000 1,000,000 100,000 10,000 1,0001 100 0.1 0.001 1 10 0.01 1981 1983 1985 1987 1989 1991 1993 1995 Complexity Logic Transistor per Chip (M) Productivity (K) Trans./Staff - Mo. 1997 1999 2001 2003 2005 2007 2009 Source: Sematech Complexity outpaces design productivity Courtesy, ITRS Roadmap EE134 30
Why Scaling?! Technology shrinks by 0.7/generation! With every generation can integrate 2x more functions per chip; chip cost does not increase significantly! Cost of a function decreases by 2x! But " How to design chips with more and more functions? " Design engineering population does not double every two years! Hence, a need for more efficient design methods " Exploit different levels of abstraction EE134 31 Design Abstraction Levels SYSTEM + MODULE GATE CIRCUIT S n+ G DEVICE n+ D EE134 32
Next Class! Introduce basic metrics for design of integrated circuits how to measure delay, power, etc.! Introduction to IC manufacturing and design. EE134 33 EE134 34