SG55 Pulse Width Modulator Control Circuit The SG55 pulse width modulator control circuit offers improved performance and lower external parts count when implemented for controlling all types of switching power supplies. The onchip 5. erence is trimmed to % and the error amplifier has an input commonmode voltage range that includes the reference voltage, thus eliminating the need for external divider resistors. sync input to the oscillator enables multiple units to be slaved or a single unit to be synchronized to an external system clock. wide range of deadtime can be programmed by a single resistor connected between the C T and Discharge pins. This device also features builtin softstart circuitry, requiring only an external timing capacitor. shutdown pin controls both the softstart circuitry and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as softstart recycle with longer shutdown commands. The under voltage lockout inhibits the outputs and the changing of the softstart capacitor when V CC is below nominal. The output stages are totempole design capable of sinking and sourcing in excess of 00 m. The output stage of the SG55 features NOR logic resulting in a low output for an offstate. Features 8.0 V to 5 V Operation 5. V.0% Trimmed Reference 00 Hz to 400 khz Oscillator Range Separate Oscillator Sync Pin djustable Deadtime Control Input Undervoltage Lockout Latching PWM to Prevent Multiple Pulses PulsebyPulse Shutdown Dual Source/Sink Outputs: 400 m Peak PbFree Packages are vailable* 6 6 Inv. Input Noninv. Input Sync OSC. Output PDIP6 N SUFFIX CSE 648 SOIC6L DW SUFFIX CSE 75G 6 = ssembly Location WL = Wafer Lot YY = Year WW = Work Week PIN CONNECTIONS 4 6 6 5 4 MRKING DIGRMS SG55N WLYYWW SG55 WLYYWW V CC Output B V C C T 5 Ground R T 6 Output Discharge 7 0 Shutdown SoftStart 8 9 Compensation (Top View) ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 005 January, 005 Rev. 5 Publication Order Number: SG55/D
SG55 6 5 V CC Ground 4 OSC Output Sync 6 RT 5 CT 7 Discharge 9 Compensation INV. Input Noninv. Input 8 C SoftStart Reference Regulator Error mp Oscillator To Internal Circuitry PWM 50 0 5.0k Shutdown 5.0k S V REF Under Voltage Lockout F/F Latch S R Q Q NOR NOR VC Output 4 Output B SG55 Output Stage Figure. Representative Block Diagram ORDERING INFORMTION Device Package Shipping SG55N PDIP6 5 Units / Rail SG55NG PDIP6 (PbFree) 5 Units / Rail SG55DW SOIC6L 47 Units / Rail SG55DWG SOIC6L (PbFree) 47 Units / Rail SG55DWR SOIC6L 000 Tape & Reel SG55DWRG SOIC6L (PbFree) 000 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D.
SG55 MXIMUM RTINGS Rating Symbol Value Unit Supply Voltage V CC 40 Vdc Collector Supply Voltage V C 40 Vdc Logic Inputs 0. to 5.5 V nalog Inputs 0. to V CC V Output Current, Source or Sink I O ±500 m Reference Output Current I ref 50 m Oscillator Charging Current 5.0 m Power Dissipation T = 5 C (Note ) T C = 5 C (Note ) P D 000 000 Thermal Resistance, Junctiontoir R J 00 C/W Thermal Resistance, JunctiontoCase R JC 60 C/W Operating Junction Temperature T J 50 C Storage Temperature Range T stg 55 to 5 C Lead Temperature (Soldering, 0 seconds) T Solder 00 C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Derate at 0 mw/ C for ambient temperatures above 50 C.. Derate at 6 mw/ C for case temperatures above 5 C. mw RECOMMENDED OPERTING CONDITIONS Characteristics Symbol Min Max Unit Supply Voltage V CC 8.0 5 Vdc Collector Supply Voltage V C 4.5 5 Vdc Output Sink/Source Current (Steady State) (Peak) I O 0 0 Reference Load Current I ref 0 0 m Oscillator Frequency Range f osc 0. 400 khz Oscillator Timing Resistor R T.0 50 k Oscillator Timing Capacitor C T 0.00 0. F Deadtime Resistor Range R D 0 500 Operating mbient Temperature Range T 0 70 C ±00 ±400 m Shutdown Options (See Block Diagram, page ) Since both the compensation and softstart terminals (Pins 9 and 8) have current source pullups, either can readily accept a pulldown signal which only has to sink a maximum of 00 to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins. n alternate approach is the use of the shutdown circuitry of Pin 0 which has been improved to enhance the available shutdown options. ctivating this circuit by applying a positive signal on Pin 0 performs two functions: the PWM PPLICTION INFORMTION latch is immediately set providing the fastest turnoff signal to the outputs; and a 50 current sink begins to discharge the external softstart capacitor. If the shutdown command is short, the PWM signal is terminated without significant discharge of the softstart capacitor, thus, allowing, for example, a convenient implementation of pulsebypulse current limiting. Holding Pin 0 high for a longer duration, however, will ultimately discharge this external capacitor, recycling slow turnon upon release. Pin 0 should not be left floating as noise pickup could conceivably interrupt normal operation.
SG55 ELECTRICL CHRCTERISTICS (V CC = 0 Vdc, T = T low to T high [Note ], unless otherwise noted.) Characteristics Symbol Min Typ Max Unit REFERENCE SECTION Reference Output Voltage (T J = 5 C) 5.00 5.0 5.0 Vdc Line Regulation (8.0 V V CC 5 V) Reg line 0 0 mv Load Regulation (0 m I L 0 m) Reg load 0 50 mv Temperature Stability / T 0 mv Total Output Variation Includes Line and Load Regulation over Temperature 4.95 5.5 Vdc Short Circuit Current ( = 0 V, T J = 5 C) I SC 80 00 m Output Noise Voltage (0 Hz f 0 khz, T J = 5 C) V n 40 00 V rms Long Term Stability (T J = 5 C) (Note 4) S 0 50 mv/khr OSCILLTOR SECTION (Note 5, unless otherwise noted.) Initial ccuracy (T J = 5 C) ±.0 ±6.0 % Frequency Stability with Voltage (8.0 V V CC 5 V) Frequency Stability with Temperature fosc DVCC fosc DT ±.0 ±.0 % ±0. % Minimum Frequency (R T = 50 k, C T = 0. F) f min 50 Hz Maximum Frequency (R T =.0 k, C T =.0 nf) f max 400 khz Current Mirror (I RT =.0 m).7.0. m Clock mplitude.0.5 V Clock Width (T J = 5 C) 0. 0.5.0 s Sync Threshold..0.8 V Sync Input Current (Sync Voltage =.5 V).0.5 m ERROR MPLIFIER SECTION (V CM = 5. V) Input Offset Voltage V IO.0 0 mv Input Bias Current I IB.0 0 Input Offset Current I IO.0 DC Open Loop Gain (R L 0 M ) VOL 60 75 db Low Level Output Voltage V OL 0. 0.5 V High Level Output Voltage V OH.8 5.6 V Common Mode Rejection Ratio (.5 V V CM 5. V) CMRR 60 75 db Power Supply Rejection Ratio (8.0 V V CC 5 V) PSRR 50 60 db PWM COMPRTOR SECTION Minimum Duty Cycle DC min 0 % Maximum Duty Cycle DC max 45 49 % Input Threshold, Zero Duty Cycle (Note 5) V th 0.6 0.9 V Input Threshold, Maximum Duty Cycle (Note 5) V th..6 V Input Bias Current I IB 0.05.0. T low = 0 T high = 70 C 4. Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 5. Tested at f osc = 40 khz (R T =.6 k, C T = 0.0 F, R D = 0 ). 4
SG55 ELECTRICL CHRCTERISTICS (continued) Characteristics Symbol Min Typ Max Unit SOFTSTRT SECTION SoftStart Current (V shutdown = 0 V) 5 50 80 SoftStart Voltage (V shutdown =.0 V) 0.4 0.6 V Shutdown Input Current (V shutdown =.5 V) 0.4.0 m OUTPUT DRIVERS (Each Output, V CC = 0 V) Output Low Level (I sink = 0 m) (I sink = 00 m) Output High Level (I source = 0 m) (I source = 00 m) V OL V OH 8 7 Under Voltage Lockout (V8 and V9 = High) V UL 6.0 7.0 8.0 V Collector Leakage, V C = 5 V (Note 6) I C(leak) 00 Rise Time (C L =.0 nf, T J = 5 C) t r 00 600 ns Fall Time (C L =.0 nf, T J = 5 C) t f 50 00 ns Shutdown Delay (V DS =.0 V, C S = 0, T J = 5 C) t ds 0. 0.5 s Supply Current (V CC = 5 V) I CC 4 0 m 6. pplies to SG55 only, due to polarity of output pulses. 0..0 9 8 0.4.0 V V PWM DJ..0k.0k.5k 0.009 0. 6 Clock 0. 4 Sync RT 6 Deadtime Ramp 7 00 5 0.00 Comp O s c i l l a t o r Reference Regulator Flip/ Flop B 5 4 0. 0. Out.0k,.0W () Out B V CC V C V/I Meter = V IO = () = () 0k 9 0.0 E/ DUT PWM 50 5.0k 5.0k GND 8 Softstart 5.0 F 0.0k Shutdown Figure. Lab Test Fixture 5
SG55 00 500 RT, TIMING RESISTOR (k Ω ) 00 50 0 0 * R D = 0 5.0 6 5 7 R D * R T C T.0.0 5.0 0 0 50 00 00 500 000 000 5000 0,000 CHRGE TIME ( s), DED TIME RESISTOR (М) R D Ω 400 00 00 00 0 0. 0.5.0.0 5.0 0 0 50 00 00 DISCHRGE TIME ( s) Figure. Oscillator Charge Time versus R T Figure 4. Oscillator Discharge Time versus R D VOL, VOLTGE GIN (db) 00 80 60 40 0 0 R Z = 0 k 9 C P R Z Vsat, STURTION VOLTGE (V) 4.0.5.0.5.0.5.0 0.5 V CC = 0 V T J = 5 C Sink Sat, (V OL ) Source Sat, (V C V OH ) 0.0 0 00.0 k 0 k 00 k.0 M 0 M f, FREQUENCY (Hz) 0 0.0 0.0 0.0 0.05 0.07 0. 0. 0. 0.5 0.7.0 I O, OUTPUT SOURCE OR SINK CURRENT () Figure 5. Error mplifier Open Loop Frequency Response Figure 6. Output Saturation Characteristics 6 Q Q5 Q8 7.4k 5 V CC Q R T 6 C T 5 Sync 7 Discharge Q GND Q Q6 Q9.0k 4k.0k Q0 Q 5.0pF Q4 400 k Q7.0k Q.0k 5k Q4 Ramp To PWM Blanking To Output Q.0k 50 4 OSC Output Inverting Q Input Noninverting Input 00 Q 00 Q4 5.8V 9 0 To PWM Comparator Compensation Figure 7. Oscillator Schematic Figure 8. Error mplifier Schematic 6
SG55 Q5 V CC Q7 Q9 Q0 V C Q4 5.0k Q6 Q8 Q.0k, 4 Output Q Q Q Q6 Omitted in SG57 5.0k 0k 0k Clock F/F PWM Figure 9. Output Circuit (/ Circuit Shown) V supply Q To Output Filter V supply R R R V C SG55 B GND 4 V C SG55 B GND 4 C R C R Q Q T For singleended supplies, the driver outputs are grounded. The V C terminal is switched to ground by the totempole source transistors on alternate oscillator cycles. Figure 0. SingleEnded Supply In conventional pushpull bipolar designs, forward base drive is controlled by RR. Rapid turnoff times for the power devices are achieved with speedup capacitors C and C. Figure. PushPull Configuration V supply R V C Q T V supply V C T Q R T C SG55 GND B 4 Q SG55 GND B 4 Q R C The low source impedance of the output drivers provides rapid charging of power FET input capacitance while minimizing external components. Figure. Driving Power FETS Low power transformers can be driven directly by the SG55. utomatic reset occurs during deadtime, when both ends of the primary winding are switched to ground. Figure. Driving Transformers in a HalfBridge Configuration 7
SG55 PCKGE DIMENSIONS PDIP6 N SUFFIX CSE 64808 ISSUE T 6 8 9 B NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, 98.. CONTROLLING DIMENSION: INCH.. DIMENSION L TO CENTER OF LEDS WHEN FORMED PRLLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLSH. 5. ROUNDED CORNERS OPTIONL. H G F D 6 PL S C K 0.5 (0.00) M T SETING T PLNE M J L M INCHES MILLIMETERS DIM MIN MX MIN MX 0.740 0.770 8.80 9.55 B 0.50 0.70 6.5 6.85 C 0.45 0.75.69 4.44 D 0.05 0.0 0.9 0.5 F 0.040 0.70.0.77 G 0.00 BSC.54 BSC H 0.050 BSC.7 BSC J 0.008 0.05 0. 0.8 K 0.0 0.0.80.0 L 0.95 0.05 7.50 7.74 M 0 0 0 0 S 0.00 0.040 0.5.0 8
SG55 PCKGE DIMENSIONS SOIC6L DW SUFFIX CSE 75G0 ISSUE C 8X H 0.5 M B M D 6 9 E 8 6X B B 0.5 M T S B S h X 45 NOTES:. DIMENSIONS RE IN MILLIMETERS.. INTERPRET DIMENSIONS ND TOLERNCES PER SME Y4.5M, 994.. DIMENSIONS D ND E DO NOT INLCUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION 0.5 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE 0. TOTL IN EXCESS OF THE B DIMENSION T MXIMUM MTERIL CONDITION. MILLIMETERS DIM MIN MX.5.65 0.0 0.5 B 0.5 0.49 C 0. 0. D 0.5 0.45 E 7.40 7.60 e.7 BSC H 0.05 0.55 h 0.5 0.75 L 0.50 0.90 q 0 7 4X e T SETING PLNE C L 9
SG55 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Phoenix, rizona 8508 US Phone: 48089770 or 80044860 Toll Free US/Canada Fax: 480897709 or 80044867 Toll Free US/Canada Email: orderlit@onsemi.com N. merican Technical Support: 80089855 Toll Free US/Canada Japan: ON Semiconductor, Japan Customer Focus Center 9 Kamimeguro, Meguroku, Tokyo, Japan 5005 Phone: 8577850 0 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. SG55/D