Advance Program. Sunday, February 17. TTEP Tutorials. 9:30 to 1:00 Design for Yield and Reliability

Transcription

1 Advance Program Sunday, February 17 TTEP Tutorials 9:30 to 1:00 Design for Yield and Reliability * Yervant Zorian, Virage Logic, USA [email protected] 1:00 to 3:00 Lunch 3:00 to 6:30 Practices in Analog, Mixed-signal and RF Testing * Salem Abdennadher, Intel, [email protected] * Saghir Shaikh, Cadence [email protected] Monday, February 18 8:30 Registration 9:00 Opening Remarks 9:15 Keynote Address Title: Fault Tolerance for Mainstream Computing: Challenges and Opportunities Speaker: Rajesh Galivanche Principal Engineer and Manager of Advanced Test Technology 10:15 Coffee Break

2 Session 1: Fault Simulation And Modelling Chair: Matteo Sonza Reorda, Politecnico di Torino, Italy 10:45 On-Chip Monitor For The Detection Of Logic Errors Due To Simultaneous Switching Noise. Florence Azais, Laurent Larguier, Yves Bertrand, Michel Renovell. LIRMM, CNRS/Univ Montpellier. 11:10 Fault Simulation Of Interconnect Opens. Roberto Gomez, Victor Champac. 11:35 An Accurate Path Delay Model For Multi-VDD Dynamic Testing Of Digital Circuits. Judit Freijedo1,2, Jorge Semião2,3, Juan J. Rodríguez-Andina1 1University of Vigo, Spain, 2INESC-ID, Portugal, 3Universidade Do Algarve, Portugal. Fabian Vargas PUCRS, Brazil Isabel C. Teixeira2, Joao Paulo Teixeira2. 11:50 Built-In Self Diagnosis With Multiple Signature Analyzers In Digital Systems. Raimund Ubar, Sergei Kostin, Jaan Raik - Tallinn University of Technology, Estonia. 12:15 Lunch Session 2: Design Verification/Validation Chair: Ricardo Reis, UFRGS - Brazil 14:00 In-System Hardware Dependability Validation Of The SEUs Effects In A Cryptoprocessor. Vladimir Trujillo-Olaya, John Michael Espinosa-Duran, Jaime Velasco-Medina - Universidad Del Valle, Colombia. 14:25 On-Chip Verification And Validation Of Logic Cell Libraries. Simone Bavaresco, Andre Reis, Marcelo Lubaszewski, Renato Ribas. Federal University Of Rio Grande Do Sul (UFRGS), Nangate Inc. 14:50 PSL Assertion Checking With Temporally Extended High-Level Decision Diagrams. Maksim Jenihhin, Jaan Raik, Anton Chepurov, Raimund Ubar - Tallinn University of Technology, Estonia Session 3: Built-In Self-Test Chair: Daniel Lupi, INTI - Argentina 15:15 Compact On-Chip Monitors For Detecting Delay Violations Of Differential Signals. Nestor Hernández-Cruz, Víctor Champac 15:40 Delay Verification For On-Chip Interconnect Lines Using A High-Speed Monitor. Andres Ramirez Acosta, Victor Champac, Joan Figueras. 15:45 Scalable Test Pattern Generator Design Method For BIST, Petr Fišer, Hana Kubátová - Czech Technical University, Prague.

3 16:00 Merging Built-In Current Sensor With H-Tree Architecture For SRAM Reliability Improvement. Costas Argyrides, Fabian Vargas, Dhiraj Pradhan. Bristol University, Catholic University PUCRS. 16:25 Coffee break 16:50 Fringe Meeting 19:40 Gala Dinner Tuesday, February 19 9:00 Invited Talk Title: Silver Bullet - a simple guaranteed solution for a difficult problem Speaker: Charles Hawkins University of New Mexico Chair: Victor Champac, INAOE - Mexico 10 :00 Coffee break Session 4: Automatic Test Generation Chair: Carlos Silva Cardenas, PUC - Peru 10:30 A Scalable Static Test Set Compaction Method for Sequential Circuits. Igor Aleksejev, Jaan Raik, Artur Jutman, Raimund Ubar - Tallinn University of Technology. 10:55 Test Suite Minimization Based on FSM Completeness Sufficient Conditions. Lúcio Felippe de Mello Neto, Adenilso da Silva Simão - Universidade de São Paulo, Brazil. 11:10 Efficient Test Pattern Generation for VLSI Circuits Using Immune Genetic Algorithm. Mehdi Azimipour, Mohammad Reza Bonyadi, Mohammad Eshghi - Shahid Beheshti University, Iran. Session 5: Fault Analysis and Diagnosis Chair: Jose Luis Huertas, IMSE/CNM - Spain 11:25 Expanding Trace Buffer Observation Window using Two Dimensional Compaction. Joon-Sung Yang, Nur Touba. University of Texas at Austin. 11:50 Observability of Stuck-at-Faults with Differential Power Analysis. Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre LIRMM, France. 12:05 Protecting Against Flip-Flop Hold Time Violations Due to Process Variations. Gustavo Neuberger1, Ricardo Reis2, Gilson Wirth1-1Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, 2PGMicro, Brazil. 12:20 Lunch

4 Session 6: Fault-Tolerant Architectures Chair: Pascal Fouillat, IMS - France 14:00 A Fault-Tolerant Methodology to Design Power and Thermal Noise-Aware Pipeline Architectures. Jorge Semião University Of Algarve, Portugal. Juan J. Rodríguez-Andina University of Vigo, Spain. Fabian Vargas PUCRS, Brazil. Marcelino Bicho Santos, Isabel C. Teixeira, Joao Paulo Teixeira - IST/INESC-ID, Portugal. 14:25 Design of Defect Tolerant Quantum-dot Cellular Automata Circuits. John M. Espinosa-Duran, Jaime Velasco-Medina - Univ. Del Valle, Colombia. 14:50 Real Time Fault Tolerant Architecture Design for JPEG2000 Standard Abderrahim Doumar, Hichem Snoussi - University of Technology of Troyes, France. Session 7: Radiation effects Chair: Vincent Pouget, IMS - France 15:15 Theoretical Spectral Response in Proton Irradiated PIN Photodiodes. Ariel P. Cédola, Marcelo A. Cappelletti, Eitel L. Peltzer y Blancá GEMyDE, Universidad Nacional de La Plata, Argentina. 15:40 EM-Based Parametric Optimization of a Transition from Microstrip to Substrate Integrated Waveguide Interconnect. José E. Rayas-Sánchez ITESO, Guadalajara. Vladimir Gutiérrez-Ayala -, Intel - Guadalajara Design Center, Guadalajara. 15:55 Sensitivity Analysis to SETs Considering Timing and Logic Masking. Matheus P. Braga, Guilherme Corrêa, Luciano Agostini Universidade Federal de Pelotas,Brazil. José Luís Güntzel - Universidade Federal de Santa Catarina, Brazil. 16:10 Accelerating software implemented fault injections. Janusz Sosnowski, Piotr Gawkowski, Andrzej Tymoczko - Institute of Computer Science, Warsaw University of Technology, Poland. 16:35 Coffee Break 16:50 Panel 17:50 Invited Talk Title: Under the Volcano: Archaeology In and Around Cholula. Patricia Plunket Chair of the Anthropology Department, UDLA 18:50 Cocktail

5 Wednesday, February 20 9:00 Invited Talk Title: EUROPRACTICE : supporting education and research in IC and MEMS design at European Academia Speaker: Carl Das Europractice IC Service Manager Session 8: Test of SoCs and embedded devices Chair: Lorena Anghel, TIMA - France 10:15 Power Supply Investigation for Wireless Wafer Test. Ziad Noun1,2, Philippe Cauvet1, Marie-Lise Flottes2, Serge Bernard2, David Andreu2, Jérome Galy2 1NXP Semiconductors, France, 2LIRMM, France. 10:40 Coffee break 11:10 Reusing Software Test Cases to Test an Embedded Microprocessor: a Case Study. Paulo Meirelles, Érika Cota, Marcelo Lubaszewski - Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. 11:35 DDR-SDRAM Memory Controller Validation for FPGA: Synthesis. Alexsandro C. Bonatto, André B. Soares, Altamiro A. Susin PPGEE/Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. 12:00 Concluding Remarks 12:30 Lunch