Instrumentation amplifier VCM vs VOUT plots: Part 1

Transcription

1 Instrumentation amplifier VCM vs VOUT plots: Part 1 Pete Semig, Applications Engineer, Texas Instruments - December 03, 2014 Motivation For the past few years, I have supported instrumentation amplifiers (IAs) using our TI E2E Community forum. The most common issue, by far, is the interpretation of the common-mode versus output voltage, or VCM vs. VOUT data sheet plot. While interpreting this plot is the root cause, the symptoms of violating its bounds vary widely. It is the first thing I check for when designers state the gain of my IA is wrong, the output looks distorted, the IA output can only reach 3 V with a 5 V supply, or my IA output is stuck! Figure 1 depicts an example where the output of an instrumentation amplifier such as the INA333 has distortion because the input signal violates the VCM vs. VOUT plot (Figure 2).

2 Figure 1. Instrumentation amplifier output distortion due to VCM vs. VOUT violation Figure 2. VOUT limited by VCM Introduction This three-part article about instrumentation amplifiers (IAs) discusses common-mode versus differential-mode signaling, basic operation of the traditional 3-op amp topology, and how to interpret and simulate the VCM vs. VOUT plot. This article (Part 1) discusses common-mode versus differential-mode voltage, instrumentation amplifier topologies, and shows how to derive the internal node equations and transfer function of a traditional 3-op amp instrumentation amplifier. Part 2 utilizes the equations to plot each internal amplifier s input common-mode and output swing limitation as a function of the instrumentation amplifier s common-mode voltage. Part 3 uses an example to show how to build a model that simulates the VCM vs. VOUT plot. This model gives a designer the ability to generate the plot for their design parameters, which may not be the same as those given in an instrumentation amplifier s data sheet.

3 Instrumentation amplifier topologies While there are many IA topologies, the traditional 3-op amp topology shown in Figure 3 is the most common and, therefore, will be the focus of this article series. This topology has two stages: input and output. The input stage is made of two non-inverting amplifiers. The non-inverting amplifiers have high input impedance, which minimizes loading of the signal source. The gain-setting resistor, RG, allows the designer to select any gain within the operating region of the device (typically 1 V/V to 1000 V/V). The output stage is a traditional difference amplifier. The ratio of R2 to R1 set the gain of the difference amplifier. The balanced signal paths from the inputs to the output yield excellent common-mode rejection ratio (CMRR). Finally, the output, VOUT, is referred to as the voltage applied to reference pin, VREF. Figure 3. Traditional 3-op amp instrumentation amplifier Even though 3-op amp IAs are the most commonly used topology, other topologies such as the 2-op amp (Figure 4) offer unique benefits. This topology has high input impedance and single resistorprogrammable gain. However, since the signal path to the output for each input (V+IN and V-IN) is slightly different, this topology has degraded CMRR performance (< 90 db), especially over frequency. Therefore, this type of IA is typically less expensive than the traditional 3-op amp topology.

4 Figure 4. Two-op amp instrumentation amplifier The IA shown in Figure 5 has a 2-op amp instrumentation amplifier input stage. The third op amp, A3, is the output stage, which applies gain to the signal. Two external resistors set the gain. Due to the imbalanced signal paths, this topology also has degraded CMRR performance (< 90 db). Therefore, devices with this topology are typically less expensive than traditional 3-op amp IAs.

5 Figure 5. Two-op amp instrumentation amplifier with output gain stage Finally, the IA shown in Figure 6 uses a unique current mirror topology. This type of IA is desirable because it allows for an input common-mode range that extends to both supply voltage rails, also known as rail-to-rail input. None of these topologies have rail-to-rail input and output capabilities. However, this benefit is at the expense of bandwidth. Compared to the 2-op amp IAs, this topology yields better CMRR performance (100 db or greater). Finally, this topology requires two external resistors to set the gain. Figure 6. Current mirror topology Common-mode and differential-mode voltage

6 Common-mode and differential-mode voltage Common-mode voltage is the average voltage at the inputs of a differential amplifier. A differential amplifier is any amplifier (including op amps, difference amplifiers, and IAs) that amplifies a differential signal while rejecting the common-mode voltage. Figure 7 shows how to represent an input signal composed of a common-mode signal (VCM) and a differential-mode signal (VD). Figure 7. Common-mode and differential-mode voltages In Figure 7, the inverting terminal connects to a constant voltage, VCM. Figure 8 depicts a more realistic definition of the input signal where two voltage sources represent VD. Each source has half the magnitude of VD. Performing Kirchhoff s Voltage Law (KVL) around the input loop proves that the two representations are equivalent.

7 Figure 8. Alternate definition of common-mode and differential-mode voltages Three-op amp IA analysis In order to understand the VCM vs. VOUT data sheet plot, a solid understanding of the 3-op amp IA is required. Figure 9 depicts a traditional 3-op amp IA with an input signal. The input and output nodes of A1, A2, and A3 are labeled. The equations for these nodes are of utmost importance for understanding the VCM vs. VOUT plot.

8 Figure 9. Three-op amp IA with input signal and node labels Equation (1) depicts the overall transfer function of the circuit in Figure 9 and defines the gain of the input stage, GIS, and gain of the output stage, GOS. Notice the common-mode voltage, VCM, does not appear in the output voltage equation. This is because an ideal IA completely rejects commonmode input signals. (1) Non-inverting amplifier input stage Figure 10 depicts a simplified circuit that allows for the derivation of node voltages VIA1 and VOA1.

9 Figure 10. Simplified circuit for VIA1 and VOA1 The equation for VIA1 is straightforward and shown in Equation (2). (2) The analysis for VOA1 simplifies by applying the input virtual short property of ideal op amps, which states that the voltage at the inverting and non-inverting nodes of the op amp are equal. Therefore, the voltage that appears at the RG pin connected to the inverting terminal of A2 is the same as the voltage at V+IN. By superposition, we find Equation (3), which simplifies to Equation (4). (3) (4)

10 Applying a similar analysis to A2 (Figure 11) yields Equations (5) to (7). Figure 11. Simplified circuit for VIA2 and VOA2 (5) (6) (7) Difference amplifier output stage

11 Figure 12 shows that A3, R1, and R2 comprise the difference amplifier output stage, whose transfer function is defined in Equation (8). Figure 12. Difference amplifier input (VDIFF) (8) Equations (9) through (11) use the equations for VOA1 and VOA2 to derive VDIFF in terms of the differential input signal, VD, RF, and the gain-setting resistor, RG. (9) (10)

12 (11) Substituting Equation (11) for VDIFF in Equation (8) yields Equation (12), which is the same as Equation (1). (12) In most IAs, the gain of the output stage is 1 V/V. If the gain of the output stage is 1 V/V, Equation (12) simplifies to Equation (13). (13) The equations for nodes VOA3 and VIA3 are determined using Figure 13.

13 Figure 13. Difference amplifier internal nodes The equation for VOA3 is the same as VOUT, as shown in Equation (14). The equation for VIA3 is determined using superposition as shown in Equation (15). The voltage at the non-inverting node of A3 sets the amplifier s common-mode voltage. Therefore, only VOA2 and VREF affect VIA3. (15) Since GOS=R2/R1, Equation (15) can be re-written as shown in Equation (16).

14 (16) Summary Part 1 of this article introduced the most common issue encountered when designing solutions with 3-op amp IAs: the VCM vs. VOUT plot. We also discussed common-mode versus differential mode voltage signaling and various instrumentation amplifier topologies. Finally, we derived all pertinent node equations that relate to the VCM vs. VOUT plot. Stay tuned for Part 2, which utilizes the internal node equations to plot each internal amplifier s input common-mode and output swing limitation as a function of the instrumentation amplifier s common-mode voltage. References Download the INA333 datasheet. Acknowledgements The author would like to thank Collin Wells at Texas Instruments for his contributions to this article.