AUDIO BALANCED LINE DRIVERS

Transcription

1 DRV DRV DRV DRV DRV AUDIO BALAED LINE DRIVERS FEATURES BALAED OUTPUT LOW DISTORTION:.% at f = khz WIDE OUTPUT SWING: Vrms into Ω HIGH CAPACITIVE LOAD DRIVE HIGH SLEW RATE: V/µs WIDE SUPPLY RANGE: ±.V to ±V LOW QUIESCENT CURRENT: ±.ma -PIN DIP, SO-, AND SOL- PACKAGES COMPANION TO AUDIO DIFFERENTIAL LINE RECEIVERS: INA and INA IMPROVED REPLACEMENT FOR SSM APPLICATIONS AUDIO DIFFERENTIAL LINE DRIVER AUDIO MIX CONSOLES DISTRIBUTION AMPLIFIER GRAPHIC/PARAMETRIC EQUALIZERS DYNAMIC RANGE PROCESSORS DIGITAL EFFECTS PROCESSORS TELECOM SYSTEMS HI-FI EQUIPMENT INDUSTRIAL INSTRUMENTATION V+ DESCRIPTION The DRV and DRV are differential output amplifiers that convert a single-ended input to a balanced output pair. These balanced audio drivers consist of high performance op amps with on-chip precision resistors. They are fully specified for high performance audio applications and have excellent ac specifications, including low distortion (.% at khz) and high slew rate (V/µs). The on-chip resistors are laser-trimmed for accurate gain and optimum output common-mode rejection. Wide output voltage swing and high output drive capability allow use in a wide variety of demanding applications. They easily drive the large capacitive loads associated with long audio cables. Used in combination with the INA or INA differential receivers, they offer a complete solution for transmitting analog audio signals without degradation. The DRV is available in -pin DIP and SOL- surface-mount packages. The DRV comes in a space-saving SO- surface-mount package. Both are specified for operation over the extended industrial temperature range, C to + C and operate from C to + C. A Ω +Sense kω Sense A A Ω kω All resistors kω unless otherwise indicated. V International Airport Industrial Park Mailing Address: PO Box, Tucson, AZ Street Address: S. Tucson Blvd., Tucson, AZ Tel: () - Twx: 9-9- Internet: FAXLine: () - (US/Canada Only) Cable: BBRCORP Telex: -9 FAX: () 9- Immediate Product Info: () - SBOS9 99 Burr-Brown Corporation PDS-A Printed in U.S.A. October, 99

2 SPECIFICATIONS: V S = ±V At T A = + C, V S = ±V, R L = Ω differential connected between and, unless otherwise noted. DRVPA, UA DRVUA PARAMETER CONDITIONS MIN TYP MAX UNITS AUDIO PERFORMAE Total Harmonic Distortion + Noise THD+N f = Hz to khz,v O = Vrms. % f = khz, V O = Vrms. % Noise Floor, RTO () khz BW 9 dbu Headroom, RTO () THD+N < % + dbu INPUT Input Impedance () Z IN kω Input Current I IN = ±.V ± ± µa GAIN [( ) ( )]/ Differential = ±V Initial. db Error ±. ± % vs Temperature ± ppm/ C Single-Ended = ±V Initial. db Error ±. ± % vs Temperature ± ppm/ C Nonlinearity. % of FS OUTPUT Common-Mode Rejection, f = khz OCMR See OCMR Test Circuit, Figure db Signal Balance Ratio, f = khz SBR See SBR Test Circuit, Figure db Output Offset Voltage Offset Voltage, Common-Mode V () OCM = ± ± mv vs Temperature ± µv/ C Offset Voltage, Differential V () OD = ± ± mv vs Temperature ± µv/ C vs Power Supply PSRR V S = ±.V to ±V db Output Voltage Swing, Positive No Load () (V+) (V+). V Negative No Load () (V ) + (V ) +. V Impedance Ω Load Capacitance, Stable Operation C L C L Tied to Ground (each output) µf Short-Circuit Current I SC ± ma FREQUEY RESPONSE Small-Signal Bandwidth. MHz Slew Rate SR V/µs Settling Time:.% V OUT = V Step. µs Overload Recovery Output Overdriven % µs POWER SUPPLY Rated Voltage V S ± V Voltage Range ±. ± V Quiescent Current I Q I O = ±. ±. ma TEMPERATURE RANGE Specification Range + C Operation Range + C Storage Range + C Thermal Resistance θ JA -Pin DIP C/W SO- Surface Mount C/W SOL- Surface Mount C/W NOTES: () dbu = log (Vrms /.). () Resistors are ratio matched but have ±% absolute value. () V OCM = [( ) + ( )]/. () V OD = ( ) ( ). () Guarantees linear operation. Includes common-mode offset. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. DRV,

3 PIN CONFIGURATIONS Top View -Pin DIP/SO- Top View SOL- Sense +Sense V+ V Sense +Sense V+ V ABSOLUTE MAXIMUM RATINGS () 9 Supply Voltage, V+ to V... V Input Voltage Range... V to V+ Output Short-Circuit (to ground)... Continuous Operating Temperature... C to + C Storage Temperature... C to + C Junction Temperature... + C Lead Temperature (soldering, s)... + C NOTE: () Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may affect device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PACKAGE SPECIFIED DRAWING TEMPERATURE ORDERING TRANSPORT PRODUCT PACKAGE NUMBER () RANGE NUMBER () MEDIA DRVPA -Pin DIP C to + C DRVPA Rails DRVUA SOL- Surface Mount C to + C DRVUA Rails " " " " DRVUA/K Tape and Reel DRVUA SO- Surface Mount C to + C DRVUA Rails " " " " DRVUA/K Tape and Reel NOTES: () For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. For detailed Tape and Reel mechanical information refer to Appendix B of Burr-Brown IC Data Book. () Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /K indicates devices per reel). Ordering pieces of DRVUA/K will get a single -piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book. DRV,

4 TYPICAL PERFORMAE CURVES At T A = + C, V S = ±V, R L = Ω differential connected between and, unless otherwise noted. THD+N (%).. TOTAL HARMONIC DISTORTION+NOISE vs FREQUEY See Figure for Test Circuit A: R = R = R L = (no load) B: R = R = Ω, R L = C: R = R =, R L = Ω Differential Mode V O = Vrms No Cable A B THD+N (%).. TOTAL HARMONIC DISTORTION+NOISE vs FREQUEY See Figure for Test Circuit A: R = R = R L = (no load) B: R = R = Ω, R L = C: R = R =, R L = Ω Differential Mode V O = Vrms feet cable A B C DRV Output. k k k C DRV Output. k k k. TOTAL HARMONIC DISTORTION+NOISE vs FREQUEY or Grounded A: R = Ω ( ft cable) B: R = (no cable) Single-Ended Mode V O = Vrms. SYSTEM TOTAL HARMONIC DISTORTION+NOISE vs FREQUEY See Figure for Test Circuit A: R = R = R L = (no load) B: R = R = R L = Ω Differential Mode V O = Vrms THD+N (%).. A B THD+N (%). A (no cable) B (ft cable) DRV Output. k k k INA Output. k k k HEADROOM TOTAL HARMONIC DISTORTION+NOISE vs OUTPUT AMPLITUDE f = khz Single-Ended Mode Differential Mode DIM INTERMODULATION DISTORTION vs OUTPUT AMPLITUDE Differential Mode THD+N (%).. ft Cable R L = Ω ft Cable R L = Ω DIM (%).. ft Cable R L = Ω... DRV Output Output Amplitude (dbu) No Cable R L =. BW = khz Output Amplitude (dbu) No Cable R L = DRV,

5 TYPICAL PERFORMAE CURVES (CONT) At T A = + C, V S = ±V, R L = Ω differential connected between and, unless otherwise noted. Amplitude (% of Fundamental).... HARMONIC DISTORTION PRODUCTS vs FREQUEY Differential Mode nd Harmonic No Cable, R L = ft Cable, R L = Ω rd Harmonic k k k Voltage Gain (db) GAIN vs FREQUEY k k k M M k OUTPUT VOLTAGE NOISE SPECTRAL DENSITY vs FREQUEY OUTPUT VOLTAGE NOISE vs NOISE BANDWIDTH Voltage Noise (nv/ Hz) k Voltage Noise (µvrms) k k k M. k k k POWER SUPPLY REJECTION vs FREQUEY MAXIMUM OUTPUT VOLTAGE SWING vs FREQUEY Power Supply Rejection (db) V S = ±.V to ±V PSRR k k k M +PSRR Output Voltage Swing (Vrms).% Distortion.% Distortion R L = Ω Diff Mode k k k k k DRV,

6 TYPICAL PERFORMAE CURVES (CONT) At T A = + C, V S = ±V, R L = Ω differential connected between and, unless otherwise noted. THD+N.% Differential Output Voltage (Vrms) ± ± THD+N.% OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE ± ± ± ± ± ± Supply Voltage Output Voltage Swing (V) + C OUTPUT VOLTAGE SWING vs OUTPUT CURRENT + C + C ± ± ± ± ± Output Current (ma) + C C C ±. QUIESCENT CURRENT vs SUPPLY VOLTAGE ± SHORT-CIRCUIT CURRENT vs TEMPERATURE Quiescent Current (ma) ±. ±. ± ±. T = C T = + C T = + C Short-Circuit Current (ma) ± ± ± ± I SC +I SC ±. ± ± ± ± ± ± ± ± Supply Voltage (V) ± Temperature ( C) Percent of Units (%) DIFFERENTIAL OFFSET VOLTAGE PRODUCTION DISTRIBUTION Typical production distribution of packaged units. All package types included. Percent of Units (%) COMMON-MODE OFFSET VOLTAGE PRODUCTION DISTRIBUTION Typical production distribution of packaged units. All package types included. 9 Differential Offset Voltage (mv) 9 Common-Mode Offset Voltage (mv) DRV,

7 TYPICAL PERFORMAE CURVES (CONT) At T A = + C, V S = ±V, R L = Ω differential connected between and, unless otherwise noted. SMALL-SIGNAL STEP RESPONSE C L = pf SMALL-SIGNAL STEP RESPONSE C L = pf mv/div mv/div µs/div µs/div LARGE-SIGNAL STEP RESPONSE C L = pf LARGE-SIGNAL STEP RESPONSE C L = pf V/div V/div µs/div µs/div mv Step SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITAE Overshoot (%) k k Load Capacitance (pf) DRV,

8 APPLICATIONS INFORMATION The DRV (and DRV in SO- package) converts a single-ended, ground-referenced input to a floating differential output with +db gain (G = ). Figure shows the basic connections required for operation. Decoupling capacitors placed close to the device pins are strongly recommended in applications with noisy or high impedance power supplies. The DRV consists of an input inverter driving a crosscoupled differential output stage with Ω series output resistors. Characterized by low differential-mode output impedance (Ω) and high common-mode output impedance (.kω), the DRV is ideal for audio applications. Normally, is connected to +Sense, is connected to Sense, and the outputs are taken from these junctions as shown in Figure. For applications with large dc cable offset errors, a µf electrolytic nonpolarized blocking capacitor at each sense pin is recommended as shown in Figure. µf V V+ µf () () DRV DRV A Ω () () kω () +Sense G = +db Sense () A A Ω () () kω All resistors kω unless otherwise indicated. SOL- pin numbers in parentheses. FIGURE. Basic Connections. DRIVER DRV DRV A Ω µf () BALAED CABLE PAIR RECEIVER kω V O A A Ω µf () INA, INA All resistors kω unless otherwise indicated. kω INA (G = ): V O = INA (G = /): V O = Pin numbers shown for DIP and SO- versions. NOTE: () Optional µf electrolytic (nonpolarized) capacitors reduce common-mode offset errors. FIGURE. Complete Audio Driver/Receiver Circuit. DRV,

9 Excellent internal design and layout techniques provide low signal distortion, high output level (+dbu), and a low noise floor ( 9dBu). Laser trimming of thin film resistors assures excellent output common-mode rejection (OCMR) and signal balance ratio (SBR). In addition, low dc voltage offset reduces errors and minimizes load currents. For best system performance, it is recommended that a high input-impedance difference amplifier be used as the receiver. Used with the INA (G = db) or the INA (G = ±db) differential line receivers, the DRV forms a complete solution for driving and receiving audio signals, replacing input and output coupling transformers commonly used in professional audio systems (Figure ). When used with the INA (G = db) overall system gain is unity. AUDIO PERFORMAE The DRV was designed for enhanced ac performance. Very low distortion, low noise, and wide bandwidth provide superior performance in high quality audio applications. Laser-trimmed matched resistors provide optimum output common-mode rejection (typically db), especially when compared to circuits implemented with op amps and discrete precision resistors. In addition, high slew rate (V/µs) and fast settling time (.µs to.%) ensure excellent dynamic response. The DRV has excellent distortion characteristics. As shown in the distortion data provided in the typical performance curves, THD+Noise is below.% throughout the audio frequency range under various output conditions. Both differential and single-ended modes of operation are shown. In addition, the optional µf blocking capacitors used to minimize V OCM errors have virtually no effect on performance. Measurements were taken with an Audio Precision System One (with the internal khz noise filter) using the THD test circuit shown in Figure. Up to approximately khz, distortion is below the measurement limit of commonly used test equipment. Furthermore, distortion remains relatively constant over the wide output voltage swing range (approximately.v from the positive supply and.v from the negative supply). A special output stage topology yields a design with minimum distortion variation from lot-to-lot and unit-to-unit. Furthermore, the small and large signal transient response curves demonstrate the DRV s stability under load. OUTPUT COMMON-MODE REJECTION Output common-mode rejection (OCMR) is defined as the change in differential output voltage due to a change in output common-mode voltage. When measuring OCMR, is grounded and a common-mode voltage, V CM, is applied to the output as shown in Figure. Ideally no differential mode signal (V OD ) should appear. However, a small mode-conversion effect causes an error signal whose magnitude is quantified by OCMR. +V DRV V µf µf V ( OD ) Ω () V OD Ω () Ω V CM = Vp-p OCMR = Log at f = khz, V V OD = ( ) ( ) CM NOTE: () Matched to.%. FIGURE. Output Common-Mode Rejection Test Circuit. +V +V µf Test Point or In DRV R L +In INA µf V OUT R R µf µf V V NOTE: Cable loads, where indicated, are Belden 9 cable. FIGURE. Distortion Test Circuit. 9 DRV,

10 SIGNAL BALAE RATIO Signal balance ratio (SBR) measures the symmetry of the output signals under loaded conditions. To measure SBR an input signal is applied and the outputs are summed as shown in Figure. V OUT should be zero since each output ideally is exactly equal and opposite. However, an error signal results from any imbalance in the outputs. This error is quantified by SBR. The impedances of the DRV s out put stages are closely matched by laser trimming to minimize SBR errors. In an application, SBR also depends on the balance of the load network. = Vp-p FIGURE. Signal Balance Ratio Test Circuit. SINGLE-ENDED OPERATION The DRV can be operated in single-ended mode without degrading output drive capability. Single-ended operation requires that the unused side of the output pair be grounded (both the V O and Sense pins) to a low impedance return path. Gain remains +db. Grounding the negative outputs as shown in Figure results in a noninverted output signal (G = +) while grounding the positive outputs gives an inverted output signal (G = ). +V DRV V NOTE: () Matched to.%. V+ DRV V µf µf Ω () Ω () SBR = Log G = +db Ω Ω ( ) V OUT V OUT at f = khz V OUT = For best rejection of line noise and hum differential mode operation is recommended. However, single-ended performance is adequate for many applications. In general singleended performance is comparable to differential mode (see THD+N typical performance curves), but the commonmode and noise rejection inherent in balanced-pair systems is lost. CABLE The DRV is capable of driving large signals into Ω loads over long cables. Low impedance shielded audio cables such as the standard Belden or 9 (or similar) are recommended, especially in applications where long cable lengths are required. THERMAL PERFORMAE The DRV and DRV have robust output drive capability and excellent performance over temperature. In most applications there is no significant difference between the DIP, SOL-, and SO- packages. However, for applications with extreme temperature and load conditions, the SOL- (DRVUA) or DIP (DRVPA) packages are recommended. Under these conditions, such as loads greater than Ω or very long cables, performance may be degraded in the SO- (DRVUA) package. LAYOUT CONSIDERATIONS A driver/receiver balanced-pair (such as the DRV and INA) rejects the voltage differences between the grounds at each end of the cable, which can be caused by ground currents, supply variations, etc. In addition to proper bypassing, the suggestions below should be followed to achieve optimal OCMR and noise rejection. The DRV input should be driven by a low impedance source such as an op amp or buffer. As is the case for any single-ended system, the source s common should be connected as close as possible to the DRV s ground. Any ground offset errors in the source will degrade system performance. Symmetry on the outputs should be maintained. Shielded twisted-pair cable is recommended for all applications. Physical balance in signal wiring should be maintained. Capacitive differences due to varying wire lengths may result in unequal noise pickup between the pair and degrade OCMR. Follow industry practices for proper system grounding of the cables. FIGURE. Typical Single-Ended Application. DRV,

11 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright, Texas Instruments Incorporated