DUAL FULL-BRIDGE PWM MOTOR DRIVER

Transcription

1 9 Data Sheet 99.0F PWM OUT A OUT A E SENSE OUT B UDN9B (DP) 0 9 LOAD SUPPLY E SENSE OUT B The UDN9B, UDN9EB, and UDN9LB motor drivers are designed to drive both windings of a bipolar stepper motor or bidirectionally control two dc motors. Both bridges are capable of sustaining V and include internal pulse-width modulation (PWM) control of the output current to 0 ma. The outputs have been optimized for a low output saturation voltage drop (less than. V total source plus sink at 00 ma). For PWM current control, the maximum output current is determined by the user s selection of a reference voltage and sensing resistor. Two logic-level inputs select output current limits of 0,,, or 00% of the maximum level. A PHASE input to each bridge determines load current direction. 0 PHASE V REF RC 9 0 θ PWM PWM θ V CC PHASE V REF RC LOGC SUPPLY Dwg. PP-00 ABSOLUTE MAXMUM RATNGS at T J 0 C Motor Supply Voltage,... V Output Current, OUT (Peak) A (Continuous) ma Logic Supply Voltage, V CC....0 V Logic nput Voltage Range, V N V to V CC +0. V Output Emitter Voltage, V E.... V Package Power Dissipation, P D... See Graph Operating Temperature Range, T A C to + C Storage Temperature Range, T S... - C to +0 C Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified peak current rating or a junction temperature of +0 C. The bridges include both ground clamp and flyback diodes for protection against inductive transients. nternally generated delays prevent cross-over currents when switching current direction. Special power-up sequencing is not required. Thermal protection circuitry disables the outputs if the chip temperature exceeds safe operating limits. The UDN9B is supplied in a -pin dual in-line plastic batwing package with a copper lead-frame and heat sinkable tabs for improved power dissipation capabilities. The UDN9EB is supplied in a -lead power PLCC for surface mount applications. The UDN9LB is supplied in a -lead surface-mountable SOC. Their batwing construction provides for maximum package power dissipation in the smallest possible construction. The UDN9B/EB/LB are available for operation from -0 C to + C. To order, change the prefix from 'UDN' to 'UDQ'. These devices are also available on special order for operation to +0 C. The LB package is available in a lead-free version (00% matte tin leadframe). FEATURES 0 ma Continuous Output Current V Output Sustaining Voltage nternal Clamp Diodes nternal PWM Current Control Low Output Saturation Voltage nternal Thermal Shutdown Circuitry Similar to Dual PBL, UC0 Always order by complete part number: Part Number Package UDN9B -Pin DP UDN9EB -Lead PLCC UDN9LB -Lead SOC UDN9LB-T -Lead SOC, Lead-free

2 9 UDN9EB (PLCC) GND GND OUT A E SENSE OUT B LOAD SUPPLY PHASE V REF RC LOGC SUPPLY 0 θ VCC 9 GND PWM PWM 9 GND VBB NC NC θ OUT A NO CONNECTON 9 E 0 SENSE NO CONNECTON OUT B PHASE V REF RC Dwg. PP-00A ALLOWABLE PACKAGE POWER DSSPATON N WATTS 0 R θjt =.0 C/W SUFFX 'EB', R = 0 C/W θja SUFFX 'B', R = 0 C/W θja SUFFX 'LB', R = C/W θja TEMPERATURE N C Dwg. GP-0B UDN9LB (SOC) PWM CURRENT-CONTROL CRCUTRY 0 LOAD SUPPLY 'B' PACKAGE, CHANNEL PN NUMBERS SHOWN. PWM OUT B OUT B PHASE θ SENSE OUT A V REF E V REF RC 0 OUT A 0 kω E LOGC SUPPLY V CC 9 OUT A 0 0 kω 0 kω 0 R S R C SENSE + C C ONE SHOT RC SOURCE DSABLE RC V REF PHASE 9 0 θ PWM E SENSE OUT B TRUTH TABLE R T C T Dwg. EP-00B PHASE OUT A OUT B Dwg. PP-0 H H L L L H Northeast Cutoff, Box 0 Worcester, Massachusetts 0-00 (0) -000 Copyright 99, 00 Allegro MicroSystems, nc.

3 9 ELECTRCAL CHARACTERSTCS at T A = + C, T J 0 C, = V, V CC =. V to. V, V REF =.0 V (unless otherwise noted). Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Output Drivers (OUT A or OUT B ) Motor Supply Range 0 V Output Leakage Current CEX V OUT = <.0 0 µa V OUT = 0 <.0 0 µa Output Sustaining Voltage V CE(sus) OUT = ±0 ma, L =.0 mh V Output Saturation Voltage V CE(SAT) Sink Driver, OUT = +00 ma V Sink Driver, OUT = +0 ma.0. V Source Driver, OUT = 00 ma.0. V Source Driver, OUT = 0 ma.. V Clamp Diode Leakage Current R V R = V <.0 0 µa Clamp Diode Forward Voltage V F F = 0 ma..0 V Driver Supply Current BB(ON) Both Bridges ON, No Load 0 ma BB(OFF) Both Bridges OFF.0 0 ma Control Logic nput Voltage V N() All inputs. V V N(0) All inputs 0. V nput Current N() V N =. V <.0 0 µa V N = 0. V.0 00 µa Reference Voltage Range V REF Operating.. V Current Limit Threshold V REF /V SENSE = = 0. V (at trip point) =. V, = 0. V.. = 0. V, =. V. 0. Thermal Shutdown Temperature T J 0 C Total Logic Supply Current CC(ON) = = 0. V, No Load 0 0 ma CC(OFF) = =. V, No Load 0 ma Fixed Off-Time t off R T = kω, C T = 0 pf µs

4 9 APPLCATONS NFORMATON PWM CURRENT CONTROL The UDN9B/EB/LB dual bridges are designed to drive both windings of a bipolar stepper motor. Output current is sensed and controlled independently in each bridge by an external sense resistor (R S ), internal comparator, and monostable multivibrator. V PHASE PWM OUTPUT CURRENT WAVE FORM When the bridge is turned ON, current increases in the motor winding and it is sensed by the external sense resistor until the sense voltage (V SENSE ) reaches the level set at the comparator s input: TRP = V REF /0 R S OUT + 0 The comparator then triggers the monostable which turns OFF the source driver of the bridge. The actual load current peak will be slightly higher than the trip point (especially for low-inductance loads) because of the internal logic and switching delays. This delay (t d ) is typically µs. After turn-off, the motor current decays, circulating through the ground-clamp diode and sink transistor. The source driver s OFF time (and therefore the magnitude of the current decrease) is determined by the monostable s external RC timing components, where t off = R T C T within the range of 0 kω to 00 kω and 00 pf to 000 pf. The fixed-off time should be short enough to keep the current chopping above the audible range (< µs) and long enough to properly regulate the current. Because only slow-decay current control is available, short off times (< 0 µs) require additional efforts to ensure proper current regulation. Factors that can negatively affect the ability to properly regulate the current when using short off times include: higher motor-supply voltage, light load, and longer than necessary blank time. When the source driver is re-enabled, the winding current (the sense voltage) is again allowed to rise to the comparator s threshold. This cycle repeats itself, maintaining the average motor winding current at the desired level. t d LOAD CURRENT PATHS V BB TRP t off Dwg. WM-00-A Loads with high distributed capaci-tances may result in high turn-on current peaks. This peak (appearing across R S ) will attempt to trip the comparator, resulting in erroneous current control or high-frequency oscillations. An external R C C C time delay should be used to further delay the action of the comparator. Depending on load type, many applications will not require these external components (SENSE connected to E). R S BRDGE ON SOURCE OFF ALL OFF Dwg. E P-00- Northeast Cutoff, Box 0 Worcester, Massachusetts 0-00 (0) -000

5 9 LOGC CONTROL OF OUTPUT CURRENT Two logic level inputs (l 0 and ) allow digital selection of the motor winding current at 00%, %, %, or 0% of the maximum level per the table. The 0% output current condition turns OFF all drivers in the bridge and can be used as an OUTPUT ENABLE function. CURRENT-CONTROL TRUTH TABLE l 0 Output Current L L V REF /0 R S = TRP H L V REF / R S = / TRP L H V REF /0 R S = / TRP H H 0 These logic level inputs greatly enhance the implementation of µp-controlled drive formats. During half-step operations, the l 0 and l allow the µp to control the motor at a constant torque between all positions in an eight-step FROM µp V REF kω R T R S C C R C pf C T TYPCAL APPLCATON θ PWM PWM θ V CC 0 9 R C + V R S C C V REF FROM µp STEPPER MOTOR + 0 pf kω C T R T Dwg. EP-00B sequence. This is accomplished by digitally selecting 00% drive current when only one phase is ON and % drive current when two phases are ON. Logic highs on both l 0 and l turn OFF all drivers to allow rapid current decay when switching phases. This helps to ensure proper motor operation at high step rates. The logic control inputs can also be used to select a reduced current level (and reduced power dissipation) for hold conditions and/or increased current (and available torque) for start-up conditions. GENERAL The PHASE input to each bridge determines the direction motor winding current flows. An internally generated deadtime (approximately µs) prevents crossover currents that can occur when switching the PHASE input. All four drivers in the bridge output can be turned OFF between steps (l 0 = l ž. V) resulting in a fast current decay through the internal output clamp and flyback diodes. The fast current decay is desirable in half-step and high-speed applications. The PHASE, l 0,and inputs float high. Varying the reference voltage (V REF ) provides continuous control of the peak load current for micro-stepping applications. Thermal protection circuitry turns OFF all drivers when the junction temperature reaches +0 C. t is only intended to protect the device from failures due to excessive junction temperature and should not imply that output short circuits are permitted. The output drivers are re-enabled when the junction temperature cools to + C. The UDN9B/EB/LB output drivers are optimized for low output saturation voltages less than. V total (source plus sink) at 00 ma. Under normal operating conditions, when combined with the excellent thermal properties of the batwing package design, this allows continuous operation of both bridges simultaneously at 00 ma.

6 9 UDN9B Dimensions in nches (controlling dimensions) NOTE MAX MAX Dwg. MA-00-A in Dimensions in Millimeters (for reference only) NOTE MAX MAX Dwg. MA-00-A mm NOTES:. Webbed lead frame. Leads,,, and 9 are internally one piece.. Lead thickness is measured at seating plane or below.. Lead spacing tolerance is non-cumulative.. Exact body and lead configuration at vendor s option within limits shown. Northeast Cutoff, Box 0 Worcester, Massachusetts 0-00 (0) -000

7 9 UDN9EB NDEX AREA Dimensions in nches (controlling dimensions) Dwg. MA-00-A in NDEX AREA Dimensions in Millimeters (for reference only) Dwg. MA-00-A mm OTES:. MO-0AC except for terminal shoulder height. ntended to meet new JEDEC Standard when that is approved.. Webbed lead frame. Leads - and 9-9 are internally one piece.. Lead spacing tolerance is non-cumulative.. Exact body and lead configuration at vendor s option within limits shown.

8 9 UDN9LB Dimensions in nches (for reference only) TO NOTE NOTE Dwg. MA-00-A in Dimensions in Millimeters (controlling dimensions) TO NOTE NOTE Dwg. MA-00-A mm Allegro MicroSystems, nc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, nc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use. NOTES:. Webbed lead frame. Leads indicated are internally one piece.. Lead spacing tolerance is non-cumulative.. Exact body and lead configuration at vendor s option within limits shown. Northeast Cutoff, Box 0 Worcester, Massachusetts 0-00 (0) -000