ASSIGNMENT 2: Introduction to DC Circuits and Digital Logic

Similar documents
CHAPTER 11: Flip Flops

Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop.

The components. E3: Digital electronics. Goals:

GLOLAB Two Wire Stepper Motor Positioner

Objectives: Part 1: Build a simple power supply. CS99S Laboratory 1

Decimal Number (base 10) Binary Number (base 2)

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

Lecture 8: Synchronous Digital Systems

The 104 Duke_ACC Machine

So far we have investigated combinational logic for which the output of the logic devices/circuits depends only on the present state of the inputs.

GLOLAB Universal Telephone Hold

Sequential Logic: Clocks, Registers, etc.

Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa

EGR 278 Digital Logic Lab File: N278L3A Lab # 3 Open-Collector and Driver Gates

Cornerstone Electronics Technology and Robotics I Week 15 Voltage Comparators Tutorial

WHO ANSWERED FIRST? FIND OUT WITH THIS QUIZ BUZZER KIT

!Operation:!1. Connect an external power source to J1 (+ and - IN terminals). The

1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.

ECEN 1400, Introduction to Analog and Digital Electronics

CS311 Lecture: Sequential Circuits

Digital circuits make up all computers and computer systems. The operation of digital circuits is based on

Electronics. Discrete assembly of an operational amplifier as a transistor circuit. LD Physics Leaflets P

AP-1 Application Note on Remote Control of UltraVolt HVPS

Gates, Circuits, and Boolean Algebra

Robot Board Sub-System Testing. Abstract. Introduction and Theory. Equipment. Procedures. EE 101 Spring 2006 Date: Lab Section # Lab #6

NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter

FORDHAM UNIVERSITY CISC Dept. of Computer and Info. Science Spring, Lab 2. The Full-Adder

A Digital Timer Implementation using 7 Segment Displays

Figure 8-1 Four Possible Results of Adding Two Bits

Lesson 12 Sequential Circuits: Flip-Flops

Chapter 2 Logic Gates and Introduction to Computer Architecture

Lab 5 Operational Amplifiers

To design digital counter circuits using JK-Flip-Flop. To implement counter using 74LS193 IC.

SEQUENTIAL CIRCUITS. Block diagram. Flip Flop. S-R Flip Flop. Block Diagram. Circuit Diagram

Design: a mod-8 Counter

Department of Electrical and Computer Engineering LED DISPLAY PROJECT

Glolab Talking Phone Dial Monitor

LAB #4 Sequential Logic, Latches, Flip-Flops, Shift Registers, and Counters

ENGI 241 Experiment 5 Basic Logic Gates

Digital Fundamentals. Lab 8 Asynchronous Counter Applications

EE 209 Lab 1 Sound the Alarm

Module 3: Floyd, Digital Fundamental

Contents COUNTER. Unit III- Counters

Counters and Decoders

Transistor Characteristics and Single Transistor Amplifier Sept. 8, 1997

Table 1 Comparison of DC, Uni-Polar and Bi-polar Stepper Motors

Capacitive Touch Sensor Project:

Modifying the Yaesu FT-847 External MHz Reference Input

EXPERIMENT 8. Flip-Flops and Sequential Circuits

VCE Physics and VCE Systems Engineering: Table of electronic symbols

Lab 11 Digital Dice. Figure Digital Dice Circuit on NI ELVIS II Workstation

Flip-Flops and Sequential Circuit Design. ECE 152A Winter 2012

Flip-Flops and Sequential Circuit Design

How to connect to a Class II router using a mobile-phone data cable specifically for Solwise & Safecom routers

Copyright Peter R. Rony All rights reserved.

3-Digit Counter and Display

MULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the question.

Optical Sensor Interface for AFX Digital LED Timer/Counter by George Warner, Jan

ELEC EXPERIMENT 1 Basic Digital Logic Circuits

Physics 623 Transistor Characteristics and Single Transistor Amplifier Sept. 13, 2006

TRANSISTOR/DIODE TESTER

Resistors in Series and Parallel

Experiment: Series and Parallel Circuits

ECE380 Digital Logic

Sequential Logic. (Materials taken from: Principles of Computer Hardware by Alan Clements )

Building the AMP Amplifier

Lecture 5: Gate Logic Logic Optimization

Operational Amplifier - IC 741

Digital Electronics Detailed Outline

3.Basic Gate Combinations

1.1 The 7493 consists of 4 flip-flops with J-K inputs unconnected. In a TTL chip, unconnected inputs

MODEL 5010 DUAL CHANNEL SMOKE/FIRE DETECTION MODULE

Electronic Circuit Construction:

Operating Manual Ver.1.1

Design Project: Power inverter

BUILD YOUR OWN RC SWITCH (Issue 3)

ASYNCHRONOUS COUNTERS

Chapter 9 Latches, Flip-Flops, and Timers

Bipolar Junction Transistor Basics

ARRL Morse Code Oscillator, How It Works By: Mark Spencer, WA8SME

Physics 226 FPGA Lab #1 SP Wakely. Terasic DE0 Board. Getting Started

Maximum value. resistance. 1. Connect the Current Probe to Channel 1 and the Differential Voltage Probe to Channel 2 of the interface.

Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science Electronic Circuits Spring 2007

Chapter 6 TRANSISTOR-TRANSISTOR LOGIC. 3-emitter transistor.

Talon VFD / Inverter Meter

3 The TTL NAND Gate. Fig. 3.1 Multiple Input Emitter Structure of TTL

2 : BISTABLES. In this Chapter, you will find out about bistables which are the fundamental building blocks of electronic counting circuits.

DEPARTMENT OF INFORMATION TECHNLOGY

AUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR

BJT Characteristics and Amplifiers

Adafruit MCP9808 Precision I2C Temperature Sensor Guide

Content Map For Career & Technology

Data Sheet. Adaptive Design ltd. Arduino Dual L6470 Stepper Motor Shield V th November L6470 Stepper Motor Shield

Memory Elements. Combinational logic cannot remember

(Refer Slide Time: 00:01:16 min)

Electronics Technology

Lab 1: Full Adder 0.0

LAB VIII. BIPOLAR JUNCTION TRANSISTOR CHARACTERISTICS

Chapter 10 Advanced CMOS Circuits

Transcription:

ASSIGNMENT 2: Introduction to DC Circuits and Digital Logic For each section of the assignment, the work that you are supposed to turn in is indicated in italics at the end of each problem or sub-problem. This result may be a drawing/schematic, a written answer, or an equation, or a combination of all three. I prefer that schematics are drawn neatly by hand (this is foryour benefit it s quicker than using a draw program on a computer). Please turn in hard copy. 2-1: Basic Prototyping and the 74HC00 Quad NAND Gate. In this exercise, you will learn basic prototyping skills using your UML305DEV board and the solderless breadboard. The figure below illustrates a section of the solderless breadboard: + + Each group of holes that is connected (in the drawing) with a thin line is connected electrically on the board. Thus, there are two sets of horizontal busses, along the top and bottom, and vertical groups of five holes. The horizontal busses are used for power and ground distribution, and the vertical holes are used to install and connect parts. The busses are printed in and blue, and labeled + and. Start off by connecting power and ground from the UML305DEV board to one of your proto boards. Get a length of wire, strip about 1/3 of an inch of insulation from both ends. Then run one end into one of the four +5v sockets on the UML305DEV board. Connect the other end to one of the bus strips. Get a second wire, and connect from one bus to the other bus. Using a wire, also connect ground from the UML305DEV board to one of the blue bus strips. Get a second wire, and connect from the blue bus to the other blue bus. http://www.cs.uml.edu/~fm/courses/91.305/files/assignment2.pdf page 1

Your set up should now look like: + + Now you re ready to install a chip and wire it up. Get the 74HC00 quad NAND gate chip, and plug it into the breadboard, straddling the vertical banks of pins. Arrange the chip so that the notch is to the left, putting pin 1 in the lower left corner: + ) 74HC00 + Now, connect power and ground to the chip by running wires to from the chip to the power busses. Pin 14 is the power pin; use a wire to connect it to the power bus. Pin 7 is the ground pin; use a wire to connect it to the blue ground bus: http://www.cs.uml.edu/~fm/courses/91.305/files/assignment2.pdf page 2

+ ) 74HC00 + Now, let s connect to an actual gate from the chip. Looking at the data sheet, one can see that the gates are connected as illustrated: We ll connect the #1 gate. The inputs A1 and B1 are at pins 1 and 2, and the output Y1 is at pin 3. Using white wires, connect the inputs to pushbuttons SW1 and SW2, and the output to LED1. The circuit should now look like: + ) 74HC00 + At this point, turn on the UML305DEV board. Make sure the power LED next to the power switch is on. The pushbuttons generate logic low (0v) signals when they are not pressed. So, the input to the NAND gate is 0 0, and its output should be logic high (5v). Thus, LED1 should now be lit. http://www.cs.uml.edu/~fm/courses/91.305/files/assignment2.pdf page 3

Test the NAND function: when both inputs are true (buttons pressed), the output goes low (LED off). To turn in: nothing to turn in. 2-2: NAND as Inverter. Design a circuit that allows the NAND gate to be used as an inverter. The circuit should have one input and one output. Use SW4 as the input and LED2 as the output. Use a different gate on the NAND package than the one you wi in Exercise 1. Build and test the design. To turn in: Draw a schematic of your resulting circuit, including the pushbutton switch, output LED, and power/ground connections. 2-3: Transistor/Lamp Circuit. CMOS outputs can source between 5 and 20 ma of current. The small lamp in your kit requires about 50 ma of current to light. Therefore, CMOS outputs can not properly drive the lamp. The NPN transistor in your kit is an ideal device to use to provide drive current for the lamp. The schematic below shows how this works. The CMOS output is connected to the base of the transistor (B) through a 10k resistor. When the CMOS output is high, a small current flows between the base and the emitter (E). This small current causes a large current to flow through the collector (C) - emitter (E) junction, turning on the lamp. The diagram below shows how the three transistor signals are attached to the physical device (known as the TO-92 package). http://www.cs.uml.edu/~fm/courses/91.305/files/assignment2.pdf page 4

Using this information, wire your NAND gate to control the lamp. Before building,try wiring the lamp directly to the NAND output (from the output to ground). Does it light up at all when the output is high? Draw a circuit diagram of the final configuration, including power and ground connections. When you have the circuit work, answer: how much brighter does the lamp seem when running through the transistor? 2-4: Counters. With the assistance of the data sheet, hook up the 74HC393 dual 4-bit binary counter. Use a pushbutton to generate the clock input; when it s working, you should see it increment one count per button press. Draw a circuit diagram of the chip and how you have attached it so that it will count. Does it count on the rising edge or falling edge of the clock signal? Using the chips in your kit, design a circuit that will generate a carry from the first counter stage to act as the clock input of the second, creating a full 8-bit counter. Do the counters increment on the rising edge or the falling edge of the clock signal? Make sure to think this through, so that the second counter increments on the same edge as the first. Draw a circuit diagram of your 8-bit counter. Typically, counters are built with chains of flip-flops. Using your 74HC73 dual JK flip-flop chip, build a two-bit counter. Draw a circuit diagram of your 2-bit counter. http://www.cs.uml.edu/~fm/courses/91.305/files/assignment2.pdf page 5

2-5: Mystery Chips. Synopsis. You are given two chips from the 74HCxxx series. Without destroying them in the process, identifity them. Process. The method is more important than the result. In other words, you must document your thought process and experimental method the way that you go about finding the solutions. You must turn in a detailed description of the steps you take with each chip that led you to your conclusion. About one full page of single-spaced, printed output is expected (per chip). Just turning in the answer, e.g., The 14-pin chip is the 74HC00 is not acceptable. (Note: this isn t the correct answer, so you ve just had one possibility eliminated.) Method. It is important to avoid burning out the chip during testing. This means you must not wire chipoutputs to power or ground. So you must first determine which pins are input and which are output. First of all, make sure you wire the chip to power and ground properly. Holding the chip like this: power ground. The +5v power pin is on the upper left, and the ground pin is on the lower right. To determine if a given pin is an input pin, wire the pin to +5v using a 1k resistor. Then, measure the signal at the pin using your logic probe. If it s an input, it should be high. Now, connect the pin to ground with the resistor. Measure it again. If it s now low, then it is an input. If the pin ever disagrees with the value you re asserting with the resistor, then it is an output. Go around all of the pins and determine which are input and which are output. Once you know a pin is an input, you may wire it high or low with a wire (the resistor isn t needed). But be sure to not wire outputs to +5 or ground with a wire! If the output is trying to generate a signal other the one you ve wi, the chip will get hot and may burn up. Connect the outputs to your LED indicators. Now vary the inputs, and figure out what the chip is doing. You may want so systematically record all possible inputs and what outputs are generated, or explore and try to figure it out differently. Hints. The two chips (one 14-pin, one 16-pin) are both members of the 74HCxx or 74HCxxx series. Both are pure combinational logic outputs are directly a function of inputs, with no internal state (no flip-flops or latches). http://www.cs.uml.edu/~fm/courses/91.305/files/assignment2.pdf page 6