NTHS Power MOSFET V,. A, P Channel ChipFET Features Low R S(on) Higher Efficiency Extending Battery Life Logic Level Gate rive Miniature ChipFET Surface Mount Package Pb Free Package is Available V (BR)SS V R S(on) TYP m @. V I MAX. A Applications Power Management in Portable and Battery Powered Products; i.e., Cellular and Cordless Telephones and PCMCIA Cards G S MAXIMUM RATINGS (T A = C unless otherwise noted) Rating Symbol sec Steady State rain Source Voltage V S V Gate Source Voltage V GS V Continuous rain Current (T J = C) (Note ) T A = C T A = C I...9. Pulsed rain Current I M A Continuous Source Current (Note ) Maximum Power issipation (Note ) T A = C T A = C Operating Junction and Storage Temperature Range Unit I S..9 A P.... A W T J, T stg to + C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Surface Mounted on FR Board using in sq pad size (Cu area =. in sq [ oz] including traces). S P Channel MOSFET PIN CONNECTIONS G ChipFET CASE A STYLE MARKING IAGRAM A M A = Specific evice Code M = Month Code = Pb Free Package (Note: Microdot may be in either location) ORERING INFORMATION evice Package Shipping NTHST ChipFET /Tape & Reel NTHSTG ChipFET (Pb Free) /Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BR/. Semiconductor Components Industries, LLC, July, Rev. Publication Order Number: NTHST/
NTHS THERMAL CHARACTERISTICS Characteristic Symbol Typ Max Unit Maximum Junction to Ambient (Note ) t sec Steady State R JA 9 C/W Maximum Junction to Foot (rain) Steady State R JF C/W ELECTRICAL CHARACTERISTICS (T J = C unless otherwise noted) Characteristic Symbol Test Condition Min Typ Max Unit Static Gate Threshold Voltage V GS(th) V S = V GS, I = A.. V Gate Body Leakage I GSS V S = V, V GS = V na Zero Gate Voltage rain Current I SS V S = V, V GS = V. A V S = V, V GS = V, T J = C On State rain Current (Note ) I (on) V S. V, V GS =. V A. rain Source On State Resistance (Note ) r S(on) V GS =. V, I =. A V GS =. V, I =.9 A... V GS =. V, I =. A.. Forward Transconductance (Note ) g fs V S = V, I =.9 A mhos iode Forward Voltage (Note ) V S I S =. A, V GS = V.. V Total Gate Charge Q G ynamic (Note ) 9. nc Gate Source Charge Q GS V S = V, V GS =. V, I =.9 A. Gate rain Charge Q G. Input Capacitance C iss pf Output Capacitance C V S =. Vdc, V GS = Vdc, oss f =. MHz Reverse Transfer Capacitance C rss Turn On elay Time t d(on) ns Rise Time t r V = V, RL = Turn Off elay Time t d(off) I. A, V GEN =. V, R G = Fall Time t f Source rain Reverse Recovery Time t rr I F =. A, di/dt = A/s. Surface Mounted on FR Board using in sq pad size (Cu area =. in sq [ oz] including traces).. Pulse Test: Pulse Width s, uty Cycle %.. Guaranteed by design, not subject to production testing.
NTHS TYPICAL ELECTRICAL CHARACTERISTICS I, RAIN CURRENT (AMPS). V V V. V V T J = C. V V V GS =. V... V S, RAIN TO SOURCE VOLTAGE (VOLTS) I, RAIN CURRENT (AMPS) T J = C C C... V GS, GATE TO SOURCE VOLTAGE (VOLTS) Figure. On Region Characteristics Figure. Transfer Characteristics R S(on), RAIN TO SOURCE RESISTANCE ().... I =.9 A T J = C V GS, GATE TO SOURCE VOLTAGE (VOLTS) R S(on), RAIN TO SOURCE RESISTANCE ().... T J = C V GS =. V V GS =. V V GS =. V I, RAIN CURRENT (AMPS) Figure. On Resistance versus Gate to Source Voltage Figure. On Resistance versus rain Current and Gate Voltage R S(on), RAIN TO SOURCE RESISTANCE (NORMALIZE).... I =.9 A V GS =. V. T J, JUNCTION TEMPERATURE ( C) Figure. On Resistance Variation with Temperature
NTHS TYPICAL ELECTRICAL CHARACTERISTICS C, CAPACITANCE (pf) 9 C rss C iss C oss V S, RAIN TO SOURCE VOLTAGE () Figure. Capacitance Variation T J = C V GS = V GS, GATE TO SOURCE VOLTAGE (VOLTS) Q GS Q G Q G 9 Q G, TOTAL GATE CHARGE (nc) I =.9 A T J = C Q G /Q GS =. Figure. Gate to Source and rain to Source Voltage versus Total Charge 9 V S, RAIN TO SOURCE VOLTAGE (VOLTS) NORMALIZE EFFECTIVE TRANSIENT THERMAL IMPEANCE. uty Cycle =..... Single Pulse..... SQUARE WAVE PULSE URATION (sec) Figure. Normalized Thermal Transient Impedance, Junction to Ambient P M t t UTY CYCLE, = t /t PER UNIT BASE = R JA = C/W T JM T A = P M Z JA (t) SURFACE MOUNTE I S, SOURCE CURRENT (AMPS) V GS = V T J = C.....9 V S, SOURCE TO RAIN VOLTAGE (VOLTS) Figure 9. iode Forward Voltage versus Current
NTHS PACKAGE IMENSIONS ChipFET CASE A ISSUE G H E e e b E A L c. (.) NOTES:. IMENSIONING AN TOLERANCING PER ANSI Y.M, 9.. CONTROLLING IMENSION: MILLIMETER.. MOL GATE BURRS SHALL NOT EXCEE. MM PER SIE.. LEAFRAME TO MOLE BOY OFFSET IN HORIZONTAL AN VERTICAL SHALL NOT EXCEE. MM.. IMENSIONS A AN B EXCLUSIVE OF MOL GATE BURRS.. NO MOL FLASH ALLOWE ON THE TOP AN BOTTOM LEA SURFACE. MILLIMETERS INCHES IM MIN NOM MAX MIN NOM MAX A....9.. b...... c.......9..... E...... e. BSC. BSC e. BSC. BSC L...... H E..9....9 NOM NOM SOLERING FOOTPRINT*.............. SCALE : mm inches...... SCALE : mm inches.. Basic Styles and *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLERRM/.
NTHS ChipFET is a trademark of Vishay Siliconix. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORERING INFORMATION LITERATURE FULFILLMENT: Literature istribution Center for ON Semiconductor P.O. Box, Phoenix, Arizona USA Phone: 9 or Toll Free USA/Canada Fax: 9 9 or Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 9 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 9 Kamimeguro, Meguro ku, Tokyo, Japan Phone: ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NTHST/