N-Channel 30-V (D-S) MOSFET

Transcription

1 Si3456V N-Channel 3-V (-S) MOSFET PROUCT SUMMARY V S (V) R S(on) (Ω) I (A) d Q g (Typ.) 3.4 at V GS = V at V GS = 4.5 V 5.7 TSOP-6 Top View.8 nc FEATURES Halogen-free According to IEC efinition TrenchFET Power MOSFET Compliant to RoHS irective /95/EC APPLICATIONS Load Switch H C/C Converter 3 mm G 3.85 mm Marking Code AY XXX Ordering Information: Si3456V-T-E3 (Lead (Pb)-free) Si3456V-T-GE3 (Lead (Pb)-free and Halogen-free) S Part # Code Lot Traceability and ate Code (,, 5, 6) G (3) (4) S N-Channel MOSFET 6.3 ABSOLUTE MAXIMUM RATINGS T A = 5 C, unless otherwise noted Parameter Symbol Limit Unit rain-source Voltage V S 3 Gate-Source Voltage V GS ± V T C = 5 C Continuous rain Current (T J = 5 C) T C = 7 C 5. I T A = 5 C 5. a, b T A = 7 C 4. a, b A Pulsed rain Current I M Continuous Source-rain iode Current T C = 5 C. I T S A = 5 C.4 a, b Maximum Power issipation T C = 5 C.7 T C = 7 C.7 P T A = 5 C.7 a, b W T A = 7 C. a, b Operating Junction and Storage Temperature Range T J, T stg - 55 to 5 Soldering Recommendations (Peak Temperature) 6 C THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Maximum Junction-to-Ambient a, c t 5 s R thja 6 74 Maximum Junction-to-Foot (rain) Steady State R thjf C/W Notes: a. Surface Mounted on " x " FR4 board. b. t = 5 s. c. Maximum under steady state conditions is C/W. d. Based on T C = 5 C. ocument Number: 6975 S9-399-Rev. B, -Jul-9

2 Si3456V SPECIFICATIONS T J = 5 C, unless otherwise noted Parameter Symbol Test Conditions Min. Typ. Max. Unit Static rain-source Breakdown Voltage V S V GS = V, I = 5 µa 3 V V S Temperature Coefficient ΔV S /T J 3 I = 5 µa V GS(th) Temperature Coefficient ΔV GS(th) /T J - 5 mv/ C Gate-Source Threshold Voltage V GS(th) V S = V GS, I = 5 µa. 3 V Gate-Source Leakage I GSS V S = V, V GS = ± V ± na V S = 3 V, V GS = V Zero Gate Voltage rain Current I SS V S = 3 V, V GS = V, T J = 7 C µa On-State rain Current a I (on) V S 5 V, V GS = V 5 A rain-source On-State Resistance a V GS = V, I = 5. A.33.4 R S(on) V GS = 4.5 V, I = 4.5 A.4.5 Ω Forward Transconductance a g fs V S = 5 V, I = 5. A 5 S ynamic b Input Capacitance C iss 35 Output Capacitance C oss V S = 5 V, V GS = V, f = MHz 6 pf Reverse Transfer Capacitance C rss 3 V S = 5 V, V GS = V, I = 5 A 6 9 Total Gate Charge Q g.8 4. nc Gate-Source Charge Q gs V S = 5 V, V GS = 4.5 V, I = 5 A. Gate-rain Charge Q gd.8 Gate Resistance R g f = MHz Ω Turn-On elay Time t d(on) 8 Rise Time t r V = 5 V, R L = 3.8 Ω 3 Turn-Off elay Time t d(off) I 4 A, V GEN = 4.5 V, R g = Ω 6 5 Fall Time t f 7 Turn-On elay Time t d(on) 4 8 ns Rise Time t r V = 5 V, R L = 3.8 Ω 9 8 Turn-Off elay Time t d(off) I 4 A, V GEN = V, R g = Ω Fall Time t f 8 5 rain-source Body iode Characteristics Continuous Source-rain iode Current I S T C = 5 C. Pulse iode Forward Current I SM A Body iode Voltage V S I S = 4 A, V GS = V.8. V Body iode Reverse Recovery Time t rr ns Body iode Reverse Recovery Charge Q rr 4 8 nc I F = 4 A, di/dt = A/µs, T J = 5 C Reverse Recovery Fall Time t a 6 ns Reverse Recovery Rise Time t b 5 Notes: a. Pulse test; pulse width 3 µs, duty cycle %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ocument Number: 6975 S9-399-Rev. B, -Jul-9

3 Si3456V TYPICAL CHARACTERISTICS 5 C, unless otherwise noted V GS = V thru 4 V rain Current (A) I 5 V GS =3V I - rain Current (A) 3 T C = 5 C T C = 5 C T C =- 55 C 3 4 V S - rain-to-source Voltage (V) Output Characteristics V GS - Gate-to-Source Voltage (V) Transfer Characteristics.6 4 C iss - On-Resistance (Ω) R S(on) V GS = 4.5 V V GS =V C - Capacitance (pf) 3 C oss. 5 5 I - rain Current (A) On-Resistance vs. rain Current C rss V S - rain-to-source Voltage (V) Capacitance.7 - Gate-to-Source Voltage (V) I = 5. A V S =5V V S =4V R S(on) - On-Resistance (Normalized).5.3. V GS =V; I =5. A V GS =4.5V; I =4.5 A V GS Q g - Total Gate Charge (nc) Gate Charge T J -Junction Temperature ( C) On-Resistance vs. Junction Temperature ocument Number: 6975 S9-399-Rev. B, -Jul-9 3

4 Si3456V TYPICAL CHARACTERISTICS 5 C, unless otherwise noted. - Source Current (A) I S T J = 5 C T J = 5 C - On-Resistance (Ω) R S(on) T J =5 C T J =5 C V S -Source-to-rain Voltage (V) Source-rain iode Forward Voltage V GS - Gate-to-Source Voltage (V) On-Resistance vs. Gate-to-Source Voltage 5. (V) V GS(th) I = 5 µa Power (W) T J - Temperature ( C) Threshold Voltage... Time (s) Single Pulse Power Limited by R S(on) * - rain Current (A) I. T A =5 C Single Pulse BVSS Limited µa ms ms ms s,s C.. V S - rain-to-source Voltage (V) * V GS > minimum V GS at which R S(on) is specified Safe Operating Area, Junction-to-Ambient 4 ocument Number: 6975 S9-399-Rev. B, -Jul-9

5 Si3456V TYPICAL CHARACTERISTICS 5 C, unless otherwise noted 8 I - rain Current (A) T C - Case Temperature ( C) Current erating* Power (W)..4 Power (W) T C - Case Temperature ( C) T A -Ambient Temperature ( C) Power erating (T C ) Power erating (T A ) * The power dissipation P is based on T J(max) = 5 C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. ocument Number: 6975 S9-399-Rev. B, -Jul-9 5

6 Si3456V TYPICAL CHARACTERISTICS 5 C, unless otherwise noted uty Cycle =.5 Normalized Effective Transient Thermal Impedance Single Pulse Square Wave Pulse uration (s) Notes: Normalized Thermal Transient Impedance, Junction-to-Ambient P M t t t. uty Cycle, = t. Per Unit Base = R thja = C/W 3. T JM -T A =P M Z (t) thja 4. Surface Mounted uty Cycle =.5 Normalized Effective Transient Thermal Impedance.... Single Pulse Square Wave Pulse uration (s) Normalized Thermal Transient Impedance, Junction-to-Foot maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg? ocument Number: 6975 S9-399-Rev. B, -Jul-9

7 Package Information TSOP: 5/6 LEA JEEC Part Number: MO-93C e e E E E E 3 3 -B- -B- e b.5 M C B A e b.5 M C B A 5-LEA TSOP 6-LEA TSOP -A- R 4x.7 Ref c A A R L Gauge Plane.8 C -C- A Seating Plane 4x (L ) L Seating Plane MILLIMETERS INCHES im Min Nom Max Min Nom Max A A A b c E E e.95 BSC.374 BSC e L L.6 Ref.4 Ref L.5 BSC. BSC R Nom 7 Nom ECN: C-6593-Rev. I, 8-ec-6 WG: 554 ocument Number: 7 8-ec-6

8 AN83 Mounting LITTLE FOOT TSOP-6 Power MOSFETs Surface mounted power MOSFET packaging has been based on integrated circuit and small signal packages. Those packages have been modified to provide the improvements in heat transfer required by power MOSFETs. Leadframe materials and design, molding compounds, and die attach materials have been changed. What has remained the same is the footprint of the packages. The basis of the pad design for surface mounted power MOSFET is the basic footprint for the package. For the TSOP-6 package outline drawing see and see for the minimum pad footprint. In converting the footprint to the pad set for a power MOSFET, you must remember that not only do you want to make electrical connection to the package, but you must made thermal connection and provide a means to draw heat from the package, and move it away from the package. In the case of the TSOP-6 package, the electrical connections are very simple. Pins,, 5, and 6 are the drain of the MOSFET and are connected together. For a small signal device or integrated circuit, typical connections would be made with traces that are. inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. Since surface mounted packages are small, and reflow soldering is the most common form of soldering for surface mount components, thermal connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least. inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. REFLOW SOLERING surface-mount packages meet solder reflow reliability requirements. evices are subjected to solder reflow as a test preconditioning and are then reliability-tested using temperature cycle, bias humidity, HAST, or pressure pot. The solder reflow temperature profile used, and the temperatures and time duration, are shown in Figures and 3. Figure shows the copper spreading recommended footprint for the TSOP-6 package. This pattern shows the starting point for utilizing the board area available for the heat spreading copper. To create this pattern, a plane of copper overlays the basic pattern on pins,,5, and 6. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. Notice that the planar copper is shaped like a T to move heat away from the drain leads in all directions. This pattern uses all the available area underneath the body for this purpose Ramp-Up Rate 55 5 C Temperature Above 8 C +6 C/Second Maximum Seconds Maximum 7 8 Seconds.6.65 Maximum Temperature Time at Maximum Temperature 4 +5/ C 4 Seconds Ramp-own Rate +6 C/Second Maximum FIGURE. Recommended Copper Spreading Footprint FIGURE. Solder Reflow Temperature Profile ocument Number: Feb-4

9 AN C s (max) 4 C/s (max) 3-6 C/s (max) 4 7 C 7 C 3 C/s (max) 6- s (min) Pre-Heating Zone 6 s (max) Reflow Zone Maximum peak temperature at 4 C is allowed. FIGURE 3. Solder Reflow Temperature and Time urations THERMAL PERFORMANCE A basic measure of a device s thermal performance is the junction-to-case thermal resistance, R jc, or the junction-to-foot thermal resistance, R jf. This parameter is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device only, in other words, independent of the properties of the object to which the device is mounted. Table shows the thermal performance of the TSOP-6. TABLE. Equivalent Steady State Performance TSOP-6 Thermal Resistance R jf 3 C/W r S(on) On-Resiistance (Normalized) On-Resistance vs. Junction Temperature V GS = 4.5 V I = 6. A SYSTEM AN ELECTRICAL IMPACT OF TSOP-6 In any design, one must take into account the change in MOSFET r S(on) with temperature (Figure 4) T J Junction Temperature ( C) FIGURE 4. Si3434V ocument Number: Feb-4

10 Application Note 86 RECOMMENE MINIMUM PAS FOR TSOP-6.99 (.5) APPLICATION NOTE.8 (.699).9 (3.3).64 (.66).39 (.). (.58).9 (.493) Recommended Minimum Pads imensions in Inches/(mm) Return to Index Return to Index ocument Number: 76 6 Revision: -Jan-8

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