Microelectronic Devices and Circuits Lecture 18 - Single Transistor Amplifier Stages - Outline Announcements Exam Two Results -

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6.012 Microelectronic Devices and Circuits Lecture 18 Single Transistor Amplifier Stages Outline Announcements Exam Two Results Exams will be returned tomorrow (Nov 13). Review Biasing and amplifier metrics Midband analysis: Biasing capacitors: short circuits above ω LO Device capacitors: open circuits below ω HI Midband: ω LO < ω < ω HI Current mirror current source/sink biasing: on source terminal Performance metrics: gains (voltage, current, power); input and output resistances; power dissipation; bandwidth Multistage amplifiers: twoport analysis; current source/sink chains Buildingblock stages Common source Common gate Source follower Series feedback Shunt feedback (also called "common drain") (more commonly: "source degeneracy") Clif Fonstad, 11/12/09 Lecture 18 Slide 1

Midband: the frequency range of constant gain and phase Common emitter example: V V C O C E v t r t g! gm v! r IBIAS v! C! C µ C E g LOAD C O gnext Biasing capacitors: effective shorts ω > ω LO Device capacitors: effective open circuits ω < ω HI We call the frequency range between ω LO and ω HI, the "midband" range. For frequencies in this range our model is simply: ω LO <ω<ω HI v t r t v g! in v! g m v! g l ( g LOAD g next ) Valid for ω LO < ω < ω HI, the "midband" range, where all bias Clif Fonstad, 11/12/09 capacitors are shorts and all device capacitors are open. Lecture 18 Slide 2

Midband, cont: The midband range of frequencies In this range of frequencies the gain is a constant, and the phase shift between the input and output is also constant (either 0 or 180 ). log A vd Midband Range! LO! LO *! HI *! HI log!! b! a! d! c! 4! 5! 2! 1! 3 All of the parasitic and intrinsic device capacitances are effectively open circuits All of the biasing and coupling capacitors are effectively short circuits * We will learn how to estimate ω HI and ω LO in Lectures 23/24. Clif Fonstad, 11/12/09 Lecture 18 Slide 3

Linear equivalent circuits for transistors (dynamic): Collectinur results for the MOSFET and BJT biased in FAR No velocity saturation; α = 1 MOSFET: g v gs C gd C g m v gs g mb v bs gs s s v bs C db C sb b C gb d g m = K[ V GS "V T (V BS )][ 1 #V DS ] $ 2K I D = K [ 2 V GS "V T (V BS )] 2 # $ # I D = I D V A g mb = % g m = % C gs = 2 3 W LC * ox, C sb,c gb,c db : depletion capacitances C gd = W C * * gd, where C gd 2K I D with % & " 'V T 'v BS Q = 1 * C ox ( Si qn A q) p "V BS is the GD fringing and overlap capacitance per unit gate length (parasitic) BJT: b e g! v! C! Clif Fonstad, 11/12/09 C µ g m v! C " = g m # b BE depletion cap. with # b $ w 2 B, 2D e c e g m = q kt " oi BS e qv kt BE [ 1 #V CE ] $ q I C kt g % = g m " o = qi C " o kt = " o I BS e qv BE [ kt 1] # $ # I C = I C V A C µ : BC depletion cap. Lecture 18 Slide 4

Biasing a MOSFET stage with a MOSFET current mirror: Above: Concept V I D V Right: Implementation V Note: Q 2 is always in saturation. As long as Q 3 is also in saturation, its drain current will be (K Q3 /K Q2 ) I REF. Clif Fonstad, 11/12/09 V I D R REF Q 1 I REF Q 2 Q 3 The design process: We have a target I D, and we want to know what size to make R REF to get it. For simplicity we can make K Q3 = K Q2, so I REF = I D. Select a K Q2, perhaps that corresponding to a minimum size device. Calculate what V GS2 (= V REF ) is when Q 2 's drain current is I REF : V REF = V T (2 I REF /K Q2 ) 1/2 What R REF must be to make Q 2 's drain current I REF can then be found from: R REF = [(V V ) V REF ]/I REF If R REF has this value, then Q 3 's drain current will be I REF as long as it is in saturation. Lecture 18 Slide 5

Linear amplifier basics: Biasing multistage amplifiers V REF1 Q CS2 V Q CS4 I CS2 I CS4 R REF Stage #1 Stage #2 Stage #3 Stage #4 Stage #5 v Out I CS1 I CS3 I CS5 Q REF Q CS1 Q CS3 Q CS5 V REF2 V The current mirror voltage reference method can be extended to bias multiple stages, and one reference chain can be used to provide V REF to all the sources and sinks in an amplifier. Clif Fonstad, 11/12/09 Lecture 18 Slide 6

Linear amplifier basics: Biasing multistage amplifiers. cont. V I CS2 I CS4 Stage #1 Stage #2 Stage #3 Stage #4 Stage #5 v Out I CS1 I CS3 I CS5 V When looking at a complex circuit schematic it is useful to identify the voltage reference chain and the biasing transistors and replace them all by current source symbols. This can reduce the apparent complexity dramatically. Clif Fonstad, 11/12/09 Lecture 18 Slide 7

Linear amplifier basics: performance metrics The characteristics of linear amplifiers that we use to compare different amplifier designs, and to judge their performance and suitability for a given application are given below: i out Linear Amplifier Rest of circuit Voltage gain, A v = / Current gain, A i = i out / Power gain, A power = P out /P in = i out / = A v A i Input resistance, r in = / i test Linear Amplifier v test Output resistance, r out = v test /i test with = 0 DC Power dissipation, P DC = (V V )(Σ 's) Clif Fonstad, 11/12/09 Lecture 18 Slide 8

Linear amplifier basics: multistage structure; twoports Linear Amplifier LEC i out External Load The typical linear amplifier is comprised of multiple building block stages, often such as the single transistor stages we introduced on Slide 14 (and which will be the topic of Lect. 19): i out Stage Stage Stage Stage #1 #2 #n1 #n LEC LEC LEC LEC External Load A useful concept and tool for analyzing, as well as designing, such multistage amplifiers is the twoport representation. Note: More advanced multistage amplifiers might include feedback, the couplinf the outputs of some stages to the Clif Fonstad, 11/12/09 inputs of preceding stages. This is not shown in this figure. Lecture 18 Slide 9

Linear amplifier basics: twoport representations Each building block stage can be represented by a "twoport" model with either a Thévenin or a Norton equivalent at its output: Stage # i LEC Twoports can simplify the analysis and design of multistage amplifiers: i out,j i out R o or G o A v v G i in or R or i R f Thévenin Output i out G m v G i G o in or R or A i or i R o Norton Output i out,j =,j1 i out,j1 =,j2 G m,j v,j = in,j,j1 G i,j G,j1 o,j G i,j1 G o,j1 =,j2 Gm,j1,j1 Stage j Stage j1 Clif Fonstad, 11/12/09 Lecture 18 Slide 10

Linear amplifier layouts: The practical ways of putting inputs to, and takinutputs from, transistors to form linear amplifiers V V There are 12 choices: three possible nodes to connect to the input, and for each one, two nodes from which to take an output, and two choices of 2 2 what to do with the remaining 1 1 node (ground it or connect it 3 3 to something). Not all these choices work well, however. In fact only three do: V V Name Input Output Grounded Common source/emitter 1 2 3 Common gate/base 3 2 1 Common drain/collector 1 3 2 (Source/emitter follower) Source/emitter degeneration 1 2 none Clif Fonstad, 11/12/09 Lecture 18 Slide 11

Three MOSFET singletransistor amplifiers V V V V C O out C E COMMON SOURCE Input: gate Output: drain Common: source Substrate: to source V C I C O v IN COMMON GATE Input: source; Output: drain Common: gate Substrate: to ground V C O SOURCE FOLLOWER Input: gate Output: source Common: drain Substrate: to source Clif Fonstad, 11/12/09 Lecture 18 Slide 12

Singletransistor amplifiers with feedback V V C R F O C O vout R F C E C E V PARALLEL FEEDBACK* R F V SERIES FEEDBACK R F Clif Fonstad, 11/12/09 * Also termed "source degeneracy" Lecture 18 Slide 13

Common source amplifier V Common source Input to gate Output from drain Source common to input and output, and grounded C O External Load C E v t r t V g d = v gs s,b g m v gs s,b g sl Midband LEC for common source g el Clif Fonstad, 11/12/09 Lecture 18 Slide 14

Common source amplifier, cont. v t r t g d = v gs s,b g m v gs s,b g sl g el Twoports: = " G i G m g m g = " m v t a large # g sl g el g sl g el i out G o R o i out G i A v v in G i = 0 ( R i = ") G o = ( g sl ) G m = "g m g m A v = " g sl # % $ = G m G o & ( ' A good workhorse gain stage Clif Fonstad, 11/12/09 Lecture 18 Slide 15

Source follower (common drain) amplifier Source Follower (Common drain) Input to gate Output from source Drain common to input and output, and incrementally grounded V V C O External Load Midband LEC for source follower (common drain) v t r t g s v gs g m v gs g mb v bs d,b v bs s g cs g el =v ds =v bs Clif Fonstad, 11/12/09 Lecture 18 Slide 16

Source follower (common drain) amplifier, cont. = v t r t Twoports: v gs = R o i out G i A v v in g s g cs g el v g g out mb o g m v gs d,b ( ) g m " # = g mb g cs g el s d,b g m g m g mb g cs g el $ g m g m g mb = 1 % G i G m A v " 1 G i = 0 ( R i = ") G m = A v G o = g m 1 # G o = ( g m g mb g cs ) " ( g m g mb ) = ( 1 #)g m A great output buffer stage with small R out and Clif Fonstad, 11/12/09 large R in ; A v 1, A i large. Lecture 18 Slide 17 i out G o 1

Common gate amplifier Common Gate Input to source Output from drain Gate common to input and output, and grounded V C O C I External Load Midband LEC for common gate g V v IN g m v gs Clif Fonstad, 11/12/09 Lecture 18 Slide 18 d v t r t s = v bs = v gs b g mb v bs s g sl g el

Common gate amplifier, cont. v t r t Voltage gain KCL at drain node: s = v sg g,b (g m g mb )v sg ( ) g sl g el ( g m g mb ) = ( g sl g el ) ( ) " = g g g m mb o ( ) Current gain Current divider g sl /g el noting that = i d : = g sl g el ( ) = i out d g,b g el " i out = g el g sl g el i out g sl Input resistance Use ( ) and ( ) expressions:) # g el ( 1 $ )g m g sl g el ( ) 1 if g sl small ( ) a large # = ( ) ( g sl g el ), = g g g m mb o ( g sl g el ) R in = ( g = sl g el ) ( g sl g el )( g m g mb ) " 1 ( g m g mb ) = 1 " ( 1 #)g m small Clif Fonstad, 11/12/09 Lecture 18 Slide 19

Common gate amplifier, cont. r t s v sg g,b (g m g mb )v sg d g,b i test* v test* i test g sl v test Output resistance Set v t = 0, and apply v test* to output; find i test* : i test* = ( v test* " i test* r t ) " ( g m g mb )i test* r t # G o = g sl i test* = g sl v test* Twoport: R i "1 ( 1 #)g m ( R i very small) A i = g el ( ) " 1 R i A i g el g sl G o " g sl 1 r t g m g mb ( ) ( R o very large) ( ) 1 r t g m g mb a small # A very small R i, very large R o stage often used Clif Fonstad, 11/12/09 Lecture 18 Slide 20 to complement other stages; A i 1, A v large. i out R o

Series Feedback: source degeneracy V Series feedback Output signal fed back to the input through a passive element that is common to the input and output circuits. Useful in discrete device circuit design; we use it to understand commonmode gain suppression in differential amplifiers R F C O C E Midband LEC: v t r t v gs g m v gs g sl g s,b R F d s,b V g el We find: A v = " #r l R F ( ) r l $1 g sl g el Clif Fonstad, 11/12/09 Lecture 18 Slide 21

Feedback: shunt feedback element V Shunt feedback Output signal fed back to the input through a passive element forming a bridge between the input and output. Used to stabilize high gain circuits and in transimpedance amplifiers; the same topology leads to the Miller effect. (Lec 23) Midband LEC: v t g m v gs R F r t g R F d = v gs s,b s,b V g sl C O C E g el We find: A v = " #g m R F Clif Fonstad, 11/12/09 Lecture 18 Slide 22

Summary of the single transistor stages (MOSFET) MOSFET Common source " Common gate Source follower Source degeneracy (series feedback) Shunt feedback [ ] Voltage Current Input Output gain, A v gain, A i resistance, R i resistance, R o g m ( ' = "g m r ) l g # # r $ = 1 ' & o g ) l % ( o ' 1 * [ g m g mb ] r l *1 * * r [ g m g mb ] o 1 g m g mb g, o g t [ ] [ g m ] [ g m g mb g l ] *1 # # 1 [ g m g l ] * 1 g m [ ] [ ] " g " G m F G F * " r l R F # # * r o * "g m R F " g l 1 G F G F 1" A v [ ] $ r o R F & = % 1 [ ] G F ' ) (. / 0 Power gain, A p = A v " A i Clif Fonstad, 11/12/09 Note: When v bs = 0 the g mb factors should be deleted. Lecture 18 Slide 23

6.012 Microelectronic Devices and Circuits Lecture 18 Single Transistor Amplifier Stages Summary Amplifier Buildingblocks single transistor stages Common source: good voltage and current gain large R in and R out good gain stage Common gate: very small R in ; very large R out unity current gain; good voltage gain will find paired with other stages to form "cascode" Source follower: very small R out ; very large R in unity voltage gain; good current gain an excellent output stage or buffer Series feedback: moderate voltage gain dependant on resistor ratio Shunt feedback: used in transimpedance amplifiers Clif Fonstad, 11/12/09 Lecture 18 Slide 24

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