W DO-4 Surmetic 0 Zener Voltage Regulators This is a N9xxBRNG series with limits and excellent operating characteristics that reflect the superior capabilities of silicon oxide passivated junctions. All this in an axial lead, transfer molded plastic package that offers protection in all common environmental conditions. Features Zener Voltage Range. V to 00 V ESD Rating of Class (>6 KV) per Human Body Model Surge Rating of 98 W @ ms Maximum Limits Guaranteed on up to Six Electrical Parameters Package No Larger than the Conventional W Package This is a Pb Free Device Mechanical Characteristics CASE: Void free, transfer molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are readily solderable MAXIMUM LEAD TEMPERATURE FOR SOLDERING PURPOSES: 60 C, /6 from the case for seconds POLARITY: Cathode indicated by polarity band MOUNTING POSITION: Any MAXIMUM RATINGS Rating Symbol Value Unit Max. Steady State Power Dissipation @ T L = 7 C, Lead Length = /8 Derate above 7 C P D.0 4 W mw/ C Steady State Power Dissipation @ T A = 0 C Derate above 0 C P D.0 6.67 W mw/ C Operating and Storage Temperature Range T J, T stg 6 to +00 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. C Cathode ORDERING INFORMATION Device Package Shipping N9xxBRNG Axial Lead (Pb Free) Anode AXIAL LEAD CASE 9AB STYLE MARKING DIAGRAM A N 9xxR YYWW A = Assembly Location N9xxR = Device Number YY = Year WW = Work Week = Pb Free Package (Note: Microdot may be in either location) 000 Units / Box For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD80/D. *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 0 January, 0 Rev. 0 Publication Order Number: N99BRN/D
ELECTRICAL CHARACTERISTICS (T L = 0 C unless otherwise noted, V F =. V Max @ I F = 00 madc for all types) I F I Symbol Parameter V Z Reverse Zener Voltage @ I ZT I ZT Z ZT I ZK Reverse Current Maximum Zener Impedance @ I ZT Reverse Current V R V Z I R I ZT V F V Z ZK Maximum Zener Impedance @ I ZK I R V R I F V F I ZM Reverse Leakage Current @ V R Breakdown Voltage Forward Current Forward Voltage @ I F Maximum DC Zener Current Zener Voltage Regulator
ELECTRICAL CHARACTERISTICS (T L = 0 C unless otherwise noted, V F =. V Max @ I F = 00 madc for all types) Device (Note ) Device Marking Zener Voltage (Note ) Zener Impedance (Note ) Leakage Current V Z (Volts) @ I ZT Z ZT @ I ZT Z ZK @ I ZK I R @ V R Min Nom Max ma ma A Max Volts ma N99BRNG N99R 4..7.0 9 600 0..4 0 N9BRNG N9R 9.00 0.00 8.7 4 60 0.. 7 N94BRNG N94R.80 4.0.6 9 700 0. 8. 6 The G suffix indicates Pb Free package available.. TOLERANCE AND TYPE NUMBER DESIGNATION Tolerance designation device tolerance of ±% are indicated by a B suffix.. ZENER VOLTAGE (V Z ) MEASUREMENT ON Semiconductor guarantees the zener voltage when measured at 90 seconds while maintaining the lead temperature (T L ) at 0 C ± C, /8 from the diode body.. ZENER IMPEDANCE (Z Z ) DERIVATION The zener impedance is derived from 60 seconds AC voltage, which results when an AC current having an rms value equal to % of the DC zener current (I ZT or I ZK ) is superimposed on I ZT or I ZK. I ZM P D, STEADY STATE DISSIPATION (WATTS) 4 L = /8 L = LEAD LENGTH TO HEAT SINK 0 0 0 40 60 80 0 0 40 60 80 00 T L, LEAD TEMPERATURE ( C) Figure. Power Temperature Derating Curve
θjl (t, D), TRANSIENT THERMAL RESISTANCE JUNCTION TO LEAD ( C/W) 0 0. 0. 0. 0.0 0.0 0.0 0. D = 0 0.0 0.000000 P PK Figure. Typical Thermal Response L, Lead Length = /8 Inch t t DUTY CYCLE, D = t /t SINGLE PULSE T JL = JL (t)p PK REPETITIVE PULSES T JL = JL (t,d)p PK JL (t,d) = D * JL ( )+( D) * JL (t) [where JL (t) is D = 0 curve] 0.00000 0.0000 0.000 0.00 0.0 0. 0 t, TIME (SECONDS) P PK, PEAK SURGE POWER (WATTS) K 00 00 00 0 0 0 0 RECTANGULAR NONREPETITIVE WAVEFORM T J = C PRIOR TO INITIAL PULSE 0. 0. 0. 0. 0 0 0 0 PW, PULSE WIDTH (ms) Figure. Maximum Surge Power IR, REVERSE LEAKAGE (μ Adc) @ VR AS SPECIFIED IN ELEC. CHAR. TABLE 0. 0. 0. 0.0 0.0 0.0 0.00 T A = C 0.00 T A = C 0.00 0.000 0.000 0 0 0 00 400 00 NOMINAL V Z (VOLTS) Figure 4. Typical Reverse Leakage 4
APPLICATION NOTE Since the actual voltage available from a given zener diode is temperature dependent, it is necessary to determine junction temperature under any set of operating conditions in order to calculate its value. The following procedure is recommended: Lead Temperature, T L, should be determined from: T L = LA P D + T A LA is the lead-to-ambient thermal resistance ( C/W) and P D is the power dissipation. The value for LA will vary and depends on the device mounting method. LA is generally 0 40 C/W for the various clips and tie points in common use and for printed circuit board wiring. The temperature of the lead can also be measured using a thermocouple placed on the lead as close as possible to the tie point. The thermal mass connected to the tie point is normally large enough so that it will not significantly respond to heat surges generated in the diode as a result of pulsed operation once steady-state conditions are achieved. Using the measured value of T L, the junction temperature may be determined by: T J = T L + T JL T JL is the increase in junction temperature above the lead temperature and may be found from Figure for a train of power pulses (L = /8 inch) or from Figure for dc power. T JL = JL P D For worst-case design, using expected limits of I Z, limits of P D and the extremes of T J ( T J ) may be estimated. Changes in voltage, V Z, can then be found from: V = VZ T J VZ, the zener voltage temperature coefficient, is found from Figures and 6. Under high power-pulse operation, the zener voltage will vary with time and may also be affected significantly by the zener resistance. For best regulation, keep current excursions as low as possible. Data of Figure should not be used to compute surge capability. Surge limitations are given in Figure. They are lower than would be expected by considering only junction temperature, as current crowding effects cause temperatures to be extremely high in small spots resulting in device degradation should the limits of Figure be exceeded.
TEMPERATURE COEFFICIENT RANGES (90% of the Units are in the Ranges Indicated), TEMPERATURE COEFFICIENT (mv/ C) @ I ZT θvz 8 6 4 0 - RANGE -4 4 6 7 8 9 V Z, ZENER VOLTAGE @ I ZT (VOLTS), TEMPERATURE COEFFICIENT (mv/ C) @ IZT θvz 00 00 00 0 0 0 0 0 0 00 400 00 V Z, ZENER VOLTAGE @ I ZT (VOLTS) Figure. Units To Volts Figure 6. Units To 400 Volts I Z, ZENER CURRENT (ma) 0 0 0 0 0. 0. 0. ZENER VOLTAGE versus ZENER CURRENT (Figures 7, 8 and 9) 0. 0 4 6 7 8 9 V Z, ZENER VOLTAGE (VOLTS) I Z, ZENER CURRENT (ma) 0 0 0 0 0. 0. 0. 0. 0 0 0 40 0 60 70 80 90 0 V Z, ZENER VOLTAGE (VOLTS) Figure 7. V Z =. thru Volts Figure 8. V Z = thru 8 Volts ( C/W) 80 I Z, ZENER CURRENT (ma) 0. 0. 0. 0 0 00 0 00 0 400 V Z, ZENER VOLTAGE (VOLTS) θ JL, JUNCTION TO LEAD THERMAL RESISTANCE 70 60 0 40 0 0 0 EQUAL CONDUCTION THROUGH EACH LEAD 0 /8 /4 /8 / /8 /4 7/8 L, LEAD LENGTH TO HEAT SINK (INCH) L T L L Figure 9. V Z = 0 thru 400 Volts Figure. Typical Thermal Resistance 6
PACKAGE DIMENSIONS AXIAL LEAD CASE 9AB ISSUE O K F B D POLARITY INDICATOR OPTIONAL AS NEEDED (SEE STYLES) A F K NOTES:. CONTROLLING DIMENSION: INCHES.. PACKAGE CONTOUR IS OPTIONAL WITHIN DIMENSIONS A AND B. HEAT SLUGS, IF ANY, SHALL BE WITHIN DIMENSION B BUT NOT SUBJECT TO ITS MINIMUM VALUE.. DIMENSION A DEFINES THE ENTIRE BODY INCLUDING HEAT SLUGS. 4. DIMENSION B IS MEASURED AT THE MAXIMUM DIAMETER OF THE BODY.. POLARITY SHALL BE DENOTED BY A CATHODE BAND. 6. LEAD DIAMETER, D, IS NOT CONTROLLED IN ZONE F. 7. ALL RULES AND NOTES ASSOCIATED WITH JEDEC DO 4 OUTLINE SHALL APPLY INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.6 0.0 4..0 B 0.079 0.6.00.70 D 0.08 0.04 0.7 0.86 F 0.00.7 K 0.40.70 STYLE : PIN. CATHODE (POLARITY BAND). ANODE SURMETIC is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado 807 USA Phone: 0 67 7 or 800 44 860 Toll Free USA/Canada Fax: 0 67 76 or 800 44 867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800 8 98 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 4 790 9 Japan Customer Focus Center Phone: 8 87 0 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative N99BRN/D