Differential Amplifier Offset. Causes of dc voltage and current offset Modeling dc offset R C



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ESE39 ntroduction to Microelectronics Differential Amplifier Offset Causes of dc voltage and current offset Modeling dc offset mismatch S mismatch β mismatch transistor mismatch dc offsets in differential amplifiers due to component mismatch can be modeled as differential phenomena Kenneth R. Laker update KRL5Oct3

ESE39 ntroduction to Microelectronics C V CC C - VO + Q Q V CC. Let the ac sources be zero, i.e. the bases of matched Q & Q are connected to ground.. To further simplify, let there be no external base R B and emitter resistors R E. 3. Let the mismatch be in where. =V C V C = C C Since Q=Q and is fixed, currents are matched i.e. C = C = = Kenneth R. Laker update KRL5Oct3 f =0 C = C C = C = =

ESE39 ntroduction to Microelectronics Assume matched currents: C = C = Kenneth R. Laker update KRL5Oct3 Split the mismatch between both collector resistors, and decompose into common and differential components: v id / = = (common) Solving for & : v ic v id / Let: s.t. = =R C = = (differential - mismatch) 3

ESE39 ntroduction to Microelectronics Hence : C C = = V R Odm C R C R C or: random variable (rv) Recall: = C C = output offset voltage ff balanced, = : =0V C = C = Kenneth R. Laker update KRL5Oct3 4

ESE39 ntroduction to Microelectronics Collector-collector voltage due to resistor mismatch: -V OS 0 V = Define the input offset voltage as that input voltage that will cancel. f the amplifier differential gain is A vdm : V OS is highly variable, rv & can be + or - V OS A vdm nput offset voltage is the output offset voltage referred to the input due to mismatch. Kenneth R. Laker update KRL5Oct3 5

ESE39 ntroduction to Microelectronics 0 V V OS = g m -V OS g m = C = V OS = A vdm where = A vdm =g m nput referred offset due to Δ mismatch: V OS RC = random variable Kenneth R. Laker update KRL5Oct3 6

ESE39 ntroduction to Microelectronics Offset Voltage From Transistor Mismatch Perfect balance requires: =0 C = C + - Previous case considered & Q = Q => C = C. Consider now Q Q => C C. ASSUME:. = =. = 3. = Only difference is in the saturation currents of the transistors, i.e. S S Kenneth R. Laker update KRL5Oct3 7

ESE39 ntroduction to Microelectronics + - Again using common and differential mode concepts: S = S S S = S S The two transistor saturation currents are: v ic S = S S S = S S v id / v id / Kenneth R. Laker update KRL5Oct3 8

ESE39 ntroduction to Microelectronics C S e / Cdm / S e / S e/ C C S e = S S e Cdm / S e / Vee C S e = S S e C S e / Kenneth R. Laker update KRL5Oct3 9

ESE39 ntroduction to Microelectronics Cdm / S e / Large signal Model: C Cdm / C C S e / S C S e / S e/ e / S e / Vee also C C S e C S S e S e S S e S C S e e The parallel current sources are illustrated in the schematic. Kenneth R. Laker update KRL5Oct3 0

ESE39 ntroduction to Microelectronics Note: differential C components cause current flow in opposite directions through the 's resulting in an offset voltage. The common C components cause no offset voltage. C S S C S e C S e S e V S e T S S C S S = C C S S Kenneth R. Laker update KRL5Oct3

ESE39 ntroduction to Microelectronics S S S S g m S S Recall: g m = C V OS S = A vdm = g m S S V OS S S S random variable Kenneth R. Laker update KRL5Oct3

ESE39 ntroduction to Microelectronics Offset Voltage Summary. We considered two sources of offset voltage: a. Unbalanced collector resistors b. Unbalanced saturation currents i. Due to mismatched transistor geometries. We ignored base or emitter circuit unbalance 3. Since the relationship between resistor and current unbalances are random and assumed independent, we combine their effect as an rms quantity: V OS rms = V OS RC V OS S = Kenneth R. Laker update KRL5Oct3 S S 3

ESE39 ntroduction to Microelectronics Average & Offset Base (input) Bias Currents Consider the case where the base currents differ B B. B B Since B & B are related to bias current, their mismatch may be due to β β. E = E = Let's represent β & β in terms of differential & common components: v i cm = v id / = v id / Kenneth R. Laker update KRL5Oct3 4

ESE39 ntroduction to Microelectronics Using this notation, the two base currents are: B B = = = For x << we can expand the fraction as the series: x = x x x 3... x where = x ± nonlinear f(δβ) Kenneth R. Laker update KRL5Oct3 5

ESE39 ntroduction to Microelectronics Using the expansion and approximating : B B OS B B = (input offset current) B = B B Since the input bias current B is defined as: The base or input offset current can also be written as: OS = B = Kenneth R. Laker update KRL5Oct3 6

ESE39 ntroduction to Microelectronics DC Offset Voltage & Current Summary. DC offset voltage and current occur due to mismatches in the BJT differential amplifier external resistors and transistor parameters ( s and β).. These mismatches are imperfections that are inherent to all differential amplifiers and their applications (e.g. op amps). 3. DC offset voltage and current are statistical quantities, i.e. no two differential amplifiers will have the same offset voltage and current. 4. MOS differential amplifiers have zero input offset current. Kenneth R. Laker update KRL5Oct3 7