Building a computer. Electronic Numerical Integrator and Computer (ENIAC)

Building a computer Electronic Numerical Integrator and Computer (ENIAC) CSCI 255: Introduc/on to Embedded Systems Keith Vertanen Copyright 2011

Layers of abstrac<on abstrac<on building blocks examples computer components Macbook Pro components sequen<al circuits mul<plexer, demul<plexer, adder, flip- flop logic gates, connectors, clock registers, ALU, counter flip- flop combina<onal circuit logic gates, connectors mul<plexer, demul<plexer, adder logic gates switches, connectors AND, OR, NOT clock raw materials crystal oscillator connector raw materials wire switch raw materials transistor, relay 2

Connector Goal: conduct electricity + = big hole miners wire 3

Clock Goal: periodic signal for synchroniza<on + = quartz crystal electricity clock signal 4

Switch Goal: allow electricity to be turned on & off + + = spring magnet wire switch Examples: NOT, OR, AND, NOR, NAND, XOR 5

Logic gates Goal: compute simple Boolean func<ons + = wire switch NOT gate + + = wire switch switch OR gate Examples: NOT, OR, AND, NOR, NAND, XOR 6

Combina<onal circuit Goal: compute any Boolean func<ons x y F(x,y) 0 0 0 0 1 1 1 0 1 + + = 1 1 0 truth table logic gates wire combina<onal circuit Examples: odd, majority, mul<plexer, demul<plexer, adder 7

Sequen<al circuit Goal: store persistent state + + = logic gates wire clock sequen<al circuit Examples: SR latch, D flip- flop, JK flip- flop, T flip- flop 8

Components Goal: provide high- level func<onality + = combina<onal circuits sequen<al circuits component Examples: register, register bank, mul<port register bank, synchronous counter, ALU 9

Computer Goal: store and process data according to a program + + = input components output computer 10

Computer Three major components Central Processing Unit (CPU) Performs opera<ons Memory Where data / program is stored Input / Output (I/O) system Get input, show results 11

Input/output configura<ons I/O CPU Memory CPU coordinates transfer between I/O and memory CPU Memory I/O Direct Memory Access (DMA) Bus: wires carrying informa<on between components 8- bit bus in Logisim 12

Bus width 4- bit Intel 4004 8- bit Intel 8052 16- bit Intel 80286 32- bit Intel 80386 32- bit Intel 80486 32- bit Intel Pen<um Pro 64- bit AMD Opteron 128- bit??? 13

Connec<ng CPU & Memory address bus CPU data bus control and status bus Memory Performs opera<ons Address bus Where CPU puts address of memory it wants Data bus Where memory puts data from requested address Control and status bus Stores operands and results Determines direc<on and coordinates <ming 14

CPU Central Processing Unit (CPU) The brains of the computer Main components: Arithme<c Logic Unit (ALU) Perform math and logic opera<ons Control Unit (CU) Fetching and decoding instruc<ons from memory Execu<ng instruc<ons by direc<ng sequence of transfers and opera<ons 15

Central Processing Unit (CPU) Control Unit (CU) Program Counter (PC) InstrucDon Register (IR) Memory address register Memory data register Address bus Data bus InstrucDon decoder Control and status bus General purpose registers ArithmeDc and Logic Unit (ALU) 16

Computer architecture Princeton's fic<<ous TOY computer's wiring. 17

Our "simple" ALU First input Output of calcula<on 2 bits on this line Second input 4 bits on these lines Business end of the ALU, compute all opera<ons in parallel Which type of thing to output, 00 = ADD, 01 = SUB, 10 = AND, 11 = XOR 18

ALU data paths 1 st input, current contents of accumulator 2 nd input, read from data bus A ALU B Result replaces old value in accumulator Accumulator (A) Memory data bus Control and status bus 19

Goal: 8052 adding numbers Add value in register 0 and 1 Put result in register 2 One- liner in C: r2 = r0 + r1; 20

Opcode ADD Adds values Example 8052 opcode InstrucDons OpCode Bytes Cycles Flags ADD A,#data 0x24 2 1 C, AC, OV ADD A,direct 0x25 2 1 C, AC, OV ADD A,@R0 0x26 1 1 C, AC, OV ADD A,@R1 0x27 1 1 C, AC, OV ADD A,R0 0x28 1 1 C, AC, OV ADD A,R1 0x29 1 1 C, AC, OV ADD A,R2 0x2A 1 1 C, AC, OV ADD A,R3 0x2B 1 1 C, AC, OV ADD A,R4 0x2C 1 1 C, AC, OV ADD A,R5 0x2D 1 1 C, AC, OV ADD A,R6 0x2E 1 1 C, AC, OV ADD A,R7 0x2F 1 1 C, AC, OV 21

Opcode MOV Example 8052 opcode Move memory InstrucDons OpCode Bytes Cycles Flags MOV A,R0 0xE8 1 1 None MOV A,R1 0xE9 1 1 None MOV A,R2 0xEA 1 1 None MOV A,R3 0xEB 1 1 None MOV A,R4 0xEC 1 1 None MOV A,R5 0xED 1 1 None MOV A,R6 0xEE 1 1 None MOV A,R7 0xEF 1 1 None MOV R0,A 0xF8 1 1 None MOV R1,A 0xF9 1 1 None MOV R2,A 0xFA 1 1 None MOV R3,A 0xFB 1 1 None 22

Goal: 8052 adding numbers Add value in register 0 and 1 Put result in register 2 Takes sequence of 3 instruc<ons in 8052 assembly: MOV A, R0 ADD A, R1 MOV R2, A Reflec<on of the underlying hardware reali<es 23

Control Unit (CU) Control Unit Fetches instruc<ons from memory Decodes instruc<ons Executes instruc<ons Sequence of data transfers & opera<ons Control Unit (CU) Program Counter (PC) Memory address register Address bus InstrucDon Register (IR) Memory data register Data bus InstrucDon decoder Control and status bus 24

Fetch- execute cycle Fetch Get the next instruc<on from memory Execute Perform data transfers and opera<ons Program counter (PC) provides the loca<on Retrieve addi<onal bytes as required by desired instruc<on 25

Fetch phase Fetch phase Control unit (CU) places program counter (PC) on memory address bus Starts memory read opera<on Increments program counter (PC) Wait for memory read to finish Copy value on memory data bus to instruc<on register (IR) Fetch Execute 26

Execute phase Execute phase First byte of instruc<on contains opera<on code (opcode) CU decodes opcode Details opcode specific May load addi<onal data from memory May place constants on data bus Put values on status and control bus (e.g. desired ALU opera<on) Fetch Execute 27

Memory architecture Harvard architecture Code and data stored in separate areas Program cannot accidently modify itself Example: 8052 256 bytes data memory (on chip) Code memory, EPROM or Flash (AT89S8253 12KB flash) Von Neumann architecture Code and data in same area Loaded at boot <me from device (e.g. hard drive) Example: modern PCs 28

8052 memory architecture 128 + 128 bytes Port 0-3, serial port, <mers, interrupts AT89S8253 12KB flash 29

8052 memory addresses 30

Building a computer Summary Raw materials switches gates circuits components computer Computer CPU + memory + I/O Fetch- and- execute cycle Assembly programming 8052 Some<mes tedious, but reflects hardware reali<es inside computer! 31