COMPUTER ARCHITECTURE IMPORTANT QUESTIONS FOR PRACTICE

Transcription

1 COMPUTER ARCHITECTURE IMPORTANT QUESTIONS FOR PRACTICE 1. How many bits wide memory address have to be if the computer had 16 MB of memory? (use the smallest value possible) 2. A digital computer has a common bus system for 16 registers of 32 bits each. The bus is constructed with multiplexers. (i) How many selection inputs are there in each multiplier? (ii) What sizes of multiplexers are needed? How many multiplexers are there in the bus? 3. Explain what is DMA? 4. What is pipelining? 5. What is cache? 6. What is cache coherency and how is it eliminated? 7. What is write back and write through caches? 8. What are different pipelining hazards and how are they eliminated? 9. What are different stages of a pipe? 10. How do you improve the cache performance. 11. Different addressing modes. 12. Computer arithmetic with two's complements. 13. What are the types of memory management? 14. Explain the difference between hardwired and control and micro programmed control. 15. Explain the overflow condition in arithmetic shift micro operation. 16. What are the two instructions needed in the basic computer in order to set E flip-flop to 1? 17. The following transfer statements specify a memory. Explain a memory operation in each case: (i) M[AR] R3 (ii) R2 M[AR] 18. Define the following: (i) Microcode (ii) Microinstruction Micro operation (iv)micro Program 19. Explain the importance of different addressing modes in computer architecture with suitable example. 20. What is an instruction format? Explain different types of instruction formats in detail.

2 21. Design an arithmetic circuit with one selection variable S and two n-bit data inputs A & B. The circuit generates the following four arithmetic operations in conjunction with the input carry Cin. Draw the logic diagram for the first two stages. 22. Explain shift micro operation in detail. Also draw and explain 4-bit combinational circuit. 23. Explain Flynn s classification of computers. 24. What is the difference between isolated I/O and memory mapped I/O? 25. Why does DMA have priority over the CPU when both request a memory transfer? 26. Derive an algorithm for evaluating the square root of a binary fixed point number. 27. Explain in detail RISC pipeline. Why is the cache miss penalty, greater in deeply pipelined processor? 28. What is direct memory access (DMA)? Why are the read and write control lines in a DMA controller bi directional? 29. Formulate a hardware procedure for detecting an overflow by computing the sign of the sum with the signs of the augends and addend. The numbers are in signed 2 s complement representation. 30. What is the basic advantage of using interrupt initiated data transfer over transfer under program control without an interrupt? 31. What is asynchronous data transfer? Explain in detail. 32. Explain vector processing. What is the difference between vector & array processing? 33. What is the difference between serial and parallel transfer? Explain with the required example. 34. Explain the hardware implementation of logic micro operation for AND, OR, XOR and Complement logic gate. 35. What is the difference between micro processor and a micro program? 36. Why should the sign of the remainder after a division be the same as the sign of the dividend? 37. A digital computer has a common bus system for 16 register of 32 bits each. The bus is Constructed with multiplexers. (i) How many selection inputs are there in each multiplexer?

3 (ii) What sizes of multiplexers are needed? How many multiplexers are there in the bus? 38. Explain the circuit of Accumulator logic. 39. What is the difference between a direct and indirect address instruction? How many references to memory are needed for each type of instruction to bring an operand into a processor register? 40. A computer has 16 register, an ALU with 32 operations and a shifter with eight operations all Connected to a common bus system. (i) Formulate a control word for a micro operation. (ii) Specify the number of pits in each field on the control word and give a general encoding scheme. 41. Convert the following arithmetic expressions from infix to reverse polish notation:- (i) A*B+C*D+E*F (ii) A*B+A*(B*D+C*E) A*[B+C*CD+E]/F*(G+H) 42. Draw a space time diagram for a six-segment pipeline showing the time it takes to process eight Tasks. 43. Design an array multiplier that multiplies two 4-bit numbers. Use AND gates and binary adders. 44. Explain memory hierarchy in a computer system. 45. Explain Cache Coherence. 46. Write the format of memory reference & I/O reference instruction. 47. Differentiate between masking and selective clear. 48. Explain tri state buffer with their application. 49. An instruction is stored at location 300 with its address field at location 301. The address field at location 301. The address field has the value 400. A processor register R1 contains the number 200. Evaluate the effective address if the addressing mode of the instruction is (i) Direct

4 (ii) Immediate Relative (iv)register indirect (v) Index with R1 as the index register 50. Draw and explain the diagram of micro program sequencer. 51. Explain the following: (i) (ii) (iv) (v) Functions of peripherals interface Modes of transfer in DMA Speedup ratio Divide overflow Difference between RISC & CISC 52. A no pipeline system takes 50 ns to process a task. The same task can be processed in 6 segment pipeline with a clock cycle of 10 ns. Determine the speedup ratio of pipeline for 100 tasks. What is maximum speedup ratio? 53. Explain hazards to the instruction pipeline with their solution. 54. Explain Booth s algorithm for multiplying binary integer in signed 2 s complement representation. 55. Design the hardware of addition & subtraction of fixed point signed magnitude numbers. 56. Design the hardware of addition & subtraction of fixed point signed magnitude numbers. 57. What is vector processing? 58. How many types of address sequence are required in a control memory? Explain with the diagram of a control memory and it s associated hardware. 59. With the help of flow chart, discuss the hardware divide algorithm. Explain how the divide overflow conditions are handled? 60. Register A holds binary. Determine the register B operand and the logic micro operation to be performed in order to change the value (i) (ii) What are the two instruction needed in the basic computer in order to set the E flip flop to 1? 62. Write a program to evaluate the arithmetic statement:

5 W=(A+B-C+(D8E-F))/(G+H*K) 63. What do you mean by instruction cycle and interrupt cycle? Draw the flowchart for instruction Cycle. 64. What do you mean by fixed point representation? Explain the various integer representations with suitable example. 65. What is input-output interface? Draw and explain block diagram of input-output interface. 66. Explain register transfer language. 67. Explain priority interrupt in detail. 68. Explain architecture of computer system. 69. Define strobe control. 70. Explain the organization of virtual memory. 71. Explain CAM. 72. Explain memory-reference instructions. 73. Explain data transfer and manipulation instruction. 74. Define the following: (i) (ii) Crossbar switch Multistage switch Hypercube connection 75. Explain interprocessor communication and synchronization. 76. Explain daisy chain priority. 77. Explain decimal arithmetic unit. 78. Explain branch instructions. 79. Determine the number of clock cycles that it takes to process 200 task in a six segment pipeline. 80. Why does DMA have priority over CPU when both when both request a memory transfer?

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